onsemi NCP1501DMR2
- Part No.:
- NCP1501DMR2
- Manufacturer:
- onsemi
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
NCP1501DMR2.pdf
- Description:
- IC REG SGL BUCK/LINEAR MICRO8
- Quantity:
- Payment:

- Shipping:

Inventory:1,913
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Product details
Overview
NCP1501DMR2 from onsemi is a dual-mode synchronous buck converter that operates either as a current-mode PWM regulator (500–1000 kHz) or as a low-noise LDO, with automatic mode switching controlled by the SYN pin. It integrates high- and low-side MOSFETs, supports four fixed output voltages (1.05 V/1.35 V/1.57 V/1.8 V), delivers up to 300 mA in PWM mode and >50 mA in LDO mode, and is optimized for portable power in DSP core supplies and cellular handsets.
For engineers reviewing the NCP1501DMR2 datasheet, pinout, applications, or equivalent options, key selection criteria include its dual-mode efficiency/noise trade-off, internal slope compensation, thermal shutdown at 160°C with 25°C hysteresis, and Micro8 package compatibility with ceramic capacitor-based layouts.
Technical Context
The NCP1501DMR2 implements a patent-pending dual-mode architecture: PWM operation requires an external synchronization signal on the SYN pin (500–1000 kHz, 30–70% duty cycle), enabling synchronous rectification and peak-current limiting (800 mA typ); absence of SYN forces automatic transition to LDO mode via internal pull-down, activating Q3 bypass and Q1 as pass device with 7.0 Ω RDS(on).
Output voltage is selected via CB0/CB1 logic states (floating defaults to 1.35 V), while SHD enables/disables the IC with 0.2 µA shutdown current. The device includes built-in soft-start, overvoltage protection (3.0% threshold), and thermal shutdown with hysteresis-no external oscillator or diode required.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Operating Modes | PWM (current-mode, sync-driven) and LDO (low-noise linear); auto-switched based on SYN pin state |
| Output Voltage Options | 1.05 V, 1.35 V, 1.57 V, 1.80 V - set by CB0/CB1 logic levels; floating defaults to 1.35 V |
| Max Output Current | 300 mA (PWM mode, guaranteed); >50 mA (LDO mode) |
| Switching Frequency Range | 500–1000 kHz - externally synchronized; no internal oscillator |
| RDS(on) (PWM) | 0.6 Ω (P-FET), 0.7 Ω (N-FET) - enables high-efficiency synchronous rectification without external diode |
| RDS(on) (LDO) | 7.0 Ω (LX-to-VO path) - defines dropout behavior; Vin − Vout ≤ 0.7 V at max load |
| Quiescent Current | 32 µA (LDO mode, IOUT = 0), 124 µA (PWM mode, IOUT = 0), 0.2 µA (shutdown) |
| Thermal Protection | Shutdown at 160°C junction temperature with 25°C hysteresis - prevents latch-up during overload |
Pinout & Package
Package: Micro8 (MSOP-8, Case 846A), 3.0 × 3.0 × 0.95 mm, Pb-free option available (NCP1501DMR2G). Pin 1 marked with dot; exposed pad not electrically connected.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - SHD | Enable control input | Active-high enable; internal pull-down ensures safe off-state if unconnected |
| 2 - SYN | Mode selection trigger | External clock input; presence → PWM mode, absence (or pulled low) → LDO mode |
| 3 - VO | Feedback node | Connects to output; internal MOSFET ties VO–LX in LDO mode for regulation |
| 4 - LX | Switch node | Drives external inductor; connects to internal P/N-FET drains in PWM, to Q3 source in LDO |
| 5 - Vin | Main power input | 2.7–5.2 V supply; powers internal circuitry and switching elements |
| 6 - GND | Reference ground | Common return for all analog/digital blocks; must be low-impedance PCB plane |
| 7 - CB1 | Voltage select bit | Logic high (≥910 mV) selects upper voltage tier; internal pull-up |
| 8 - CB0 | Voltage select bit | Logic low (≤850 mV) selects lower voltage tier; internal pull-down |
Key Features
| Feature | Design Value |
|---|---|
| Synchronous rectification | Integrated P/N-FETs eliminate external catch diode; enables >90% efficiency at 100 mA (3.6 V → 1.8 V) |
| Dual-mode noise management | LDO mode reduces output ripple during sleep; PWM mode locates spurious noise via user-controlled SYNC frequency |
| Auto-transition logic | No external control logic needed - SYN pin state alone determines operating mode |
| Ceramic-optimized design | Stable with 10 µF X5R ceramic input/output caps and 10 µH low-profile inductors (e.g., TDK LLF4017-100) |
| Internal protection suite | Includes cycle-by-cycle current limit (800 mA), OVP (3.0% threshold), thermal shutdown (160°C), and soft-start |
| Fixed-voltage flexibility | Four factory-set outputs selectable via two logic pins - eliminates external resistor divider and associated tolerance error |
Applications
| Cellular Phone Power | DSP Core Supply |
|---|---|
Use Scenario: Powering baseband processor and RF transceiver in GSM/UMTS handsets during active and standby modes. IC Role / Device Role / Timing Role: Dual-mode regulator providing clean 1.8 V for RF section (LDO mode, low noise) and efficient 1.35 V for digital core (PWM mode, high load). Use Value: Extends battery life by reducing quiescent current to 32 µA in sleep; maintains <±5 mV line transient response during voltage rail switching. | Use Scenario: Delivering stable, low-noise voltage to a low-power DSP core in portable audio devices. IC Role / Device Role / Timing Role: Supplies 1.05 V or 1.57 V DSP I/O or core rail; switches to LDO during idle cycles to suppress switching noise near sensitive analog sections. Use Value: Achieves <40 mV load transient deviation (10→100 mA) and eliminates need for post-regulation LDO stages. |
| PDA System Rail | Pager Memory Backup |
Use Scenario: Generating multiple regulated rails (1.35 V, 1.8 V) for PDA main logic and display driver ICs from single Li-ion cell. IC Role / Device Role / Timing Role: Acts as primary step-down converter; uses CB0/CB1 to configure per-rail voltage without redesigning feedback network. Use Value: Reduces BOM count by integrating MOSFETs and feedback amplifier; supports 2.7–5.2 V input range matching battery discharge profile. | Use Scenario: Providing ultra-low-quiescent backup power to SRAM or real-time clock in pagers during deep sleep. IC Role / Device Role / Timing Role: Operates exclusively in LDO mode (SYN held low); regulates 1.35 V from depleted 2.5 V battery. Use Value: Delivers >50 mA at <0.7 V dropout while consuming only 32 µA - extends usable battery life beyond cutoff of switching regulators. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-mode DC-DC regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Texas Instruments TPS6223x | Single-mode buck (not dual-mode); higher 2.25 MHz fixed frequency; no LDO fallback | Requires external LDO for low-noise sleep mode; less suitable for strict EMI-constrained portable designs | Select when highest efficiency at medium loads outweighs need for ultra-low-noise standby operation |
| Analog Devices ADP2118 | Fixed-frequency PWM-only buck; 3 A capability; no integrated LDO path or SYN-controlled mode switching | Cannot replace NCP1501DMR2's seamless LDO transition; needs companion LDO for noise-sensitive rails | Choose for higher-current applications where dual-mode functionality is unnecessary |
Compared with TPS6223x and ADP2118, the NCP1501DMR2 uniquely combines PWM efficiency and LDO noise performance in one chip, eliminating layout complexity and component count for portable systems requiring both high-load efficiency and deep-sleep stability.
Availability
NCP1501DMR2 is available at Aetrix Electronics and suitable for cellular phone power management, DSP core supplies, PDA system rails, and pager memory backup requiring stable component supply across production lifecycles.
Supply support for NCP1501DMR2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient innovation for automotive, industrial, cloud, and portable electronics.
The NCP1501DMR2 belongs to onsemi's portable power management product line, engineered specifically for battery-powered devices needing adaptive efficiency/noise optimization without external mode-control logic.
FAQ
What is the function of the SYN pin on the NCP1501DMR2?
The SYN pin on the NCP1501DMR2 controls operating mode: a valid 500–1000 kHz synchronization signal (30–70% duty cycle, ≥920 mV high threshold) enables PWM mode with synchronous rectification; absence of signal-or pulling SYN low-forces automatic transition to low-noise LDO mode. Internal pull-down ensures default LDO behavior if left unconnected.
How does the NCP1501DMR2 select its output voltage?
The NCP1501DMR2 selects output voltage via logic states on CB0 and CB1 pins: CB0=L/CB1=L → 1.05 V; CB0=L/CB1=H → 1.35 V; CB0=H/CB1=H → 1.57 V; CB0=H/CB1=L → 1.80 V. Internal pull-down on CB0 and pull-up on CB1 cause floating pins to default to 1.35 V, simplifying configuration for common use cases.
What is the maximum guaranteed output current for the NCP1501DMR2 in PWM mode?
The NCP1501DMR2 guarantees ≥300 mA output current in PWM mode across the full 2.7–5.2 V input range and −30°C to +85°C ambient temperature. This rating accounts for thermal limits and internal current-limit threshold (800 mA typical), ensuring reliable operation without external current sensing or derating in typical handheld layouts.
Does the NCP1501DMR2 require an external diode?
No, the NCP1501DMR2 does not require an external diode. Its integrated synchronous rectification uses internal N-FET (Q2) as the freewheeling switch in PWM mode, replacing the conventional Schottky diode. This eliminates conduction losses and improves efficiency-especially critical in battery-powered applications where every µA counts.
What protection features are built into the NCP1501DMR2?
The NCP1501DMR2 includes cycle-by-cycle peak current limiting (800 mA typ), overvoltage protection (3.0% threshold), thermal shutdown at 160°C with 25°C hysteresis, and internal soft-start. These functions operate autonomously without external components, safeguarding both the IC and downstream circuitry during fault conditions such as short-circuit, overtemperature, or fast load transients.
NCP1501DMR2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Topology:
- Step-Down (Buck) (1), Linear (LDO) (1)
- Number of Outputs:
- 1
- Frequency - Switching:
- 500kHz ~ 1MHz
- Voltage/Current - Output 1:
- 1.05V, 1.35V, 1.57V, 1.8V, -
- Voltage/Current - Output 2:
- -
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 2.7V ~ 5.2V
- Operating Temperature:
- -30°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-MSOP
NCP1501DMR2 FAQ
1.How can I place an order for NCP1501DMR2 through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP1501DMR2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP1501DMR2 reliable?
The price and inventory of NCP1501DMR2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP1501DMR2 is usually 5 days.
3.What payment methods are accepted for NCP1501DMR2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP1501DMR2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP1501DMR2?
NCP1501DMR2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP1501DMR2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP1501DMR2?
For technical support, including NCP1501DMR2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP1501DMR2 requirements.
6.How does Aetrix verify that NCP1501DMR2 is sourced from the original manufacturer or authorized distributors?
All NCP1501DMR2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP1501DMR2 meets industry standards.
7.What is the process for return or replacement of NCP1501DMR2?
All NCP1501DMR2 units undergo pre-shipment inspection (PSI). If there is an issue with NCP1501DMR2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP1501DMR2 part is unused and in its original packaging.
Return procedure for NCP1501DMR2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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