onsemi NCP1510FCT1G
- Part No.:
- NCP1510FCT1G
- Manufacturer:
- onsemi
- Package:
- 9-WFBGA, FCBGA
- Datasheet:
-
NCP1510FCT1G.pdf
- Description:
- IC REG BCK PROG 300MA 9MICROBUMP
- Quantity:
- Payment:

- Shipping:

Inventory:2,483
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NCP1510FCT1G from onsemi is a tri-mode synchronous buck DC-DC converter IC designed for baseband power supplies in portable electronics. It delivers 300 mA output in PWM mode and 30 mA in pulsed mode, features integrated P-FET/N-FET switches (RDS(on) = 0.23 Ω), supports fixed output voltages of 1.05 V/1.35 V/1.57 V/1.8 V via CB0/CB1 pins, and achieves ultra-low 14 µA quiescent current in pulsed mode - enabling extended battery life in cellular phones and PDAs.
For engineers reviewing the NCP1510FCT1G datasheet, pinout, applications, or equivalent options, key selection criteria include its tri-mode operation (sync PWM / internal-oscillator PWM / low-Iq pulsed), 450–1000 kHz sync frequency range, thermal shutdown protection, and micro bump 9-pin FC package with GNDP/GNDA separation for noise-sensitive analog power domains.
Technical Context
The NCP1510FCT1G implements current-mode PWM control with built-in slope compensation and cycle-by-cycle current limiting (800 mA typical). Its SYNC pin determines operational mode: low → pulsed mode (660 ns on-time, 30 mA max); high → internal 1.0 MHz oscillator PWM; external clock input → synchronized PWM (450–1000 kHz).
It integrates dual MOSFETs, feedback error amplifier, overvoltage protection (3% threshold), soft-start circuitry, and separate power (GNDP) and analog (GNDA) grounds. Output voltage is selected by CB0/CB1 logic levels per Table 2, with internal pull-up (CB1) and pull-down (CB0) resistors ensuring default 1.35 V if unconnected.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 300 mA in PWM mode; 30 mA in pulsed mode - enables full-system operation and deep-sleep biasing |
| Quiescent Current | 14 µA in pulsed mode - extends battery runtime during idle/sleep states |
| Switching Frequency | 450–1000 kHz (sync mode); 1.0 MHz (internal oscillator) - allows EMI optimization and compact passive sizing |
| RDS(on) | 0.23 Ω (P-FET + N-FET) - reduces conduction loss and improves efficiency at medium loads |
| Output Voltage Options | 1.05 V / 1.35 V / 1.57 V / 1.8 V - matches common DSP/core voltage rails without external resistor dividers |
| Thermal Protection | 160°C trip with 25°C hysteresis - prevents permanent damage during overload or poor heatsinking |
| Feedback Accuracy | ±3% (e.g., 1.57 V ±47 mV) - ensures stable core voltage regulation across temperature and load |
Pinout & Package
Package: 9-pin micro bump FC (Case 499AC), Pb-free, 1.55 mm × 1.55 mm footprint, 0.5 mm pitch, coplanarity-controlled solder balls.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A1: GNDP | Power Ground | Return path for high-current P-FET/N-FET switching stage - must be isolated from analog ground to minimize noise coupling |
| A2: LX | Switch Node | Connection between internal FETs and external inductor - requires short, low-inductance PCB trace to reduce ringing and EMI |
| A3: VCC | Supply Input | Input power rail (2.5–5.2 V); powers internal circuitry and gate drivers - requires local 10 µF ceramic bypass capacitor |
| B1: SYNC | Mode Control Input | Determines operating mode: low = pulsed; high = internal PWM; clock input = synchronized PWM - includes internal pull-down |
| B2: GNDA | Analog Ground | Reference for FB, SHD, CB0, CB1, and SYNC - must connect to clean analog ground plane, separate from GNDP |
| B3: FB | Feedback Input | Monitors output voltage via resistive divider - high-impedance input (5–7.5 µA bias) enables precision regulation |
| C1: SHD | Enable Input | Active-high enable with internal pull-down - asserts shutdown when floating or driven low (Iq ≤ 1.0 µA) |
| C2: CB1 | Voltage Select | MSB of output voltage code (1.05/1.35/1.57/1.8 V); internal pull-up sets default high state |
| C3: CB0 | Voltage Select | LSB of output voltage code; internal pull-down sets default low state - together with CB1, selects VOUT per truth table |
Key Features
| Feature | Design Value |
|---|---|
| Synchronous rectification | Eliminates external Schottky diode, reducing conduction loss and improving efficiency by ~5–8% at 100 mA load |
| Tri-mode operation | Automatically transitions between high-efficiency PWM and ultra-low-Iq pulsed mode based on SYNC pin state - no firmware or external logic required |
| Integrated MOSFETs | Reduces BOM count and layout area; eliminates gate driver design complexity and external FET selection |
| Dynamic voltage management | CB0/CB1 pins allow real-time VOUT reconfiguration (e.g., 1.35 V → 1.57 V) during system operation to match processing load |
| Thermal limit protection | 160°C shutdown with 25°C hysteresis prevents latch-up and enables safe recovery after transient overloads |
Applications
| Cellular Phone Baseband Supply | PDA Processor Core Rail |
|---|---|
Use Scenario: Powers baseband processor in GSM/CDMA handsets during active call and standby modes. IC Role / Device Role / Timing Role: Synchronous buck regulator providing dynamically scalable 1.35 V or 1.57 V core voltage with pulsed-mode sleep current <15 µA. Use Value: Extends talk time by >12% and standby time by >3× versus fixed-frequency PWM-only solutions at light loads. | Use Scenario: Supplies ARM-based application processor in handheld PDAs with burst-mode workloads. IC Role / Device Role / Timing Role: Tri-mode DC-DC delivering 300 mA peak during UI rendering and dropping to 30 mA pulsed mode during screen-off idle. Use Value: Enables sub-10 µA system sleep current while maintaining regulated bias - critical for weeks-long battery life. |
| Digital Camera Image Sensor Bias | Portable Audio Codec Power |
Use Scenario: Provides clean, low-noise 1.8 V supply to CMOS image sensor during capture and preview modes. IC Role / Device Role / Timing Role: Buck converter with separate GNDA/GNDP grounds minimizing switching noise injection into analog sensor interface. Use Value: Reduces image sensor readout noise by >6 dB compared to non-synchronous or poorly grounded alternatives. | Use Scenario: Powers stereo audio codec in Bluetooth headphones with variable load (idle vs. playback). IC Role / Device Role / Timing Role: Efficient 1.05 V output regulator using internal 1 MHz oscillator to avoid RF band interference. Use Value: Achieves >90% efficiency at 50 mA while suppressing 1 MHz harmonics from entering audio signal path. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62231DRYR | Single-mode 3-MHz PWM; 300 mA output; no pulsed/low-Iq mode; smaller 6-pin WSON package | Lacks tri-mode flexibility - less suitable for systems requiring deep-sleep current <20 µA | Choose for space-constrained designs where constant high-frequency operation is acceptable and pulsed mode is unnecessary |
| RT8059NGQW | 2-MHz PWM with DCM mode; 600 mA output; integrated compensation; different pinout and enable polarity | Higher output current but no dedicated low-Iq pulsed mode - uses discontinuous conduction instead of true pulsed switching | Prefer when higher load capability is needed and system can tolerate ~45 µA DCM quiescent current vs. NCP1510FCT1G's 14 µA |
Compared with TPS62231DRYR and RT8059NGQW, the NCP1510FCT1G uniquely delivers sub-15 µA quiescent current in a dedicated pulsed mode while retaining full 300 mA PWM capability - making it optimal for battery-powered devices with aggressive sleep/active duty cycles.
Availability
NCP1510FCT1G is available at Aetrix Electronics and suitable for cellular phone baseband supplies, PDA processor core rails, and digital camera image sensor biasing requiring stable component supply, long-term lifecycle support, and Pb-free compliance.
Supply support for NCP1510FCT1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient electronics, with leadership in power management, analog, and sensor technologies.
The NCP1510FCT1G belongs to onsemi's portable power management product line, engineered specifically for ultra-low-power, multi-mode DC-DC conversion in battery-operated consumer devices where sleep-mode current and dynamic voltage scaling are critical.
FAQ
What is the minimum input voltage required for NCP1510FCT1G to regulate 1.57 V output?
The NCP1510FCT1G requires a minimum input voltage of 2.5 V to maintain regulation at 1.57 V output. This headroom supports operation down to single-cell Li-ion battery voltages (~2.7 V nominal, ~2.5 V under load), enabling direct integration into portable equipment without pre-regulation stages. The device remains functional up to 5.2 V input, accommodating USB-powered or dual-cell configurations.
How does the NCP1510FCT1G achieve 14 µA quiescent current in pulsed mode?
The NCP1510FCT1G achieves 14 µA quiescent current in pulsed mode by disabling its high-frequency PWM circuitry and operating only essential bias and timing blocks. In this state, the internal oscillator is halted, gate drivers are gated off, and the control loop runs at a much lower frequency (free-running pulsed operation), drastically reducing dynamic and leakage currents. This behavior is triggered automatically when the SYNC pin is held low.
Can NCP1510FCT1G be used with an external 800 kHz clock source?
Yes, the NCP1510FCT1G accepts external synchronization signals from 450 kHz to 1000 kHz, including 800 kHz square waves applied to the SYNC pin. The rising edge triggers the P-FET turn-on event, allowing precise EMI frequency placement and system-level clock domain alignment. The SYNC pin has defined thresholds (VSYNCH = 920–1200 mV high; VSYNCL = 400–830 mV low) and 2.2 µA input current at 3.6 V, compatible with standard CMOS logic drivers.
What is the purpose of separate GNDP and GNDA pins on NCP1510FCT1G?
The NCP1510FCT1G separates GNDP (power ground) and GNDA (analog ground) to isolate high-current switching return paths from sensitive analog reference circuits. GNDP carries pulsed inductor current and FET switching transients, while GNDA serves the feedback amplifier, reference, and logic inputs. This separation minimizes noise coupling into the feedback loop, preserving output voltage accuracy (±3%) and stability - especially critical in noise-sensitive applications like image sensors and audio codecs.
How is output voltage selected on NCP1510FCT1G, and what happens if CB0/CB1 are left unconnected?
Output voltage on NCP1510FCT1G is selected via logic levels on CB0 (pin C3) and CB1 (pin C2): 00 = 1.05 V, 01 = 1.35 V, 11 = 1.57 V, 10 = 1.8 V. If left unconnected, CB1's internal pull-up resistor forces it high and CB0's internal pull-down forces it low, resulting in default 1.35 V output. This fail-safe configuration ensures predictable startup without external pull resistors in basic implementations.
NCP1510FCT1G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 9-WFBGA, FCBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Programmable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.2V
- Voltage - Output (Min/Fixed):
- 1.05V, 1.35V, 1.57V, 1.8V
- Voltage - Output (Max):
- -
- Current - Output:
- 300mA
- Frequency - Switching:
- 450kHz ~ 1MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -30°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 9-MicroBump (1.55x1.55)
NCP1510FCT1G FAQ
1.How can I place an order for NCP1510FCT1G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP1510FCT1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP1510FCT1G reliable?
The price and inventory of NCP1510FCT1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP1510FCT1G is usually 5 days.
3.What payment methods are accepted for NCP1510FCT1G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP1510FCT1G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP1510FCT1G?
NCP1510FCT1G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP1510FCT1G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP1510FCT1G?
For technical support, including NCP1510FCT1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP1510FCT1G requirements.
6.How does Aetrix verify that NCP1510FCT1G is sourced from the original manufacturer or authorized distributors?
All NCP1510FCT1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP1510FCT1G meets industry standards.
7.What is the process for return or replacement of NCP1510FCT1G?
All NCP1510FCT1G units undergo pre-shipment inspection (PSI). If there is an issue with NCP1510FCT1G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP1510FCT1G part is unused and in its original packaging.
Return procedure for NCP1510FCT1G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NCP1510FCT1G Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

