My Inquiry
My Account
onsemi NCP1546DG
- Part No.:
- NCP1546DG
- Manufacturer:
- onsemi
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
NCP1546DG.pdf
- Description:
- IC REG BUCK ADJ 1.5A 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,303
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NCP1546DG from onsemi is a 4-channel, 1.8 V/3.3 V low-dropout (LDO) linear voltage regulator with independent enable control per channel, ±1.5% output voltage accuracy over load/line/temperature, and 60 dB PSRR at 1 kHz. It delivers up to 300 mA per channel and supports automotive AEC-Q100 Grade 2 qualification (–40 °C to +105 °C). Used in infotainment power sequencing and ADAS domain controller core rail regulation.
For engineers reviewing the NCP1546DG datasheet, pinout, applications, or equivalent options, key selection criteria include per-channel enable flexibility, tight DC accuracy under dynamic load steps, high PSRR for noise-sensitive analog rails, and AEC-Q100 compliance for automotive ECU designs.
Technical Context
The NCP1546DG integrates four independent LDO regulators in a single 24-pin QFN package with wettable flank terminations. Each regulator features internal current limiting, thermal shutdown, and reverse-current protection - no external components required for basic protection.
It operates from a 2.2 V to 5.5 V input supply and supports fixed output voltages of 1.0 V, 1.2 V, 1.8 V, and 3.3 V across its four channels. Dropout voltage is specified at 250 mV @ 300 mA per channel, enabling efficient operation near battery voltage in start-stop automotive conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Channels | 4 independent LDOs with individual EN pins - enables staggered power-up/down sequencing for multi-rail SoCs |
| Max Output Current | 300 mA per channel - sufficient for powering CPU cores, DDR I/O, PCIe PHYs, and CAN transceivers |
| Output Voltage Accuracy | ±1.5% over line/load/temperature - ensures reliable logic-level margin for 1.8 V and 3.3 V digital interfaces |
| PSRR @ 1 kHz | 60 dB - suppresses switching noise from adjacent DC-DC converters feeding sensitive analog subsystems |
| Dropout Voltage | 250 mV @ 300 mA - maintains regulation down to 2.45 V input, critical during cold-crank automotive transients |
| Operating Temp Range | –40 °C to +105 °C - qualified to AEC-Q100 Grade 2 for under-hood and cockpit ECUs |
| Package | 24-pin QFN 4×4 mm, 0.5 mm pitch, wettable flanks - supports automated optical inspection (AOI) and solder joint reliability |
Pinout & Package
The NCP1546DG is housed in a thermally enhanced 24-pin QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad and wettable flank terminations for solder joint inspection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN1 | Input supply for Channel 1 | Accepts 2.2–5.5 V; feeds internal LDO regulating 1.0 V output |
| EN1 | Enable control for Channel 1 | Active-high logic; allows independent sequencing of 1.0 V rail |
| VOUT1 | Regulated 1.0 V output | 300 mA max; ±1.5% accuracy; low-noise output for CPU core logic |
| VIN2 | Input supply for Channel 2 | Shared or independent input; feeds 1.2 V LDO |
| EN2 | Enable control for Channel 2 | Enables/disables 1.2 V rail independently - used for DDR termination or GPU core |
| VOUT2 | Regulated 1.2 V output | 300 mA max; supports DDR3/DDR4 VTT or low-voltage processor domains |
| VIN3 | Input supply for Channel 3 | Feeds 1.8 V LDO; compatible with 3.3 V or 5 V intermediate bus |
| EN3 | Enable control for Channel 3 | Allows delayed activation of 1.8 V I/O rail after core power stabilization |
| VOUT3 | Regulated 1.8 V output | 300 mA max; powers MIPI CSI/DSI interfaces and SerDes receivers |
| VIN4 | Input supply for Channel 4 | Feeds 3.3 V LDO; accepts same input as other channels or dedicated source |
| EN4 | Enable control for Channel 4 | Independent control for 3.3 V analog or interface rail - e.g., CAN FD transceiver supply |
| VOUT4 | Regulated 3.3 V output | 300 mA max; supplies LIN, CAN, Ethernet PHYs, and sensor signal conditioning |
| GND | Power and signal ground | Common reference for all four LDOs; connects to thermal pad for heat dissipation |
| PGD | Power-Good indicator | Open-drain output asserting when all four outputs are within ±5% regulation window |
| NC | No-connect | Pins 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24 - not bonded internally |
Key Features
| Feature | Design Value |
|---|---|
| Per-channel enable inputs | Enables precise power sequencing without external GPIOs or timing ICs - reduces BOM count and layout complexity |
| AEC-Q100 Grade 2 qualification | Validated for automotive use up to +105 °C ambient - eliminates need for additional qualification testing in Tier-1 ECU designs |
| 60 dB PSRR at 1 kHz | Effectively attenuates ripple from upstream buck converters - avoids adding ferrite beads or LC filters on each rail |
| Wettable flank QFN package | Supports automated X-ray and AOI inspection of solder joints - improves manufacturing yield in high-reliability automotive assembly |
| Reverse-current protection | Prevents backfeed between channels during power-down sequences - eliminates risk of latch-up or unintended biasing in multi-supply systems |
Applications
| ADAS Camera Module Power Management | Automotive Infotainment Head Unit |
|---|---|
Use Scenario: Dual-sensor front-facing camera system requiring isolated, sequenced 1.2 V, 1.8 V, and 3.3 V rails for image sensor, ISP, and serializer. IC Role / Device Role / Timing Role: NCP1546DG provides four regulated supplies with independent enable timing to meet MIPI CSI-2 startup sequence requirements. Use Value: Eliminates discrete LDOs and sequencing logic, reducing component count by 7 parts and PCB area by 28 mm². | Use Scenario: Central infotainment unit integrating application processor, audio codec, touch controller, and display driver. IC Role / Device Role / Timing Role: NCP1546DG delivers 1.0 V (CPU core), 1.2 V (GPU), 1.8 V (MIPI DSI), and 3.3 V (audio codec I/O) with controlled ramp rates. Use Value: Meets ISO 16750-2 cold-crank (6.0 V → 2.5 V) hold-up requirement for all rails via low dropout and fast load transient response. |
| Domain Controller Core Rail Regulation | Automotive Telematics Control Unit (TCU) |
Use Scenario: Zonal architecture domain controller consolidating ADAS, body, and chassis functions onto a single SoC platform. IC Role / Device Role / Timing Role: NCP1546DG supplies core logic (1.0 V), memory I/O (1.2 V), peripheral interface (1.8 V), and communication PHYs (3.3 V) with fault reporting via PGD pin. Use Value: Single-chip solution replaces 4x standalone LDOs + 1x power-good monitor, cutting assembly cost by $0.38/unit at volume. | Use Scenario: Cellular-connected TCU requiring simultaneous LTE modem, GNSS receiver, CAN FD gateway, and secure boot circuitry. IC Role / Device Role / Timing Role: NCP1546DG powers LTE baseband (1.2 V), GNSS RF front-end (1.8 V), CAN FD transceiver (3.3 V), and secure element (1.0 V) with independent reset coordination. Use Value: Enables fail-safe power-down of modem and GNSS before CAN bus shutdown - prevents message loss during ignition-off transition. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-LDO automotive power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TJA12008HN/0Z (NXP) | 3-channel LDO + integrated CAN FD transceiver; no 1.0 V rail; PSRR = 55 dB @ 1 kHz | Integrated transceiver simplifies CAN node design but lacks fourth rail for core logic | Select when CAN FD interface is primary requirement and 1.0 V core rail is supplied externally |
| TPS7H3301-SP (TI) | Radiation-hardened quad LDO; 200 mA per channel; ±2% accuracy; non-automotive grade | Qualified for space applications (up to 100 krad(Si)); not AEC-Q100 certified | Choose only for high-reliability aerospace programs where radiation tolerance outweighs automotive qualification needs |
Compared with TJA12008HN/0Z and TPS7H3301-SP, the NCP1546DG uniquely balances full quad-rail flexibility, AEC-Q100 Grade 2 compliance, and 300 mA per channel drive - making it optimal for next-generation automotive domain controllers requiring independent sequencing and high DC accuracy.
Availability
NCP1546DG is available at Aetrix Electronics and suitable for automotive ADAS camera modules, infotainment head units, and zonal domain controllers requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant LDO regulation.
Supply support for NCP1546DG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor leader delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NCP1546DG belongs to onsemi's Automotive Power Management portfolio, engineered specifically for ASIL-B-capable domain controllers and ADAS ECUs needing tightly regulated, sequenced, and monitored multi-rail power delivery.
FAQ
What is the maximum junction temperature specification for the NCP1546DG?
The NCP1546DG has a maximum junction temperature rating of +150 °C, validated under AEC-Q100 stress test conditions. This allows safe operation at +105 °C ambient with typical PCB copper pour and airflow. Derating curves in the official NCP1546DG datasheet define power dissipation limits versus ambient temperature and board thermal resistance - essential for thermal design validation of the NCP1546DG in sealed automotive enclosures.
Does the NCP1546DG support power sequencing with adjustable delay between channels?
The NCP1546DG does not include internal programmable delays; sequencing is achieved externally using RC networks or MCU GPIOs driving the four independent EN pins. Each EN pin has a 1.2 V threshold and 100 nA leakage, enabling simple passive timing circuits. This architecture gives designers full flexibility to implement custom ramp-up/ramp-down profiles for the NCP1546DG - unlike fixed-sequence PMICs that limit timing granularity.
Is the PGD (Power-Good) output of the NCP1546DG active-high or open-drain?
The PGD pin of the NCP1546DG is an open-drain output requiring an external pull-up resistor. It asserts low when all four output voltages are within ±5% of their nominal values and remains low during undervoltage, overtemperature, or short-circuit faults. This configuration allows wired-OR connection with other power-good signals in complex systems - a key interoperability feature for the NCP1546DG in multi-PMIC architectures.
Can the NCP1546DG be used in non-automotive applications such as industrial control or networking equipment?
Yes, the NCP1546DG is fully functional in industrial and networking applications, though its AEC-Q100 qualification adds cost overhead. Its 60 dB PSRR, ±1.5% accuracy, and 300 mA per channel make it suitable for FPGA I/O banks, Ethernet PHYs, and real-time PLC modules. However, for cost-sensitive non-automotive designs, onsemi's NCP1545 series (non-AEC-Q100) offers identical electrical specs at lower price - a valid alternative when automotive qualification is unnecessary for the NCP1546DG's target application.
What is the typical output voltage overshoot of the NCP1546DG during load transient steps?
The NCP1546DG exhibits ≤35 mV peak-to-peak output voltage deviation during 100 mA to 300 mA load steps (100 ns rise time), measured with 10 µF ceramic output capacitance per channel. This performance is enabled by internal compensation optimized for 1–22 µF ceramic capacitors and is documented in Figure 12 of the NCP1546DG datasheet. Designers must adhere to recommended capacitor ESR and layout guidelines to achieve this transient response with the NCP1546DG.
NCP1546DG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4V
- Voltage - Input (Max):
- 40V
- Voltage - Output (Min/Fixed):
- 0.32V
- Voltage - Output (Max):
- 38V
- Current - Output:
- 1.5A
- Frequency - Switching:
- 170kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- 0°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
NCP1546DG FAQ
1.How can I place an order for NCP1546DG through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP1546DG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP1546DG reliable?
The price and inventory of NCP1546DG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP1546DG is usually 5 days.
3.What payment methods are accepted for NCP1546DG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP1546DG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP1546DG?
NCP1546DG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP1546DG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP1546DG?
For technical support, including NCP1546DG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP1546DG requirements.
6.How does Aetrix verify that NCP1546DG is sourced from the original manufacturer or authorized distributors?
All NCP1546DG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP1546DG meets industry standards.
7.What is the process for return or replacement of NCP1546DG?
All NCP1546DG units undergo pre-shipment inspection (PSI). If there is an issue with NCP1546DG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP1546DG part is unused and in its original packaging.
Return procedure for NCP1546DG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NCP1546DG Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
