onsemi NCP154MX330180TAG
- Part No.:
- NCP154MX330180TAG
- Manufacturer:
- onsemi
- Package:
- 8-XFDFN Exposed Pad
- Datasheet:
-
NCP154MX330180TAG.pdf
- Description:
- IC REG LINEAR 1.8V/3.3V 8XDFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,996
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NCP154MX330180TAG from onsemi is a dual-output, 300 mA low-dropout linear voltage regulator with independent IN1/IN2 and EN1/EN2 control, delivering precisely regulated 3.3 V and 1.8 V outputs. It features ultra-low noise (75 µVRMS, 10 Hz–100 kHz), high PSRR (75 dB at 1 kHz), and adaptive ground current for battery-powered RF subsystems in smartphones and wireless handsets.
For engineers reviewing the NCP154MX330180TAG datasheet, pinout, applications, or equivalent options, key selection criteria include dual-rail output stability under fast load transients, active discharge capability for rapid turn-off, thermal shutdown behavior at 160°C, and compatibility with 1 µF ceramic output capacitors without external bypass.
Technical Context
The NCP154MX330180TAG integrates two independent PMOS LDO channels sharing a common ground but with separate input and enable pins-enabling flexible power sequencing and rail isolation. Each channel employs bandgap-referenced error amplifiers, current-limit protection (400 mA typ.), and thermal shutdown (160°C trip, 20°C hysteresis).
Its adaptive ground current architecture reduces quiescent current to 55 µA per channel at light load while maintaining 140 mV typical dropout at 300 mA for the 3.3 V rail and 335 mV for the 1.8 V rail. The device achieves stable regulation with only 1 µF X5R/X7R ceramic output capacitors and requires no noise-bypass capacitor.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltages | 3.3 V (OUT1) and 1.8 V (OUT2), ±2% accuracy over −40°C to +85°C for VOUT > 2 V |
| Max Output Current | 300 mA per channel; internal current limit set to 400 mA (typ.) at 90% VOUT |
| Dropout Voltage | 140 mV (typ.) at 300 mA for 3.3 V rail; 335 mV (typ.) at 300 mA for 1.8 V rail |
| PSRR | 75 dB at 1 kHz, enabling clean power delivery to sensitive RF ICs without additional filtering |
| Quiescent Current | 55 µA per channel (typ.) at no load; 110 µA total when both EN pins enabled |
| Output Noise | 75 µVRMS (10 Hz–100 kHz) with 1 µF ceramic capacitor-no external bypass required |
| Enable Threshold | EN high threshold = 0.9 V (min.), EN low threshold = 0.4 V (max.)-compatible with standard GPIO logic |
Pinout & Package
Package: XDFN-8, 1.2 mm × 1.6 mm, 0.4 mm pitch, exposed thermal pad (EP) tied to GND. Compact footprint supports space-constrained mobile PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 4 | GND | Power ground terminals-both must be connected to PCB ground plane for thermal and electrical integrity |
| 2 | OUT1 | Regulated 3.3 V output; requires 1 µF ceramic capacitor to GND for stability |
| 3 | OUT2 | Regulated 1.8 V output; independently stabilized with its own 1 µF ceramic capacitor |
| 5 | EN2 | Enable input for OUT2; <0.4 V disables OUT2 and activates 50 Ω active discharge to GND |
| 6 | IN2 | Input supply for 1.8 V channel; decoupling capacitor must be placed adjacent to this pin |
| 7 | IN1 | Input supply for 3.3 V channel; independent of IN2-supports dual-input system architectures |
| 8 | EN1 | Enable input for OUT1; identical logic thresholds and discharge behavior as EN2 |
| EP | Exposed Pad | Thermal and electrical ground connection-must be soldered to large copper area for effective heat dissipation |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent inputs | IN1 and IN2 allow separate sourcing (e.g., battery + DC-DC) for each 3.3 V/1.8 V rail-enables fault isolation and sequencing |
| Active output discharge | 50 Ω internal discharge path pulls OUT1/OUT2 to GND within microseconds when disabled-prevents floating rails during power-down |
| Stable with 1 µF ceramic COUT | Eliminates need for larger or higher-ESR capacitors-reduces BOM count and board area in portable designs |
| Adaptive ground current | Reduces IQ to 55 µA/channel at light load while preserving fast transient response-extends battery life in standby modes |
| Robust protection suite | Per-channel thermal shutdown (160°C), current limiting (400 mA), and short-circuit immunity-no latch-up or damage under fault conditions |
Applications
| Smartphone Baseband Power | Wireless SoC Dual-Rail Supply |
|---|---|
Use Scenario: Powering application processor core (1.8 V) and I/O interface (3.3 V) in LTE/5G smartphones with strict noise and sequencing requirements. IC Role / Device Role / Timing Role: Dual-rail LDO providing isolated, low-noise, sequenced voltage domains with independent enable control for boot and sleep states. Use Value: Enables simultaneous 1.8 V core and 3.3 V peripheral regulation without cross-rail interference-meets RF coexistence specs (e.g., <100 µV ripple on 1.8 V rail). | Use Scenario: Supplying 3.3 V analog front-end and 1.8 V digital baseband of Bluetooth/ZigBee SoCs in wearables and IoT sensors. IC Role / Device Role / Timing Role: Low-PSRR, low-IQ dual LDO delivering clean power to mixed-signal blocks while minimizing quiescent drain during BLE advertising intervals. Use Value: 75 dB PSRR at 1 kHz rejects switching noise from adjacent DC-DC converters-preserves ADC SNR and RF receiver sensitivity. |
| Tablet Application Processor Core | Portable Medical Sensor Hub |
Use Scenario: Regulating 3.3 V display interface and 1.8 V memory I/O in Android tablets where thermal headroom is limited. IC Role / Device Role / Timing Role: Dual-output LDO with thermal shutdown hysteresis (20°C) preventing oscillation during sustained 300 mA loads on both rails. Use Value: XDFN-8 package with exposed pad dissipates heat efficiently-supports continuous dual-rail operation at 85°C ambient without derating. | Use Scenario: Powering low-power MCU (1.8 V) and analog sensor signal chain (3.3 V) in battery-operated ECG or pulse oximeter modules. IC Role / Device Role / Timing Role: Ultra-low-noise dual LDO ensuring <75 µVRMS noise floor on analog supply-critical for sub-µV bio-potential measurement accuracy. Use Value: No external noise-bypass capacitor required-reduces component count and improves reliability in compact medical PCBs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS7A202818DSQR | 300 mA dual LDO with 3.3 V/1.8 V fixed outputs; lower PSRR (65 dB @ 1 kHz); no active discharge | Lacks fast rail discharge-unsuitable for systems requiring rapid power-down sequencing | Select when PSRR >70 dB is not required and active discharge is unnecessary |
| MCP1826S-33018S/DB | 300 mA dual LDO; 3.3 V/1.8 V outputs; higher dropout (220 mV @ 300 mA for 3.3 V rail); no thermal hysteresis spec | Higher dropout limits use with low VIN headroom (e.g., single-cell Li-ion); less robust thermal management | Select for cost-sensitive industrial applications where 160°C thermal shutdown with hysteresis is not critical |
Compared with TPS7A202818DSQR and MCP1826S-33018S/DB, the NCP154MX330180TAG delivers superior RF-grade noise rejection, guaranteed active discharge, and tighter thermal protection-making it optimal for high-integrity portable electronics where rail integrity and fast sequencing are mandatory.
Availability
NCP154MX330180TAG is available at Aetrix Electronics and suitable for smartphone baseband power, wireless SoC dual-rail supply, and portable medical sensor hub applications requiring stable component supply across high-volume production cycles.
Supply support for NCP154MX330180TAG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient silicon solutions for automotive, industrial, cloud, and intelligent power systems.
The NCP154MX330180TAG belongs to onsemi's high-performance LDO portfolio designed specifically for battery-powered RF and mobile applications demanding ultra-low noise, dual-rail flexibility, and robust fault protection.
FAQ
What are the exact output voltages of the NCP154MX330180TAG?
The NCP154MX330180TAG provides fixed, factory-trimmed output voltages of 3.3 V on OUT1 and 1.8 V on OUT2. These values are specified with ±2% accuracy over the full operating temperature range (−40°C to +85°C) for the 3.3 V rail and ±60 mV for the 1.8 V rail, as confirmed in Table 4 of the official datasheet.
Does the NCP154MX330180TAG require external noise-bypass capacitors?
No, the NCP154MX330180TAG does not require external noise-bypass capacitors. Its ultra-low 75 µVRMS output noise (10 Hz–100 kHz) is achieved internally, and the datasheet explicitly states "the device doesn't require any additional noise bypass capacitor to achieve ultra low noise performance"-a key differentiator verified in Figure 27–29.
How does the active discharge function work on the NCP154MX330180TAG?
When either EN1 or EN2 falls below 0.4 V, the corresponding output (OUT1 or OUT2) is disabled and its internal 50 Ω active discharge transistor connects the output to GND. This rapidly discharges the output capacitor-verified in Figure 52–53-with turn-off time dependent on COUT value, ensuring no floating or lingering voltage on powered-down rails.
What is the maximum input voltage the NCP154MX330180TAG can tolerate?
The NCP154MX330180TAG supports an absolute maximum input voltage of 6 V on IN1 or IN2, as stated in Table 2 (Absolute Maximum Ratings). However, the recommended operating input voltage range is 1.9 V to 5.25 V per channel-exceeding 5.25 V may compromise long-term reliability despite surviving short-term overstress.
Can the NCP154MX330180TAG operate with only one channel enabled?
Yes, the NCP154MX330180TAG supports independent channel operation: EN1 controls OUT1 (3.3 V), EN2 controls OUT2 (1.8 V). When one EN pin is held high and the other low, the enabled channel delivers full 300 mA capability while the disabled channel draws only 0.1 µA shutdown current-confirmed in Table 4's "Shutdown current" parameter.
NCP154MX330180TAG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 8-XFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 5.25V
- Voltage - Output (Min/Fixed):
- 1.8V, 3.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.39V @ 300mA, 0.25V @ 300mA
- Current - Output:
- 300mA, 300mA
- Current - Quiescent (Iq):
- 100 µA
- Current - Supply (Max):
- 200 µA
- PSRR:
- 75dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-XDFN (1.6x1.2)
NCP154MX330180TAG FAQ
1.How can I place an order for NCP154MX330180TAG through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP154MX330180TAG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP154MX330180TAG reliable?
The price and inventory of NCP154MX330180TAG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP154MX330180TAG is usually 5 days.
3.What payment methods are accepted for NCP154MX330180TAG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP154MX330180TAG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP154MX330180TAG?
NCP154MX330180TAG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP154MX330180TAG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP154MX330180TAG?
For technical support, including NCP154MX330180TAG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP154MX330180TAG requirements.
6.How does Aetrix verify that NCP154MX330180TAG is sourced from the original manufacturer or authorized distributors?
All NCP154MX330180TAG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP154MX330180TAG meets industry standards.
7.What is the process for return or replacement of NCP154MX330180TAG?
All NCP154MX330180TAG units undergo pre-shipment inspection (PSI). If there is an issue with NCP154MX330180TAG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP154MX330180TAG part is unused and in its original packaging.
Return procedure for NCP154MX330180TAG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NCP154MX330180TAG Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

