onsemi NCP186AMX185TAG
- Part No.:
- NCP186AMX185TAG
- Manufacturer:
- onsemi
- Package:
- 8-XFDFN Exposed Pad
- Datasheet:
-
NCP186AMX185TAG.pdf
- Description:
- IC REG LINEAR 1.85V 1A 8XDFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,793
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Product details
Overview
NCP186AMX185TAG from onsemi is a 1 A CMOS low-dropout (LDO) regulator with fixed 1.85 V output, optimized for battery-powered portable electronics. It operates from 1.8 V to 5.5 V input, delivers ±1% output accuracy over −40°C to +125°C, features 100 mV typical dropout at 1 A (VOUT = 3.0 V), and supports stable operation with only 1 µF ceramic output capacitance. It is used in image sensor power rails where low noise and fast transient response are critical.
For engineers reviewing the NCP186AMX185TAG datasheet, pinout, applications, or equivalent options, key selection criteria include its 1.85 V fixed output, XDFN8 1.2×1.6 mm package with exposed pad, active discharge function (A-version), 48 µVRMS output noise, and thermal shutdown at 165°C - all verified per onsemi's NCP186/D Rev. 7 datasheet.
Technical Context
The NCP186AMX185TAG implements a PMOS pass transistor architecture enabling ultra-low dropout and inherent reverse-current blocking. Its adaptive ground current design achieves 90 µA typical quiescent current at no load while maintaining 1 A output capability and 75 dB PSRR at 1 kHz.
Internal circuitry includes a 0.7 V precision reference, soft-start circuitry suppressing inrush current, and integrated thermal shutdown with 20°C hysteresis. The device is configured as a fixed-output variant (1.85 V) in the A-series, meaning it includes an active output discharge path (34 Ω typical) when disabled via the EN pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.85 V ±1% over −40°C to +125°C - ensures stable bias for 1.8 V domain logic and image sensors without external feedback components. |
| Max Output Current | 1 A continuous - sufficient to power high-current analog front-ends in camera modules and SoC I/O domains. |
| Dropout Voltage | 170 mV typical at 1 A, VOUT = 1.85 V - enables regulation from Li-ion battery voltages down to ~2.0 V under full load. |
| Quiescent Current | 90 µA typical at no load - minimizes standby power loss in always-on imaging subsystems. |
| Output Noise | 48 µVRMS (10 Hz–100 kHz) - low enough to avoid introducing visible noise in high-resolution image sensor outputs. |
| PSRR | 75 dB at 1 kHz - suppresses switching noise from adjacent DC-DC converters feeding the LDO input. |
| Thermal Shutdown | 165°C activation with 20°C hysteresis - protects against sustained overload or poor PCB thermal design without nuisance tripping. |
Pinout & Package
XDFN8 1.2 mm × 1.6 mm, 0.4 mm pitch, thermally enhanced package with exposed pad (EPAD). Recommended soldering to GND plane for optimal thermal performance (θJA = 111°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2 | OUT | LDO regulated output - dual pins reduce IR drop and improve current handling for 1 A loads. |
| 3 | N/C | No internal connection - may be tied to GND plane to enhance thermal dissipation; not electrically functional. |
| 4 | FB/ADJ | Feedback input - internally connected to 1.85 V reference; left unconnected in fixed-output configuration. |
| 5 | GND | Power ground return - primary reference for regulation and protection circuits; must be low-impedance. |
| 6 | EN | Enable control input - active-high (VENH = 1.0 V min); asserts soft-start and activates output discharge when pulled low. |
| 7, 8 | IN | Input supply pin - dual pins minimize trace resistance and inductance from input capacitor to pass element. |
| EPAD | Thermal Pad | Exposed copper pad - must be soldered to GND plane for thermal management; improves θJA by up to 40%. |
Key Features
| Feature | Design Value |
|---|---|
| Fast transient response | Stabilizes within microseconds after 100 mA–1 A load steps - prevents voltage droop during image sensor pixel readout bursts. |
| Active output discharge | 34 Ω typical discharge path (NCP186A) - safely drains 1.85 V rail within milliseconds after disable, preventing back-powering of upstream circuitry. |
| Stable with 1 µF ceramic output cap | Eliminates need for larger, higher-ESR tantalum capacitors - reduces BOM count and PCB area in space-constrained camera modules. |
| Low-noise regulation | 48 µVRMS integrated noise - avoids corruption of analog video signals and ADC reference stability in imaging pipelines. |
| Over-current & thermal protection | Internally limits output to 1.4 A and shuts down at 165°C - enables robust operation without external current-sense or thermal monitoring. |
Applications
| Mobile Camera Modules | Portable Medical Imaging Sensors |
|---|---|
|
Use Scenario: Powering CIS (CMOS Image Sensor) analog core and PLL clock circuitry in smartphones and tablets. IC Role / Device Role / Timing Role: Primary 1.85 V analog rail LDO delivering clean, low-noise bias independent of noisy system DC-DC supplies. Use Value: Prevents fixed-pattern noise and temporal noise in captured images by maintaining <±1% output accuracy and 48 µVRMS noise under dynamic load. |
Use Scenario: Supplying low-power ultrasound transducer interface ASICs in handheld diagnostic devices. IC Role / Device Role / Timing Role: Stable 1.85 V bias source for precision analog front-end amplifiers and ADC reference buffers. Use Value: Enables >70 dB SNR in analog signal chain by rejecting switching noise from battery-fed buck converters via 75 dB PSRR at 1 kHz. |
| Wearable Biometric Sensors | Industrial IoT Edge Nodes |
|
Use Scenario: Regulating power for optical heart-rate monitor (PPG) analog signal chains in smartwatches. IC Role / Device Role / Timing Role: Low-quiescent (90 µA) LDO supplying photodiode amplifier and transimpedance stage. Use Value: Extends battery life beyond 7 days while maintaining sub-mV load regulation (±5 mV) across 10 µA–1 A operating range. |
Use Scenario: Providing regulated 1.85 V supply to FPGA I/O banks and sensor interface microcontrollers in remote condition-monitoring nodes. IC Role / Device Role / Timing Role: Robust, thermally protected local regulator tolerant of wide ambient temperature swings (−40°C to +125°C). Use Value: Ensures uninterrupted operation during thermal stress events via 165°C shutdown with 20°C hysteresis and 111°C/W θJA in compact XDFN8 package. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS7A20185PDBVR | 1.85 V fixed, 300 mA max, 65 µA IQ, no active discharge, DSBGA package (0.88×0.88 mm) | Lower current rating and no discharge function - unsuitable for 1 A camera sensor rails requiring fast rail collapse. | Select NCP186AMX185TAG when ≥1 A output, active discharge, or XDFN8 thermal performance is required. |
| NCP186BMX185TAG | Identical specs except lacks output discharge transistor - standby current remains ~100 nA, but VOUT decays slowly via external load. | Acceptable where controlled discharge is unnecessary (e.g., non-critical logic rails), but risks back-powering in multi-rail systems. | Choose NCP186AMX185TAG over BMX version when fast, guaranteed output discharge is mandatory for system-level safety or sequencing. |
Compared with TPS7A20185PDBVR, NCP186AMX185TAG delivers 3.3× higher output current and integrated discharge, making it suitable for demanding imaging rails; versus NCP186BMX185TAG, it adds deterministic discharge behavior critical for reliable power sequencing in multi-voltage systems.
Availability
NCP186AMX185TAG is available at Aetrix Electronics and suitable for mobile camera modules, portable medical imaging sensors, wearable biometric monitors, and industrial IoT edge nodes requiring stable component supply with guaranteed long-term availability.
Supply support for NCP186AMX185TAG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensor, and connectivity solutions for automotive, industrial, cloud, and consumer markets.
The NCP186 series was designed specifically for high-performance, low-noise power delivery in portable imaging and battery-powered applications - emphasizing fast transient response, minimal footprint, and robust protection in ultra-thin form factors.
FAQ
What is the output voltage tolerance of the NCP186AMX185TAG over temperature?
The NCP186AMX185TAG maintains ±1% output voltage accuracy across −40°C to +85°C ambient temperature, and ±2.5% for VOUT_NOM < 1.2 V or ±2.0% for VOUT_NOM ≥ 1.2 V over −40°C to +125°C. This is specified in Table 4 of the onsemi NCP186/D datasheet Rev. 7 and verified by production testing at TA = 25°C with design guarantee over full range.
Does the NCP186AMX185TAG require an external resistor divider for 1.85 V output?
No. The NCP186AMX185TAG is a fixed-output variant - its 1.85 V nominal voltage is factory-trimmed and does not require external resistors. The FB/ADJ pin is internally connected to the reference and should be left unconnected or tied directly to OUT in this configuration, as confirmed in the Ordering Information table and Figure 1 of the datasheet.
What is the thermal resistance (θJA) of the NCP186AMX185TAG in its XDFN8 package?
The NCP186AMX185TAG in XDFN8 1.2×1.6 mm package has a junction-to-ambient thermal resistance (θJA) of 111°C/W when mounted on a standard JEDEC test board per JESD51-7. This value assumes proper thermal design including EPAD soldered to a GND plane; adding copper area reduces θJA, as shown in Figure 34 of the datasheet.
How does the enable (EN) pin behave during power-down of the NCP186AMX185TAG?
When the EN pin voltage falls below 0.4 V, the NCP186AMX185TAG disables the pass transistor and activates its internal 34 Ω output discharge path (A-version feature), pulling VOUT to GND rapidly. This behavior is explicitly defined in the Enable Operation section and Table 4 (Output Discharge Resistance), distinguishing it from the B-version which lacks discharge.
Can the NCP186AMX185TAG operate with input voltage below 1.85 V?
No. The NCP186AMX185TAG requires minimum input voltage of 1.8 V per Absolute Maximum Ratings and Electrical Characteristics tables. However, to maintain regulation at 1.85 V output, VIN must exceed VOUT by at least the dropout voltage - e.g., ≥2.02 V at 1 A load (170 mV typical dropout). Operation below this margin results in unregulated, drooping output.
NCP186AMX185TAG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 8-XFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.85V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.28V @ 1A
- Current - Output:
- 1A
- Current - Quiescent (Iq):
- 140 µA
- Current - Supply (Max):
- -
- PSRR:
- 75dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Soft Start
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-XDFN (1.6x1.2)
NCP186AMX185TAG FAQ
1.How can I place an order for NCP186AMX185TAG through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP186AMX185TAG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP186AMX185TAG reliable?
The price and inventory of NCP186AMX185TAG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP186AMX185TAG is usually 5 days.
3.What payment methods are accepted for NCP186AMX185TAG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP186AMX185TAG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP186AMX185TAG?
NCP186AMX185TAG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP186AMX185TAG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP186AMX185TAG?
For technical support, including NCP186AMX185TAG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP186AMX185TAG requirements.
6.How does Aetrix verify that NCP186AMX185TAG is sourced from the original manufacturer or authorized distributors?
All NCP186AMX185TAG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP186AMX185TAG meets industry standards.
7.What is the process for return or replacement of NCP186AMX185TAG?
All NCP186AMX185TAG units undergo pre-shipment inspection (PSI). If there is an issue with NCP186AMX185TAG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP186AMX185TAG part is unused and in its original packaging.
Return procedure for NCP186AMX185TAG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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