onsemi NCP3335AMN300R2G
- Part No.:
- NCP3335AMN300R2G
- Manufacturer:
- onsemi
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
NCP3335AMN300R2G.pdf
- Description:
- IC REG LINEAR 3V 500MA 10DFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,000
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Product details
Overview
NCP3335AMN300R2G from onsemi is a 3.0 V fixed-output, 500 mA ultra-high-accuracy low-dropout regulator with ±0.9% output voltage accuracy at 25 °C, 260 mV typical dropout at full load, and ultra-low 37 µVRMS output noise (with 10 nF CNR). It operates from 2.6 V to 12 V input, requires only 1.0 µF output capacitance for stability, and supports reverse bias protection up to 7 V - ideal for powering DSPs, camera modules, and DSL modem core supplies.
For engineers reviewing the NCP3335AMN300R2G datasheet, pinout, applications, or equivalent options, this page delivers verified package mapping (DFN10), validated thermal performance (θJA = 66 °C/W on 1-pad board), confirmed shutdown threshold (2.0 V ON / 0.4 V OFF), and real-world stability behavior with MLCC capacitors - all critical for low-noise, high-reliability embedded power design.
Technical Context
The NCP3335AMN300R2G employs a PMOS pass transistor architecture enabling true zero-load-current stability and no minimum output current requirement. Its integrated noise reduction (NR) pin accepts an external 10 nF capacitor to suppress broadband output noise by up to 32 µVRMS, while the sense (SENSE) pin enables remote voltage sensing for improved load regulation in distributed PCB layouts.
Reverse bias protection is implemented via internal circuitry that limits reverse current to ≤10 µA when VOUT − VIN ≤ 7 V, eliminating external diode requirements. Thermal shutdown activates at 160 °C, and current limiting ensures safe operation during short-circuit events without latch-up.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 3.0 V ±0.9% at 25 °C; ±1.4% over 0–85 °C - enables precise core rail generation for 3.0 V logic and analog subsystems. |
| Max Output Current | 500 mA continuous; 800 mA peak - supports burst-mode loads like image sensors and RF transceivers without derating. |
| Dropout Voltage | 340 mV at 500 mA (typical); 110 mV at 50 mA - allows operation down to VIN = 3.34 V for 3.0 V output, maximizing battery runtime. |
| Output Noise | 37 µVRMS (10 Hz–100 kHz, with 10 nF CNR) - meets stringent noise budgets for ADC reference supplies and RF LNA biasing. |
| Quiescent Current | 9.0 mA in regulation (500 mA load); 0.07 µA in shutdown - extends standby time in always-on IoT endpoints. |
| Input Voltage Range | 2.6 V to 12 V - compatible with single-cell Li-ion (3.0–4.2 V), USB 5 V, and industrial 9–12 V rails. |
| Stability Requirement | Stable with ≥1.0 µF output capacitance of any type (MLCC, tantalum, aluminum) - eliminates ESR constraints and simplifies BOM. |
Pinout & Package
Package: DFN10 (MN suffix), 3 mm × 3 mm, 0.5 mm pitch, exposed thermal pad (EPAD) - optimized for high-power density and thermal dissipation in space-constrained consumer electronics.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2 | Vout | Regulated 3.0 V output; must be bypassed to GND with ≥1.0 µF capacitor - primary power delivery node for downstream ICs. |
| 3 | SENSE | Remote output voltage sensing point - connects directly to load-side Vout to compensate for PCB trace IR drop. |
| 4 | GND | Power ground reference; EPAD must be soldered to PCB ground plane for thermal and electrical integrity. |
| 5, 6 | NC | No-connect pins - left unconnected per datasheet; no internal function or routing. |
| 7 | NR | Noise reduction input - accepts 10 nF capacitor to ground to reduce output noise by >30% across 10 Hz–100 kHz band. |
| 8 | SD | Active-low shutdown control - driven low (<0.4 V) to disable regulator; pulled high (>2.0 V) to enable operation. |
| 9, 10 | Vin | Input supply (2.6–12 V); decoupled with ≥1.0 µF capacitor near pin - feeds internal PMOS pass element and bias circuitry. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-high accuracy | ±0.9% output voltage tolerance at 25 °C - reduces need for post-regulation trimming in precision analog systems. |
| No minimum load requirement | Stable down to 0 mA output current - eliminates wasteful bleed resistors in low-power sleep modes. |
| Reverse bias protection | Blocks >99.9% reverse current when VOUT − VIN ≤ 7 V - prevents backfeed damage in multi-rail systems with staggered power sequencing. |
| Low-noise architecture | 37 µVRMS noise with CNR; 58 µVRMS without - enables clean power for 12-bit+ ADCs and low-phase-noise PLLs. |
| Thermal robustness | 160 °C junction thermal shutdown + 66 °C/W θJA (1-pad board) - sustains 500 mA output in compact 3×3 mm footprint without forced air. |
Applications
| Camera Module Power | DSP Core Supply |
|---|---|
|
Use Scenario: Powers image sensor and ISP in smartphone front/rear cameras where burst-mode current draw and low noise are critical. IC Role / Device Role / Timing Role: Primary 3.0 V core regulator delivering stable, low-noise voltage to CMOS sensor analog front-end and digital processing block. Use Value: 340 mV dropout enables operation from partially discharged 3.7 V Li-ion; 37 µVRMS noise prevents image banding and color artifacts. |
Use Scenario: Supplies 3.0 V core rail to digital signal processors in DSL modems and audio codecs requiring tight voltage tolerance. IC Role / Device Role / Timing Role: High-accuracy LDO providing regulated power to DSP I/O and memory interfaces during variable computational load. Use Value: ±0.9% accuracy maintains timing margins across temperature; SENSE pin compensates for 50 mΩ PCB trace resistance. |
| Portable Display Backlight Driver | Set-Top Box USB Peripheral Rail |
|
Use Scenario: Generates 3.0 V bias for LED driver ICs in portable LCD displays with dynamic brightness control. IC Role / Device Role / Timing Role: Low-noise, fast-transient LDO supplying gate drive and logic circuits in boost-based backlight controllers. Use Value: 800 mA peak current handles PWM dimming transients; NR pin suppresses switching noise coupling into display video path. |
Use Scenario: Provides isolated 3.0 V rail for USB 2.0 PHY, hub controllers, and OTG peripherals in cable set-top boxes. IC Role / Device Role / Timing Role: Standby-capable LDO enabling USB device enumeration and suspend/resume with <0.1 µA quiescent current. Use Value: SD pin allows software-controlled rail shutdown; reverse bias protection prevents backfeed from hot-plugged USB devices. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Torex XC6210B302MR-G | 3.0 V fixed, 500 mA, ±2% accuracy, 250 mV dropout, no NR or SENSE pins | Lacks remote sensing and noise reduction; higher output tolerance impacts precision analog stages | Lower-cost option where ±2% accuracy and basic LDO functionality suffice; not suitable for noise-sensitive imaging rails |
| Diodes Inc. AP7361-30SG-7 | 3.0 V fixed, 600 mA, ±2% accuracy, 300 mV dropout, no reverse bias protection | Higher max current but no reverse bias blocking - requires external diode in multi-source systems | Better for higher-current loads with relaxed accuracy; adds BOM cost/complexity if reverse protection needed |
Compared with XC6210B302MR-G and AP7361-30SG-7, the NCP3335AMN300R2G delivers superior accuracy (±0.9% vs. ±2%), integrated reverse bias protection (eliminating external diodes), and dedicated NR/SENSE pins - making it the preferred choice for high-fidelity portable power where noise, sequencing, and precision are non-negotiable.
Availability
NCP3335AMN300R2G is available at Aetrix Electronics and suitable for camera modules, DSL modems, and portable displays requiring stable component supply, long-term lifecycle support, and guaranteed Pb-free compliance.
Supply support for NCP3335AMN300R2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor leader focused on energy-efficient innovation for automotive, industrial, cloud, and intelligent edge applications.
The NCP3335A series was designed specifically for ultra-low-noise, high-accuracy power delivery in battery-powered consumer electronics - emphasizing zero-load stability, minimal external components, and robust protection features.
FAQ
What is the maximum input voltage rating for the NCP3335AMN300R2G?
The NCP3335AMN300R2G has an absolute maximum input voltage rating of +16 V, though its recommended operating range is 2.6 V to 12 V. Operation above 12 V is permissible only under transient conditions and must remain within the −0.3 V to +16 V limit specified in the Absolute Maximum Ratings table to avoid permanent damage.
Does the NCP3335AMN300R2G require an external capacitor on the NR pin?
The NR pin on the NCP3335AMN300R2G is optional: a 10 nF capacitor to ground reduces output noise from 58 µVRMS to 37 µVRMS. If lowest noise is not required, the NR pin may be left floating or tied to GND - no external capacitor is mandatory for basic operation or stability.
Can the NCP3335AMN300R2G be used with ceramic output capacitors?
Yes - the NCP3335AMN300R2G is explicitly characterized and guaranteed stable with any capacitor type, including X5R/X7R MLCCs as small as 1.0 µF. No ESR requirements or damping networks are needed, simplifying layout and reducing BOM count.
What is the shutdown current consumption of the NCP3335AMN300R2G?
In shutdown mode (SD pin held ≤0.4 V), the NCP3335AMN300R2G draws only 0.07 µA typical - verified across temperature and process corners. This ultra-low shutdown current makes it suitable for battery-backed systems requiring multi-year shelf life and rapid wake-up capability.
How does reverse bias protection work on the NCP3335AMN300R2G?
When Vin = 0 V and Vout is forced to 3.0 V (e.g., by a large output capacitor), the NCP3335AMN300R2G limits reverse current to ≤10 µA as long as Vout − Vin ≤ 7 V. This internal protection eliminates the need for an external blocking diode in systems with multiple power sources or hot-swap scenarios.
NCP3335AMN300R2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 16V
- Voltage - Output (Min/Fixed):
- 3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.34V @ 500mA
- Current - Output:
- 500mA
- Current - Quiescent (Iq):
- 190 µA
- Current - Supply (Max):
- 14 mA
- PSRR:
- -
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
NCP3335AMN300R2G FAQ
1.How can I place an order for NCP3335AMN300R2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP3335AMN300R2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP3335AMN300R2G reliable?
The price and inventory of NCP3335AMN300R2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP3335AMN300R2G is usually 5 days.
3.What payment methods are accepted for NCP3335AMN300R2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP3335AMN300R2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP3335AMN300R2G?
NCP3335AMN300R2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP3335AMN300R2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP3335AMN300R2G?
For technical support, including NCP3335AMN300R2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP3335AMN300R2G requirements.
6.How does Aetrix verify that NCP3335AMN300R2G is sourced from the original manufacturer or authorized distributors?
All NCP3335AMN300R2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP3335AMN300R2G meets industry standards.
7.What is the process for return or replacement of NCP3335AMN300R2G?
All NCP3335AMN300R2G units undergo pre-shipment inspection (PSI). If there is an issue with NCP3335AMN300R2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP3335AMN300R2G part is unused and in its original packaging.
Return procedure for NCP3335AMN300R2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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