onsemi NCP3335DMR2330G
- Part No.:
- NCP3335DMR2330G
- Manufacturer:
- onsemi
- Package:
- -
- Datasheet:
-
NCP3335DMR2330G.pdf
- Description:
- IC REG LINEAR FIXED LDO REG
- Quantity:
- Payment:

- Shipping:

Inventory:9,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NCP3335DMR2330G from onsemi is a 3.3 V, ±0.9% accurate, 500 mA ultra-low-noise low-dropout regulator in Micro8 package, featuring 260 mV typical dropout at full load, 35 µVRMS noise with 10 nF NR capacitor, and stability with 1.0 µF MLCC output capacitance - deployed in DSL modems, display power rails, and DSP supply domains.
For engineers reviewing the NCP3335DMR2330G datasheet, pinout, applications, or equivalent options, key selection criteria include output accuracy over −40°C to +150°C, shutdown current ≤0.07 µA, no minimum load requirement, and compatibility with ceramic capacitors without ESR constraints.
Technical Context
The NCP3335DMR2330G uses a PMOS pass transistor architecture enabling ultra-low dropout (340 mV max at 500 mA) and zero minimum load current for stability. Its internal reference and error amplifier deliver ±0.9% initial accuracy at 25°C and ±1.5% over full temperature range (−40°C to +150°C).
It integrates dedicated SENSE and NR (Noise Reduction) pins: SENSE enables remote voltage sensing for improved load regulation, while NR accepts an external 10 nF capacitor to reduce output noise from 69 µVRMS to 46 µVRMS across 10 Hz–100 kHz bandwidth.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | 3.3 V nominal, ±0.9% accuracy at 25°C - ensures tight regulation for sensitive 3.3 V logic and interface rails. |
| Max Output Current | 500 mA continuous - supports mid-power digital ICs including DSPs and network PHYs. |
| Dropout Voltage | 340 mV max at 500 mA - enables operation from 3.7 V input down to 3.3 V output with margin. |
| Ground Current | 9.0 mA at 500 mA load - minimizes wasted power in battery-backed or energy-sensitive systems. |
| Output Noise | 46 µVRMS (with 10 nF NR cap), 69 µVRMS (no NR) - meets low-noise analog/RF supply requirements. |
| Shutdown Current | 0.07 µA - preserves battery life during system sleep modes. |
| Stability | Guaranteed stable with ≥1.0 µF ceramic (MLCC) output capacitor - eliminates need for tantalum or aluminum electrolytic. |
Pinout & Package
Package: Micro8 (Case 846A-02), 3.0 mm × 3.0 mm, exposed pad, Pb-free, RoHS-compliant surface-mount package.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2 | Vout | Regulated 3.3 V output; connect to 1.0 µF MLCC bypass capacitor to GND. |
| 3 | SENSE | Remote sense input; tie directly to Vout pins for improved load regulation accuracy. |
| 4 | GND | Power ground reference; connect to PCB ground plane under exposed thermal pad. |
| 5 | NR | Noise reduction node; connect 10 nF capacitor to GND to lower output noise by ~33%. |
| 6 | SD | Active-high shutdown control; drive ≥2.0 V to enable, ≤0.4 V to disable regulator output. |
| 7, 8 | Vin | Input supply (2.6 V to 12 V); requires local 1.0 µF ceramic decoupling capacitor. |
Key Features
| Feature | Design Value |
|---|---|
| No minimum load requirement | Stable down to 0 mA output - eliminates dummy load resistors in standby operation. |
| Capacitor flexibility | Works with any capacitor type (MLCC, tantalum, electrolytic) ≥1.0 µF - simplifies BOM and layout. |
| Thermal shutdown | Activates at 160°C junction temperature - protects against sustained overload or poor heatsinking. |
| Current limiting | Peak current limit ≥800 mA (typical), short-circuit current ≥900 mA - prevents damage during fault conditions. |
| Pb-free & RoHS | Micro8 package complies with JEDEC J-STD-020 moisture sensitivity level 3 (MSL3) - suitable for standard reflow. |
Applications
| DSL/Cable Modem Power | DSP Core Supply |
|---|---|
Use Scenario: Powers Ethernet PHY, ADSL line driver, and microcontroller in compact broadband modems. IC Role / Device Role / Timing Role: Primary 3.3 V LDO for noise-sensitive analog front-end and digital logic blocks. Use Value: 46 µVRMS noise with NR cap ensures clean supply for high-SNR data conversion and low-bit-error-rate transmission. |
Use Scenario: Supplies core voltage to fixed-point or floating-point DSPs in audio processing or motor control units. IC Role / Device Role / Timing Role: Low-dropout, high-accuracy post-regulator delivering stable 3.3 V from intermediate DC/DC stage. Use Value: ±1.5% output accuracy over −40°C to +150°C maintains timing margin and ADC reference integrity across industrial temperature range. |
| Display Backlight Driver Bias | Set-Top Box SoC I/O Rail |
Use Scenario: Provides bias voltage to LED driver ICs and gamma correction DACs in LCD monitor power modules. IC Role / Device Role / Timing Role: Precision 3.3 V rail for analog video signal conditioning and level-shifting circuits. Use Value: No minimum load requirement allows seamless transition between active display and deep-sleep states without output droop. |
Use Scenario: Powers HDMI transmitter, USB PHY, and memory interface I/O banks in cable set-top boxes. IC Role / Device Role / Timing Role: Dedicated LDO for high-speed digital I/O domains requiring low noise and fast transient response. Use Value: 340 mV max dropout enables use of 3.7 V intermediate bus, preserving headroom for 3.3 V I/O signaling margins. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Torex XC6219B332MR-G | 3.3 V, ±2% accuracy, 300 mA, 250 mV dropout, no SENSE/NR pins, 1 µF min COUT. | Lacks remote sensing and noise reduction capability; lower accuracy limits use in precision analog rails. | Preferred where cost sensitivity outweighs noise/accuracy requirements and board space is constrained. |
| Diodes Inc. AP7361-33SG-7 | 3.3 V, ±2% accuracy, 600 mA, 300 mV dropout, no SENSE/NR, requires 2.2 µF min COUT (X5R). | Higher minimum capacitance and no NR/SENSE reduce design flexibility for low-noise or remote-sense topologies. | Suitable for general-purpose 3.3 V logic rails where ultra-low noise and ±0.9% accuracy are not required. |
Compared with XC6219B332MR-G and AP7361-33SG-7, the NCP3335DMR2330G delivers tighter output accuracy, integrated noise reduction, remote sensing, and guaranteed stability with 1.0 µF MLCC - making it uniquely suited for high-fidelity analog, DSP, and telecom power applications where regulation fidelity and noise performance are critical.
Availability
NCP3335DMR2330G is available at Aetrix Electronics and suitable for DSL modems, display power modules, and DSP supply rails requiring stable component supply, long-term lifecycle support, and Pb-free compliance.
Supply support for NCP3335DMR2330G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient electronics, serving automotive, industrial, cloud, and consumer markets with discrete, analog, and power management solutions.
The NCP3335DMR2330G belongs to onsemi's high-accuracy LDO family designed specifically for noise-sensitive consumer and telecom applications demanding ultra-low quiescent current, minimal dropout, and capacitor-flexible stability.
FAQ
What is the output voltage tolerance of the NCP3335DMR2330G over temperature?
The NCP3335DMR2330G maintains ±1.5% output voltage accuracy across the full operating junction temperature range of −40°C to +150°C. At 25°C, its tolerance tightens to ±0.9%, and at 0°C to +85°C it is ±1.4%. This performance is verified per the Electrical Characteristics table for the 3.3 V version in the official datasheet.
Does the NCP3335DMR2330G require a minimum load current to remain stable?
No, the NCP3335DMR2330G is explicitly guaranteed stable with zero output load current. This eliminates the need for pull-down resistors or dummy loads, reducing power waste and simplifying design in low-power or intermittent-use applications such as modem standby modes.
Can the NCP3335DMR2330G be used with MLCC output capacitors?
Yes - the NCP3335DMR2330G is specified to be stable with any capacitor type ≥1.0 µF, including multilayer ceramic capacitors (MLCCs). Unlike many older LDOs, it imposes no ESR requirements, enabling smaller, cheaper, and more reliable ceramic solutions without series resistors.
What is the purpose of the NR pin on the NCP3335DMR2330G?
Pin 5 (NR) on the NCP3335DMR2330G is the Noise Reduction pin. Connecting a 10 nF capacitor from NR to GND reduces output noise from 69 µVRMS to 46 µVRMS (10 Hz–100 kHz), enhancing power integrity for analog, RF, or high-resolution ADC/DAC circuits powered by the NCP3335DMR2330G.
What shutdown behavior does the NCP3335DMR2330G exhibit?
The NCP3335DMR2330G features an active-high shutdown pin (SD, Pin 6). Driving SD ≥2.0 V enables regulation; pulling SD ≤0.4 V disables output and reduces quiescent current to 0.07 µA. In shutdown, output is high-impedance and Vout drops to near 0 V, with output leakage <1.0 µA.
NCP3335DMR2330G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- *
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Output Configuration:
- -
- Output Type:
- -
- Number of Regulators:
- -
- Voltage - Input (Max):
- -
- Voltage - Output (Min/Fixed):
- -
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- -
- Current - Output:
- -
- Current - Quiescent (Iq):
- -
- Current - Supply (Max):
- -
- PSRR:
- -
- Control Features:
- -
- Protection Features:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
NCP3335DMR2330G FAQ
1.How can I place an order for NCP3335DMR2330G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP3335DMR2330G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP3335DMR2330G reliable?
The price and inventory of NCP3335DMR2330G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP3335DMR2330G is usually 5 days.
3.What payment methods are accepted for NCP3335DMR2330G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP3335DMR2330G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP3335DMR2330G?
NCP3335DMR2330G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP3335DMR2330G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP3335DMR2330G?
For technical support, including NCP3335DMR2330G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP3335DMR2330G requirements.
6.How does Aetrix verify that NCP3335DMR2330G is sourced from the original manufacturer or authorized distributors?
All NCP3335DMR2330G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP3335DMR2330G meets industry standards.
7.What is the process for return or replacement of NCP3335DMR2330G?
All NCP3335DMR2330G units undergo pre-shipment inspection (PSI). If there is an issue with NCP3335DMR2330G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP3335DMR2330G part is unused and in its original packaging.
Return procedure for NCP3335DMR2330G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NCP3335DMR2330G Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

