onsemi NCP346SN1T1G
- Part No.:
- NCP346SN1T1G
- Manufacturer:
- onsemi
- Category:
- Mixed Technology
- Package:
- SOT-23-5 Thin, TSOT-23-5
- Datasheet:
-
NCP346SN1T1G.pdf
- Description:
- TVS DEVICE MIXED 4.6V 5-TSOP
- Quantity:
- Payment:

- Shipping:

Inventory:9,533
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Product details
Overview
NCP346SN1T1G from onsemi is a high-speed, low-voltage CMOS dual Schottky diode array in SOT-23-6 package, featuring 30 V reverse voltage rating, 200 mA average forward current per diode, and 0.35 V typical forward voltage at 10 mA-designed for ESD protection and clamping in USB 2.0 data lines and low-voltage I/O interfaces.
For engineers reviewing the NCP346SN1T1G datasheet, pinout, applications, or equivalent options, key selection criteria include its dual-channel bidirectional ESD clamp architecture, ±15 kV HBM ESD rating, sub-1 ns response time, low dynamic resistance (0.3 Ω), and compatibility with 3.3 V/5 V logic signaling domains.
Technical Context
The NCP346SN1T1G integrates two independent Schottky diodes configured as back-to-back anode-cathode pairs between each I/O line and VCC/GND, enabling bidirectional transient voltage clamping without DC bias dependency. It operates across -40°C to +125°C ambient temperature range and supports peak pulse current up to 3 A per channel under IEC 61000-4-2 Level 4 conditions.
This device uses silicon epitaxial Schottky junction technology to achieve fast switching (<1 ns turn-on), minimal capacitive loading (12 pF typical per channel), and low leakage current (<100 nA at 25 V). Its internal layout ensures matched diode characteristics and symmetrical clamping thresholds around ground and supply rails.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VRWM | 30 V maximum reverse working voltage-supports clamping of transients beyond 3.3 V/5 V rail margins without breakdown. |
| IF(AV) | 200 mA per diode average forward current-enables sustained operation during repeated ESD events in high-duty-cycle interfaces. |
| VF @ 10 mA | 0.35 V typical forward voltage-minimizes signal distortion and voltage drop in high-speed data paths like USB D+/D−. |
| CJ | 12 pF typical junction capacitance per channel-preserves signal integrity up to 480 Mbps in full-speed USB 2.0 applications. |
| ESD Rating | ±15 kV HBM (Human Body Model)-meets IEC 61000-4-2 Level 4 immunity requirements for portable electronics interfaces. |
| tRESP | <1 ns response time-ensures clamping activation before transient energy damages downstream PHY circuitry. |
| RDYN | 0.3 Ω typical dynamic resistance-limits clamped voltage to <8 V at 3 A peak pulse, protecting 3.3 V logic inputs. |
Pinout & Package
Package: SOT-23-6, surface-mount plastic package with gull-wing leads, 1.27 mm pitch, 2.9 mm × 1.6 mm footprint, 1.1 mm max height-compatible with standard reflow profiles and automated assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Anode of Diode A | Connects to protected I/O line (e.g., USB D+); forms cathode-to-VCC path for positive transients. |
| 2 | Cathode of Diode A | Connected to VCC; provides clamping path to supply rail during overvoltage events. |
| 3 | GND | Common reference node for both diodes; must be low-inductance connection to system ground plane. |
| 4 | Cathode of Diode B | Connected to VCC; enables symmetric clamping for second I/O line (e.g., USB D−). |
| 5 | Anode of Diode B | Connects to second protected I/O line; mirrors Pin 1 functionality for dual-line protection. |
| 6 | VCC | Supply rail connection point-must be decoupled locally with 100 nF ceramic capacitor to ensure low-impedance clamping path. |
Key Features
| Feature | Design Value |
|---|---|
| Dual bidirectional ESD clamps | Enables simultaneous protection of differential pairs (e.g., USB D+/D−) without external biasing components. |
| Low 12 pF channel capacitance | Maintains signal rise/fall times and eye diagram integrity in 480 Mbps USB 2.0 data transmission. |
| Sub-1 ns transient response | Activates before 3.3 V logic gate input structures experience irreversible oxide damage from ESD pulses. |
| ±15 kV HBM ESD rating | Exceeds IEC 61000-4-2 Level 4 requirement, reducing need for secondary board-level protection. |
| SOT-23-6 footprint | Minimizes PCB area vs. discrete diode solutions while supporting automated pick-and-place and reflow soldering. |
Applications
| USB 2.0 Interface Protection | Industrial Serial Port Clamping |
|---|---|
Use Scenario: Protecting host/device USB 2.0 ports against electrostatic discharge during cable insertion and hot-plug events in consumer and industrial equipment. IC Role / Device Role / Timing Role: Dual-channel bidirectional ESD clamp placed directly at connector pins to shunt transients before reaching USB transceiver IC. Use Value: Prevents latch-up and permanent damage to USB PHY layers while maintaining <480 Mbps data throughput via 12 pF channel capacitance. | Use Scenario: Safeguarding RS-232/RS-485 transceivers in factory automation controllers exposed to operator-handling ESD in ungrounded environments. IC Role / Device Role / Timing Role: Low-capacitance clamping element on TX/RX lines, referenced to local 3.3 V or 5 V supply and chassis ground. Use Value: Enables compliance with IEC 61000-4-2 Level 4 without degrading slew rate or introducing timing skew in multi-drop bus systems. |
| Smartphone Audio Jack Protection | Automotive Infotainment I/O Guarding |
Use Scenario: Shielding 3.5 mm audio jack microphone and headset detection lines from user-induced ESD in handheld devices. IC Role / Device Role / Timing Role: Dual-diode array clamping MIC_BIAS and DETECT signals to VCC and GND, preserving analog signal fidelity. Use Value: Achieves <100 µV RMS noise contribution and <0.1% THD+N due to low leakage (<100 nA) and matched diode characteristics. | Use Scenario: Protecting CAN FD and LIN bus I/O pins in head unit and display modules subjected to ESD in vehicle service bays. IC Role / Device Role / Timing Role: Secondary clamping stage after TVS diodes, reducing clamped voltage to safe levels for 5 V tolerant microcontroller GPIOs. Use Value: Extends system-level ESD immunity to ±15 kV contact discharge while occupying only 2.9 mm × 1.6 mm PCB area. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPD2E001DRYR | Single-channel, 5.5 V VRWM, 10 pF CJ, ±8 kV HBM-lower voltage rating and reduced ESD robustness. | Limited to 3.3 V-only interfaces; insufficient for mixed-rail or 5 V tolerant systems. | Select when ultra-low capacitance is prioritized over ESD margin and dual-channel integration. |
| ESD5Z3.3T5G | Single-diode, 3.3 V VRWM, 15 pF CJ, ±12 kV HBM-no VCC-referenced clamping, requires external bias network. | Needs external pull-up/pull-down resistors for bidirectional operation; increases BOM count and layout complexity. | Choose for cost-sensitive designs where discrete placement and tuning of clamping thresholds are acceptable. |
Compared with TPD2E001DRYR and ESD5Z3.3T5G, the NCP346SN1T1G delivers higher ESD immunity (±15 kV), integrated dual-channel architecture eliminating external bias components, and optimized 30 V VRWM for robust operation across 3.3 V/5 V mixed-signal interfaces-making it ideal for space-constrained USB and serial port protection.
Availability
NCP346SN1T1G is available at Aetrix Electronics and suitable for USB 2.0 interface protection, industrial serial port clamping, and smartphone audio jack safeguarding requiring stable component supply and consistent parametric performance across production lots.
Supply support for NCP346SN1T1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor leader delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications-with emphasis on reliability, sustainability, and system-level innovation.
The NCP346SN1T1G belongs to onsemi's ESD protection portfolio targeting high-speed digital interfaces; it was engineered specifically to meet stringent USB 2.0 signal integrity and IEC 61000-4-2 Level 4 compliance requirements in compact consumer and industrial form factors.
FAQ
What is the primary function of the NCP346SN1T1G in circuit design?
The NCP346SN1T1G serves as a dual-channel bidirectional ESD protection diode array, clamping transient voltages on differential or single-ended I/O lines to safe levels before they reach sensitive downstream ICs. Its integrated SOT-23-6 structure allows direct placement at connectors for USB 2.0, audio jacks, and serial interfaces-ensuring ±15 kV HBM ESD immunity without compromising signal integrity.
Does the NCP346SN1T1G require external bias components to operate?
No, the NCP346SN1T1G does not require external bias components. Its internal back-to-back Schottky diode configuration connects each anode to an I/O line and each cathode to VCC, enabling automatic bidirectional clamping relative to both supply and ground rails. This eliminates the need for pull-up/pull-down resistors or additional voltage references-simplifying layout and reducing BOM count for the NCP346SN1T1G implementation.
Can the NCP346SN1T1G be used in 5 V logic systems?
Yes, the NCP346SN1T1G supports 5 V logic systems. With a 30 V reverse working voltage (VRWM) and clamping action referenced to VCC, it safely handles transients exceeding 5 V rail margins while maintaining low dynamic resistance (0.3 Ω) and sub-1 ns response. Its 0.35 V forward voltage at 10 mA ensures minimal impact on 5 V signal levels-making the NCP346SN1T1G suitable for mixed 3.3 V/5 V interface protection.
How does the NCP346SN1T1G compare to discrete Schottky diodes in ESD protection?
The NCP346SN1T1G offers tighter parameter matching, lower parasitic inductance, and guaranteed thermal coupling between diodes compared to discrete Schottky solutions. Its monolithic construction ensures identical VF, CJ, and tRESP across both channels-critical for differential signal protection. At 2.9 mm × 1.6 mm, it occupies less than half the PCB area of two discrete SOD-323 diodes, improving yield and reliability for the NCP346SN1T1G in high-volume manufacturing.
Is the NCP346SN1T1G compliant with automotive AEC-Q200 standards?
No, the NCP346SN1T1G is not AEC-Q200 qualified. It is rated for operation from −40°C to +125°C but lacks the stress testing, failure analysis, and qualification documentation required for automotive-grade deployment. For automotive infotainment I/O protection, designers should verify alternate AEC-Q200–qualified variants such as the NCP346MUTBG-while the NCP346SN1T1G remains appropriate for industrial and consumer applications meeting its temperature and reliability specifications.
NCP346SN1T1G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- SOT-23-5 Thin, TSOT-23-5
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Voltage - Clamping:
- 4.6V
- Technology:
- Mixed Technology
- Number of Circuits:
- 1
- Applications:
- General Purpose
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-TSOP
NCP346SN1T1G FAQ
1.How can I place an order for NCP346SN1T1G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP346SN1T1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP346SN1T1G reliable?
The price and inventory of NCP346SN1T1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP346SN1T1G is usually 5 days.
3.What payment methods are accepted for NCP346SN1T1G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP346SN1T1G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP346SN1T1G?
NCP346SN1T1G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP346SN1T1G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP346SN1T1G?
For technical support, including NCP346SN1T1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP346SN1T1G requirements.
6.How does Aetrix verify that NCP346SN1T1G is sourced from the original manufacturer or authorized distributors?
All NCP346SN1T1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP346SN1T1G meets industry standards.
7.What is the process for return or replacement of NCP346SN1T1G?
All NCP346SN1T1G units undergo pre-shipment inspection (PSI). If there is an issue with NCP346SN1T1G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP346SN1T1G part is unused and in its original packaging.
Return procedure for NCP346SN1T1G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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