onsemi NCP3521DMR2G

Overview

NCP3521DMR2G from onsemi is a fixed 1.5 V low-dropout (LDO) regulator controller designed to drive an external NMOS FET for high-current, ultra-low-dropout power regulation. It delivers ±1% output voltage tolerance, supports up to 3 A load current with NTMS4107N, features non-rush startup (NRCS), short-circuit protection, and thermal shutdown-targeting FPGA core supply and LCD TV main rail applications.

For engineers reviewing the NCP3521DMR2G datasheet, pinout, applications, or equivalent options, key selection criteria include its 1.5 V fixed output, Micro8 package with gate/source/drain sensing pins, NRCS-controlled slew rate, VD undervoltage lockout at 0.90–1.20 V, and compatibility with industry-standard NFETs like Si4866DY.

Technical Context

The NCP3521DMR2G implements a precision error amplifier with Kelvin-sense-capable VFB input, enabling tight regulation under dynamic loads. Its VS pin provides programmable pulldown current (1.2 mA active / 220 mA shutdown) for fast transient response and controlled turn-off.

Startup and fault management are handled by integrated timers: a 50 µs power-on reset circuit governs EN-to-G delay and VCC recovery timing, while the NRCS capacitor simultaneously sets soft-start slew rate and short-circuit detection timeout-triggering latch-off when VFB drops below 35% of nominal output.

Key Specifications

Pinout & Package

Package: Micro8 (Case 846A-02), Pb-free, 3.00 mm × 3.00 mm body, 0.65 mm pitch, 1.10 mm max height.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO controller applications.

Compared with Rohm BD3521FVM, NCP3521DMR2G offers higher thermal shutdown threshold and tighter VCC UVLO hysteresis, improving robustness in noisy 5 V environments; versus NCP3520DMR2G, it provides identical control logic scaled to 1.5 V output, enabling platform-level voltage variant flexibility without architectural change.

Availability

NCP3521DMR2G is available at Aetrix Electronics and suitable for FPGA power delivery, LCD TV main rail regulation, and networking ASIC biasing requiring stable component supply, long-term lifecycle support, and Pb-free compliance.

Supply support for NCP3521DMR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient electronics, delivering silicon solutions for automotive, industrial, cloud, and intelligent edge applications.

The NCP3521DMR2G belongs to onsemi's NCP352X family of external-FET LDO controllers, engineered specifically for high-current, low-dropout DC-DC regulation in space-constrained consumer and computing platforms where thermal performance and transient response are critical.

FAQ

What is the primary function of the NRCS pin on the NCP3521DMR2G?

The NRCS pin on the NCP3521DMR2G controls non-rush current during startup by linearly charging an external capacitor to program output voltage slew rate. It also serves as the integrator for short-circuit detection-charging to 1.3 V triggers latch-off when VFB falls below 35% of 1.5 V. This dual use reduces component count while ensuring controlled power-up and reliable fault response in the NCP3521DMR2G.

Can the NCP3521DMR2G operate without an external MOSFET?

No, the NCP3521DMR2G cannot regulate voltage without an external NMOS FET. It is a controller-not a complete LDO-and relies on the external FET (e.g., NTMS4107N or Si4866DY) to source load current. The NCP3521DMR2G drives the gate (G pin), senses drain (VD), source (VS), and feedback (VFB) to close the regulation loop. Omitting the FET leaves no power path, rendering the NCP3521DMR2G nonfunctional as a regulator.

What is the minimum input voltage required for the NCP3521DMR2G to regulate 1.5 V output?

The NCP3521DMR2G itself has no fixed dropout voltage-it depends entirely on the selected external NMOS FET. Minimum input is determined by V_OUT + V_GS(th) + I_LOAD × R_DS(on). For example, with NTMS4107N (V_GS(th) = 1.0 V, R_DS(on) = 12 mΩ @ V_GS = 4.5 V), at 3 A load, minimum V_IN ≈ 1.5 V + 1.0 V + 0.036 V = 2.54 V. However, VD UVLO (0.90–1.20 V) must also be satisfied, requiring V_IN > V_OUT + V_{D_UVLO}.

How does the VS pin improve transient response in the NCP3521DMR2G?

The VS pin on the NCP3521DMR2G provides active pulldown current (1.2 mA in run mode, 220 mA in shutdown) directly to the external FET's source node. During load transients, this sinks excess charge to suppress output overshoot at power-up and accelerates voltage collapse during turn-off or thermal fault. Unlike passive RC networks, VS delivers deterministic, current-limited response-critical for protecting sensitive 1.5 V logic in FPGA and ASIC applications using the NCP3521DMR2G.

Is the NCP3521DMR2G RoHS-compliant and halogen-free?

Yes, the NCP3521DMR2G is RoHS-compliant and halogen-free. The "G" suffix in the part number explicitly denotes Pb-free (lead-free) packaging per JEDEC J-STD-609, and onsemi confirms full compliance with EU RoHS Directive 2011/65/EU and JEDEC JS709B halogen-free requirements. The Micro8 package uses matte tin lead finish and green molding compound, verified in onsemi's material declarations for NCP3521DMR2G.