onsemi NCP360SNAIT1G
- Part No.:
- NCP360SNAIT1G
- Manufacturer:
- onsemi
- Category:
- Mixed Technology
- Package:
- SOT-23-5 Thin, TSOT-23-5
- Datasheet:
-
NCP360SNAIT1G.pdf
- Description:
- TVS DEVICE MIXED 7.4V 5-TSOP
- Quantity:
- Payment:

- Shipping:

Inventory:6,439
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Product details
Overview
NCP360SNAIT1G from onsemi is a USB-positive overvoltage protection controller with integrated PMOS FET, 7.2 V overvoltage lockout (OVLO) threshold, 3.0 V undervoltage lockout (UVLO), and open-drain FLAG output for fault indication. It delivers up to 600 mA continuous current, supports 15 kV air-gap ESD protection on IN, and operates across −40 °C to +85 °C ambient for USB-powered mobile peripherals.
For engineers reviewing the NCP360SNAIT1G datasheet, pinout, applications, or equivalent options, key selection criteria include OVLO/UVLO thresholds, internal PMOS RDS(on), thermal shutdown behavior, FLAG timing delay (≤2.0 µs alert), and TSOP-5 package compatibility with space-constrained USB ports.
Technical Context
The NCP360SNAIT1G implements dual-voltage monitoring with independent UVLO (3.0 V typ.) and OVLO (7.2 V typ.) comparators feeding a logic-controlled gate driver for its internal PMOS switch. Fault detection triggers immediate output disconnection (<1.5 µs turn-off time) and pulls the open-drain FLAG low within ≤2.0 µs.
Its EN pin provides system-level enable/disable control independent of voltage thresholds, while thermal shutdown at 150 °C with 30 °C hysteresis ensures safe operation under sustained overload. The device requires no external FET or sense resistors, reducing BOM count and PCB footprint in portable USB applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| OVLO Threshold | 7.2 V typical - sets maximum safe input voltage before disconnecting OUT from IN |
| UVLO Threshold | 3.0 V typical - prevents operation below minimum valid USB supply level |
| Max Continuous Current | 600 mA - defines maximum load current supported without thermal shutdown |
| FLAG Response Delay | ≤2.0 µs - enables fast system-level fault logging or host interrupt assertion |
| ESD Protection (IN) | 15 kV air, 8 kV contact - meets IEC61000-4-2 Level 4 for robust USB port survivability |
| Thermal Shutdown | 150 °C with 30 °C hysteresis - prevents silicon damage during sustained overcurrent or high ambient |
| Supply Quiescent Current | 24–35 µA - minimizes standby power draw in battery-powered devices |
Pinout & Package
Package: TSOP-5 (3.00 × 1.50 × 0.95 mm, 0.95 mm pitch), Pb-free, exposed pad not present in this variant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 IN | Power Input | Connects directly to VBUS; must be decoupled with ≥1 µF low-ESR ceramic capacitor to GND |
| 2 GND | Power Ground | Primary return path for internal PMOS and logic; connects to system ground plane |
| 3 EN | Digital Enable Input | Active-low control: tie to GND for normal operation; high level forces output disconnect regardless of voltage conditions |
| 4 FLAG | Open-Drain Fault Output | Pulled low during OVLO/UVLO fault; requires external pull-up resistor (1 MΩ typical) to system VCC |
| 5 OUT | Protected Power Output | Delivers regulated VBUS to downstream circuitry only when IN is within UVLO–OVLO window |
Key Features
| Feature | Design Value |
|---|---|
| Integrated PMOS FET | Eliminates need for external high-side switch, reducing solution size by >30% and component count by 1 |
| Programmable OVLO/UVLO | Fixed 7.2 V / 3.0 V thresholds optimized for USB 2.0/3.0 compliance and legacy 5 V systems |
| Fast Fault Response | Output disconnect in ≤1.5 µs and FLAG assertion in ≤2.0 µs prevent downstream IC latch-up or damage |
| IEC61000-4-2 Level 4 ESD | 15 kV air, 8 kV contact rating on IN pin enables direct USB port integration without external TVS diodes |
| Thermal Shutdown with Hysteresis | 150 °C trip with 30 °C recovery margin ensures reliable self-protection during transient overloads |
Applications
| USB Mobile Accessories | Portable Audio Devices |
|---|---|
Use Scenario: USB-powered Bluetooth headphones with micro-USB charging port exposed to unregulated wall adapters. IC Role / Device Role / Timing Role: Overvoltage protector placed between micro-USB receptacle and internal LDO/battery charger IC. Use Value: Prevents permanent damage to audio codec and battery management ICs when users connect non-compliant 9 V or 12 V chargers. | Use Scenario: MP3 player with USB OTG capability requiring hot-plug-safe peripheral enumeration. IC Role / Device Role / Timing Role: Input supervisor ensuring VBUS remains within 4.4–5.25 V during host negotiation before enabling USB PHY. Use Value: Guarantees clean power sequencing and avoids enumeration failures caused by noisy or overvoltage VBUS transients. |
| Industrial USB Peripherals | Medical Diagnostic Handhelds |
Use Scenario: USB-connected barcode scanner used in warehouse environments with mixed-power docking stations. IC Role / Device Role / Timing Role: Front-end guard protecting MCU and interface ICs from reverse-polarity or overvoltage events during hot-swap. Use Value: Enables field-replaceable design without service downtime due to damaged USB interface ICs from misconnected supplies. | Use Scenario: Portable ECG monitor with USB data upload function operating in clinical settings where ESD risk is elevated. IC Role / Device Role / Timing Role: ESD-hardened overvoltage clamp on USB D+/D− and VBUS lines prior to isolation barrier. Use Value: Meets IEC61000-4-2 Level 4 immunity requirements without adding discrete TVS arrays, saving board area and cost. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar overvoltage protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TUSB542IRWBR | USB 3.1 Gen 1 redriver with integrated overvoltage protection; 5.5 V OVLO; no FLAG output | Designed for signal integrity enhancement, not standalone power protection | Select when signal equalization is required alongside basic overvoltage clamping |
| TPD3S014TDR | Dedicated USB port protector with 5.7 V OVLO, 1.5 A current rating, and integrated ESD diodes on D+/D− | Includes data-line ESD protection; higher current but fixed 5.7 V OVLO | Select when full USB 2.0 data-line protection and higher current are needed over programmable OVLO |
Compared with TUSB542IRWBR and TPD3S014TDR, the NCP360SNAIT1G offers precise 7.2 V OVLO targeting higher-voltage USB PD accessories, dedicated FLAG signaling for firmware diagnostics, and minimal BOM impact-making it optimal for cost-sensitive, space-constrained USB power rail protection where data-line protection is handled separately.
Availability
NCP360SNAIT1G is available at Aetrix Electronics and suitable for USB mobile accessories, portable audio devices, and industrial USB peripherals requiring stable component supply and long-term lifecycle support.
Supply support for NCP360SNAIT1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (Nasdaq: ON) is a global semiconductor leader delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NCP360SNAIT1G belongs to onsemi's USB protection controller product line, engineered specifically for robust, low-footprint overvoltage and ESD protection in portable USB-powered systems.
FAQ
What is the overvoltage lockout (OVLO) threshold of the NCP360SNAIT1G?
The NCP360SNAIT1G has a nominal overvoltage lockout threshold of 7.2 V, with a guaranteed range of 7.0 V to 7.4 V across temperature and process variation. This value is factory-trimmed and specified in the Electrical Characteristics table of the datasheet. The NCP360SNAIT1G uses this threshold to instantly disconnect the OUT pin from IN when VIN exceeds this limit, protecting downstream circuitry from overvoltage stress.
Does the NCP360SNAIT1G require an external PMOS transistor?
No, the NCP360SNAIT1G integrates a fully characterized PMOS FET capable of delivering up to 600 mA continuous current. Its RDS(on) is optimized to maintain <200 mV dropout at 500 mA, eliminating the need for external switching components. This integration reduces PCB area, simplifies layout, and improves reliability compared to discrete protection solutions using the NCP360SNAIT1G.
How does the FLAG output of the NCP360SNAIT1G behave during fault conditions?
The FLAG output of the NCP360SNAIT1G is an open-drain signal that pulls low within ≤2.0 µs when VIN exceeds the OVLO threshold or falls below the UVLO threshold. It remains low until VIN returns to the valid window and stabilizes. Because it is open-drain, the NCP360SNAIT1G requires an external pull-up resistor (typically 1 MΩ to VCC) to generate a valid logic-high state during normal operation.
What package type is used for the NCP360SNAIT1G?
The NCP360SNAIT1G is packaged in a 5-lead TSOP (Thin Small Outline Package) measuring 3.00 × 1.50 × 0.95 mm with 0.95 mm pitch. This compact, surface-mount package is Pb-free and optimized for automated assembly in high-volume USB peripheral manufacturing. The TSOP-5 footprint is distinct from the UDFN6 variant and does not include an exposed thermal pad.
Is the NCP360SNAIT1G suitable for automotive applications?
The NCP360SNAIT1G is not qualified to AEC-Q100 and is intended for commercial/industrial use. For automotive-grade equivalents, onsemi offers the NCV360 series (e.g., NCV360SNAET1G), which features identical electrical specifications plus AEC-Q100 qualification, extended temperature range, and PPAP documentation. The NCP360SNAIT1G should not be deployed in safety-critical or automotive environments unless validated per customer-specific requirements.
NCP360SNAIT1G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- SOT-23-5 Thin, TSOT-23-5
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Voltage - Clamping:
- 7.4V
- Technology:
- Mixed Technology
- Number of Circuits:
- 1
- Applications:
- USB
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-TSOP
NCP360SNAIT1G FAQ
1.How can I place an order for NCP360SNAIT1G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP360SNAIT1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP360SNAIT1G reliable?
The price and inventory of NCP360SNAIT1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP360SNAIT1G is usually 5 days.
3.What payment methods are accepted for NCP360SNAIT1G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP360SNAIT1G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP360SNAIT1G?
NCP360SNAIT1G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP360SNAIT1G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP360SNAIT1G?
For technical support, including NCP360SNAIT1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP360SNAIT1G requirements.
6.How does Aetrix verify that NCP360SNAIT1G is sourced from the original manufacturer or authorized distributors?
All NCP360SNAIT1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP360SNAIT1G meets industry standards.
7.What is the process for return or replacement of NCP360SNAIT1G?
All NCP360SNAIT1G units undergo pre-shipment inspection (PSI). If there is an issue with NCP360SNAIT1G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP360SNAIT1G part is unused and in its original packaging.
Return procedure for NCP360SNAIT1G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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