onsemi NCP565MN12T2G
- Part No.:
- NCP565MN12T2G
- Manufacturer:
- onsemi
- Package:
- 6-VDFN Exposed Pad
- Datasheet:
-
NCP565MN12T2G.pdf
- Description:
- IC REG LINEAR 1.2V 1.5A 6DFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,029
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NCP565MN12T2G from onsemi is a fixed-output, low-dropout linear regulator delivering 1.5 A at 1.2 V with 0.9 V reference voltage, 0.9 V dropout at full load, and ultra-fast transient response-ideal for post-regulation in ASIC power supplies and server VRMs where tight voltage tolerance and dynamic load stability are critical.
For engineers reviewing the NCP565MN12T2G datasheet, pinout, applications, or equivalent options, key selection criteria include output accuracy (±2% over −10°C to 105°C), thermal shutdown at 160°C, ground current of 1.5 mA at 1.5 A load, ripple rejection of 85 dB at 120 Hz, and compatibility with ceramic/tantalum/aluminum-electrolytic output capacitors down to 1.0 µF.
Technical Context
The NCP565MN12T2G implements a precision bandgap reference (0.9 V ±2%) driving a high-gain error amplifier and low-impedance output stage, enabling stable regulation under rapid load transients. Its internal current-limit circuit triggers at 3.3 A typical and thermal shutdown activates at 160°C junction temperature.
Designed for DFN6 (3×3.3 mm) packaging with exposed thermal pad, the device achieves RJA = 176°C/W and RJP = 37°C/W-requiring PCB copper heat spreading per datasheet guidelines. It operates across −40°C to 125°C ambient and supports input voltages from 2.5 V up to 18 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.2 V ±2% (−10°C to 105°C), ±3% (−40°C to 125°C)-ensures stable core logic supply for FPGAs and microprocessors. |
| Max Output Current | 1.5 A continuous-supports high-current digital loads without external pass devices. |
| Dropout Voltage | 0.9 V at 1.5 A-enables operation from 2.5 V input when regulating 1.2 V, minimizing power loss. |
| Ground Current | 1.5 mA at 1.5 A load-reduces quiescent power consumption in always-on subsystems. |
| Ripple Rejection | 85 dB at 120 Hz-effectively suppresses switching noise from upstream DC/DC converters. |
| Thermal Shutdown | 160°C junction-prevents catastrophic failure during sustained overload or poor heatsinking. |
| Reference Voltage | 0.9 V ±2%-provides accurate feedback for precise output regulation independent of load or line variation. |
Pinout & Package
Package: DFN6 (3 mm × 3.3 mm, 0.95 mm height), thermally enhanced with exposed pad (Tab = Ground). RoHS-compliant, Pb-free (G suffix).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Ground | Power ground reference and primary thermal path via exposed pad-must be soldered to large PCB copper area. |
| 2 | VOUT | Regulated 1.2 V output-connects directly to load with minimal trace inductance for optimal transient response. |
| 3 | VIN | Input supply (2.5–18 V)-requires local 150 µF bypass capacitor placed adjacent to pin. |
| 4 | Ground | Secondary ground connection-ties to same ground plane as Pin 1 to minimize ground loop impedance. |
| 5 | VOUT | Redundant output terminal-parallels Pin 2 to reduce effective output resistance and improve current sharing. |
| 6 | Ground | Third ground terminal-enhances thermal conduction and reduces high-frequency ground impedance. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-fast transient response | Sub-400 ns recovery from 10 mA ↔ 1.5 A load steps-maintains < ±40 mV output deviation in server CPU core rails. |
| Low-noise regulation | 28 µVrms (100 Hz–100 kHz)-minimizes jitter in clock-sensitive analog and RF subsystems. |
| Stability with low-ESR caps | Compatible with 1.0 µF ceramic capacitors (50 mΩ–2.5 Ω ESR)-eliminates need for bulk electrolytics in space-constrained designs. |
| Integrated protection | Current limit (3.3 A typ), thermal shutdown (160°C), and short-circuit robustness-enables unattended operation in industrial controllers. |
| Pb-free DFN6 package | 3×3.3 mm footprint with 0.5 mm pitch-supports automated assembly and high-density PCB layouts in telecom and networking equipment. |
Applications
| ASIC Power Supplies | Server VRM Post-Regulation |
|---|---|
|
Use Scenario: Providing clean, tightly regulated 1.2 V supply to FPGA I/O banks or ASIC core logic after primary buck conversion. IC Role / Device Role / Timing Role: Final-stage LDO delivering low-noise, fast-transient power with ±2% output accuracy across temperature. Use Value: Prevents logic errors during burst-mode processing by maintaining output within 1.176–1.224 V under 1.5 A dynamic loads. |
Use Scenario: Tight-tolerance secondary regulation for CPU memory interfaces (e.g., DDR4 VDDQ) in dual-stage VRM architectures. IC Role / Device Role / Timing Role: Low-dropout post-regulator compensating for upstream converter ripple and load-induced droop. Use Value: Achieves 85 dB ripple rejection at 120 Hz, reducing switching noise coupling into high-speed data lanes. |
| Industrial PLC I/O Modules | Medical Imaging Sensor Bias |
|
Use Scenario: Powering isolated analog front-ends and digital signal processors in programmable logic controllers operating at −40°C to 125°C. IC Role / Device Role / Timing Role: High-reliability LDO with AEC-Q100-aligned thermal shutdown and current limiting. Use Value: Sustains 1.2 V output with ±3% tolerance over full industrial temperature range, ensuring ADC reference stability. |
Use Scenario: Generating ultra-low-noise bias voltage for CMOS image sensor pixel arrays in portable ultrasound systems. IC Role / Device Role / Timing Role: Low-noise linear regulator supplying analog sensor rails where switching noise degrades SNR. Use Value: Delivers 28 µVrms output noise-critical for preserving >70 dB image sensor dynamic range. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar low-dropout linear regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLV73312PDBVR | 1.2 V fixed, 300 mA max, 170 mV dropout at 300 mA, SOT-23-5 package | Lower current capability and higher relative dropout-suitable only for sub-300 mA loads like MCU cores. | Select TLV73312PDBVR only when board space is extremely constrained and load current remains ≤300 mA. |
| TPS7A2012PDQNR | 1.2 V fixed, 300 mA max, 175 mV dropout at 300 mA, DQN (X2SON-4) package, 12 µVrms noise | Superior noise performance but 5× lower current rating-optimized for RF/analog bias, not digital power rails. | Choose TPS7A2012PDQNR for ultra-low-noise analog circuits; NCP565MN12T2G remains preferred for 1.5 A digital loads. |
Compared with TLV73312PDBVR and TPS7A2012PDQNR, the NCP565MN12T2G uniquely delivers 1.5 A output at 1.2 V in a thermally optimized DFN6 package-making it the only viable option among the three for high-current, low-noise post-regulation in servers and ASICs.
Availability
NCP565MN12T2G is available at Aetrix Electronics and suitable for ASIC power supplies, server VRM post-regulation, and industrial PLC I/O modules requiring stable component supply, long-term lifecycle support, and Pb-free compliance.
Supply support for NCP565MN12T2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensors, and connectivity solutions for automotive, industrial, cloud, and medical markets.
The NCP565MN12T2G belongs to onsemi's NCP565 low-dropout linear regulator family-designed specifically for high-current, low-noise post-regulation in demanding digital systems where fast transient response and thermal robustness are essential.
FAQ
What is the maximum input voltage rating for the NCP565MN12T2G?
The NCP565MN12T2G has an absolute maximum input voltage rating of 18 V. Operation above this level risks permanent damage. For reliable continuous use, the recommended operating input range is 2.5 V to 9.0 V-ensuring sufficient headroom above the 1.2 V output while maintaining low dropout performance. The minimum input is defined as VOUT + VDO or 2.5 V, whichever is greater.
Does the NCP565MN12T2G require external capacitors, and what values are recommended?
Yes, the NCP565MN12T2G requires both input and output capacitors for stability and transient performance. A 150 µF OSCON-type input capacitor is recommended, placed directly across VIN and GND pins. For output, the device remains stable with ≥1.0 µF ceramic, tantalum, or aluminum-electrolytic capacitors having ESR between 50 mΩ and 2.5 Ω-though the datasheet optimizes for 150 µF + 10 µF parallel configuration to balance transient response and AC stability.
How does thermal performance differ between the DFN6 package of NCP565MN12T2G and other variants like D2PAK?
The NCP565MN12T2G in DFN6 exhibits RJA = 176°C/W and RJP = 37°C/W (with 50 mm² 1 oz Cu), whereas the D2PAK-5 variant achieves RJC = 3°C/W and RJA = 83°C/W. This means the DFN6 relies more heavily on PCB copper area for heat dissipation, while D2PAK offers superior junction-to-case conduction. For 1.5 A operation at elevated ambient temperatures, the DFN6 version requires careful thermal pad layout per datasheet Figure 25 to avoid exceeding 150°C maximum junction temperature.
Is the NCP565MN12T2G pin-compatible with other NCP565 variants such as adjustable or different voltage versions?
No, the NCP565MN12T2G is not pin-compatible with adjustable versions (e.g., NCP565MNADJT2G) or other fixed-voltage DFN6 variants like NCP565MN15T2G. While all share the same DFN6-6 package outline, pin functions differ: the 1.2 V fixed version uses Pins 1/4/6 as ground, Pin 2/5 as VOUT, and Pin 3 as VIN; adjustable versions repurpose Pin 5 as ADJ. Swapping parts without PCB revision will cause functional failure.
What protection features are integrated into the NCP565MN12T2G?
The NCP565MN12T2G integrates three key protections: current limit (3.3 A typical), thermal shutdown (160°C junction), and short-circuit robustness. These operate independently-current limiting engages first under overload, followed by thermal shutdown if dissipation persists. Unlike some regulators, it does not include reverse-voltage or reverse-current protection, so external diodes may be needed in systems with large output capacitance and risk of input shorting.
NCP565MN12T2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 6-VDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 9V
- Voltage - Output (Min/Fixed):
- 1.2V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- -
- Current - Output:
- 1.5A
- Current - Quiescent (Iq):
- 3 mA
- Current - Supply (Max):
- -
- PSRR:
- 85dB ~ 75db (120Hz ~ 1kHz)
- Control Features:
- -
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-DFN (3x3.3)
NCP565MN12T2G FAQ
1.How can I place an order for NCP565MN12T2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP565MN12T2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP565MN12T2G reliable?
The price and inventory of NCP565MN12T2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP565MN12T2G is usually 5 days.
3.What payment methods are accepted for NCP565MN12T2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP565MN12T2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP565MN12T2G?
NCP565MN12T2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP565MN12T2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP565MN12T2G?
For technical support, including NCP565MN12T2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP565MN12T2G requirements.
6.How does Aetrix verify that NCP565MN12T2G is sourced from the original manufacturer or authorized distributors?
All NCP565MN12T2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP565MN12T2G meets industry standards.
7.What is the process for return or replacement of NCP565MN12T2G?
All NCP565MN12T2G units undergo pre-shipment inspection (PSI). If there is an issue with NCP565MN12T2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP565MN12T2G part is unused and in its original packaging.
Return procedure for NCP565MN12T2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NCP565MN12T2G Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

