onsemi NCP584LSN09T1G
- Part No.:
- NCP584LSN09T1G
- Manufacturer:
- onsemi
- Package:
- SC-74A, SOT-753
- Datasheet:
-
NCP584LSN09T1G.pdf
- Description:
- IC REG LINEAR 0.9V 200MA SOT23-5
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NCP584LSN09T1G from onsemi is a tri-mode CMOS low-dropout (LDO) regulator delivering 200 mA output at 0.9 V with active-low enable, housed in SOT23−5 package. It supports Chip Enable (CE), Fast Transient (FT), and Low Power (LP) modes via the ECO pin, features 400 mV dropout at 200 mA, ±2% output voltage accuracy in CE mode, and 75 dB PSRR at 1 kHz - optimized for portable battery-powered systems requiring ultra-low quiescent current and high ripple rejection.
For engineers reviewing the NCP584LSN09T1G datasheet, pinout, applications, or equivalent options, key selection considerations include its active-low CE logic, tri-mode operation (FT/LP/CE), 0.9 V fixed output, SOT23−5 footprint compatibility, and trade-offs between quiescent current (40 µA FT / 3.5 µA LP) and transient response performance.
Technical Context
The NCP584LSN09T1G implements a CMOS-based LDO architecture with internal bandgap reference, error amplifier, and pass transistor. Its tri-mode control is managed exclusively through the ECO pin: ECO = Vin enables Fast Transient mode (40 µA Iq, 20 mV load regulation); ECO = GND selects Low Power mode (3.5 µA Iq, 10 mV load regulation); CE pin controls on/off state with active-low logic.
It operates across 1.4–6.0 V input range and delivers stable 0.9 V output with ±2% accuracy (±3% in LP mode), 100 ppm/°C temperature drift, and foldback current limiting. The device requires external input (1.0 µF tantalum) and output (≥2.2 µF tantalum or ceramic with ≥40 mΩ ESR in LP mode) decoupling capacitors for stability per application guidelines.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 0.9 V - eliminates external feedback network; supports low-voltage digital core rails (e.g., ARM Cortex-M0+ I/O, sensor ASICs). |
| Max Output Current | 200 mA - sufficient for single-core microcontrollers, Bluetooth LE SoCs, or small display drivers without thermal derating at TA ≤ 85°C. |
| Dropout Voltage | 400 mV at 200 mA - enables operation from single-cell Li-ion (3.0–4.2 V) or two-cell alkaline (2.4–3.2 V) with margin for voltage sag. |
| Quiescent Current | 40 µA (FT mode) / 3.5 µA (LP mode) - extends battery life in always-on sensors or sleep-state peripherals where <10 µA standby is critical. |
| PSRR | 75 dB at 1 kHz - suppresses switching noise from DC-DC converters feeding the LDO input, preserving analog sensor or RF subsystem signal integrity. |
| Accuracy | ±2% (CE mode), ±3% (LP mode) - ensures reliable logic-level compliance for 0.9 V I/O standards (e.g., JEDEC JESD8-12) across temperature and load. |
| Operating Temp | −40°C to +85°C - qualified for industrial-grade portable equipment including handheld test instruments and ruggedized medical monitors. |
Pinout & Package
SOT23−5 package (Case 1212, Pb-free), 2.8 mm × 2.5 mm × 1.3 mm body height, 0.95 mm pin pitch. Thermal pad not present; standard soldering profile applies.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: Vin | Power input supply | Accepts 1.4–6.5 V; requires 1.0 µF tantalum decoupling close to pin to prevent oscillation and improve PSRR. |
| 2: GND | Ground reference | Common return for input/output paths; must be low-impedance plane connection to minimize noise coupling into error amplifier. |
| 3: CE | Active-low chip enable | Pulled low to disable regulator (ISD ≤ 1.0 µA); open or pulled high to enable; compatible with 1.8/3.3 V GPIO without level shift. |
| 4: ECO | Mode selection control | Drives FT mode when tied to Vin (40 µA Iq); LP mode when tied to GND (3.5 µA Iq); no internal pull-up/down - external bias required. |
| 5: Vout | Regulated output | Delivers 0.9 V ±2%; requires ≥2.2 µF output capacitor with ESR ≥40 mΩ in LP mode for stability; ceramic OK with series resistor. |
Key Features
| Feature | Design Value |
|---|---|
| Tri-mode operation (CE/FT/LP) | Enables dynamic power-state tuning: CE for full shutdown, FT for responsive load transients (e.g., MCU wake-up bursts), LP for ultra-low idle current. |
| Low dropout at 200 mA | 400 mV @ 0.9 V output - allows >90% efficiency from 1.3 V input, critical for energy harvesting or coin-cell applications. |
| Ultra-low Iq in LP mode | 3.5 µA @ Vout ≤ 1.5 V - reduces battery drain by >90% vs. FT mode, enabling multi-year operation in IoT endpoint nodes. |
| High PSRR at 1 kHz | 75 dB - rejects noise from adjacent buck converters or clock generators, protecting sensitive analog front-ends (e.g., ADC references). |
| Foldback current limit | 50 mA short-circuit current - limits power dissipation during fault conditions, preventing thermal runaway in compact SOT23−5 layout. |
Applications
| Wearable Health Sensors | Industrial Handheld Scanners |
|---|---|
Use Scenario: Continuous ECG/PPG monitoring powered by CR2032 coin cell with 10-year target lifetime. IC Role / Device Role / Timing Role: Primary 0.9 V supply for ultra-low-power MCU and analog front-end; regulates against battery voltage decay. Use Value: LP mode's 3.5 µA Iq minimizes standby loss; ±2% accuracy ensures consistent ADC reference scaling across battery discharge curve. |
Use Scenario: Rugged barcode scanner with intermittent laser activation and Bluetooth LE data transmission. IC Role / Device Role / Timing Role: Stable 0.9 V rail for image sensor interface and BLE SoC I/O; switches to FT mode during laser pulse. Use Value: 20 mV load regulation in FT mode prevents voltage droop during 150 mA laser driver pulses; 400 mV dropout enables use of 2.4 V alkaline stack. |
| Portable Medical Glucometers | Smart Home Motion Sensors |
Use Scenario: Battery-operated blood glucose meter with LCD display and electrochemical test strip interface. IC Role / Device Role / Timing Role: Supplies 0.9 V to precision op-amps and SAR ADC driving test strip current measurement. Use Value: 100 ppm/°C tempco maintains <0.5% full-scale error over −20°C to +60°C operating range; 75 dB PSRR isolates ADC from display switching noise. |
Use Scenario: Zigbee-enabled PIR motion detector with 5-year battery life requirement using two AA cells. IC Role / Device Role / Timing Role: Powers MCU and RF transceiver in deep-sleep (LP mode) and active (FT mode) states. Use Value: Seamless transition between 3.5 µA LP and 40 µA FT modes eliminates software overhead; SOT23−5 footprint saves PCB area in space-constrained housing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP1700T-0902E/TT | Fixed 0.9 V, 250 mA, 6 µA Iq, no tri-mode; SOT23−3 package (no ECO/CE separation). | Lacks mode-select capability; simpler enable-only control; lower Iq but no FT mode for transient response. | Choose for cost-sensitive, static-power designs where 6 µA Iq suffices and fast load steps are absent. |
| Torex XC6206P092MR-G | Fixed 0.9 V, 150 mA, 1 µA Iq, no ECO pin; SOT23−5 with CE only; lower max current. | No tri-mode operation; optimized purely for ultra-low Iq; unsuitable for >150 mA loads or dynamic current profiles. | Prefer when minimum quiescent current dominates requirements and peak load stays below 150 mA. |
Compared with MCP1700T-0902E/TT and XC6206P092MR-G, the NCP584LSN09T1G uniquely balances ultra-low LP-mode Iq (3.5 µA) with configurable FT-mode performance (40 µA, 20 mV load reg), making it the only option among the three supporting adaptive power-state management in space-constrained portable systems.
Availability
NCP584LSN09T1G is available at Aetrix Electronics and suitable for wearable health sensors, industrial handheld scanners, portable medical glucometers, and smart home motion sensors requiring stable component supply, long-term lifecycle support, and Pb-free compliance.
Supply support for NCP584LSN09T1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient electronics, with leadership in power management, analog, and sensor technologies.
The NCP584LSN09T1G belongs to the NCP584 series of tri-mode LDO regulators designed specifically for portable battery-powered applications demanding precise voltage accuracy, ultra-low quiescent current, and high ripple rejection in minimal footprint.
FAQ
What is the function of the ECO pin on the NCP584LSN09T1G?
The ECO pin on the NCP584LSN09T1G selects between Fast Transient (FT) and Low Power (LP) operating modes: tying ECO to Vin activates FT mode (40 µA Iq, 20 mV load regulation), while connecting ECO to GND enables LP mode (3.5 µA Iq, 10 mV load regulation). The NCP584LSN09T1G does not have internal pull resistors on ECO, so external biasing is mandatory for deterministic mode selection.
Does the NCP584LSN09T1G support adjustable output voltage?
No, the NCP584LSN09T1G provides a fixed 0.9 V output. It is part of the NCP584 series with factory-trimmed voltage options ranging from 0.8 V to 3.3 V in 100 mV increments; no external feedback resistors or adjustment pins are available. For adjustable output, consider other families such as the NCP1117 or NCP103, not the NCP584LSN09T1G.
What is the maximum input voltage rating for the NCP584LSN09T1G?
The absolute maximum input voltage for the NCP584LSN09T1G is 6.5 V, as specified in the Maximum Ratings table. Recommended operating input voltage is 1.4 V to 6.0 V per Electrical Characteristics. Exceeding 6.5 V risks permanent damage; operation above 6.0 V may degrade parametric performance or reliability even if within absolute max limits.
Can the NCP584LSN09T1G be used with ceramic output capacitors?
Yes, the NCP584LSN09T1G supports ceramic output capacitors, but requires careful ESR selection: ≥40 mΩ in LP mode for all output currents, and higher values (e.g., 100–200 mΩ) in FT mode depending on load current (see Figures 32–34). A small series resistor (~1 Ω) is recommended with ceramic caps to ensure stability, unlike tantalum types which inherently provide adequate ESR.
How does the active-low CE pin behave during power-up?
The CE pin on the NCP584LSN09T1G is active-low: the regulator enables only when CE is high (≥1.0 V) and disables when CE is low (≤0.3 V). During power-up, if CE rises after Vin, the device remains off until CE exceeds its high threshold. No power-on reset (POR) circuitry is integrated; external sequencing or RC delay may be needed to coordinate CE assertion with input rail stabilization.
NCP584LSN09T1G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- SC-74A, SOT-753
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 0.9V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.7V @ 200mA
- Current - Output:
- 200mA
- Current - Quiescent (Iq):
- 70 µA
- Current - Supply (Max):
- -
- PSRR:
- 75dB ~ 65dB (120Hz ~ 10kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-5
NCP584LSN09T1G FAQ
1.How can I place an order for NCP584LSN09T1G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP584LSN09T1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP584LSN09T1G reliable?
The price and inventory of NCP584LSN09T1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP584LSN09T1G is usually 5 days.
3.What payment methods are accepted for NCP584LSN09T1G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP584LSN09T1G transactions.
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4.How is shipping managed for NCP584LSN09T1G?
NCP584LSN09T1G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP584LSN09T1G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP584LSN09T1G?
For technical support, including NCP584LSN09T1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP584LSN09T1G requirements.
6.How does Aetrix verify that NCP584LSN09T1G is sourced from the original manufacturer or authorized distributors?
All NCP584LSN09T1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP584LSN09T1G meets industry standards.
7.What is the process for return or replacement of NCP584LSN09T1G?
All NCP584LSN09T1G units undergo pre-shipment inspection (PSI). If there is an issue with NCP584LSN09T1G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP584LSN09T1G part is unused and in its original packaging.
Return procedure for NCP584LSN09T1G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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