onsemi NCP585DSN09T1G
- Part No.:
- NCP585DSN09T1G
- Manufacturer:
- onsemi
- Package:
- SC-74A, SOT-753
- Datasheet:
-
NCP585DSN09T1G.pdf
- Description:
- IC REG LINEAR 0.9V 300MA SOT23-5
- Quantity:
- Payment:

- Shipping:

Inventory:3,780
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Product details
Overview
NCP585DSN09T1G from onsemi is a tri-mode 300 mA CMOS low-dropout regulator with enable and auto-discharge, delivering fixed 0.9 V output in SOT-23-5 package. It supports Chip Enable (CE), Fast Transient (FT), and Low Power (LP) modes via the ECO pin, achieves 550 mV dropout at 300 mA, 2% output accuracy, and 70 dB PSRR at 1 kHz - optimized for portable battery-powered systems requiring ultra-low quiescent current and high ripple rejection.
For engineers reviewing the NCP585DSN09T1G datasheet, pinout, applications, or equivalent options, this page delivers verified technical context, mode-specific performance trade-offs (FT vs. LP), real-world stability boundaries with 1.0 µF output capacitors, and validated alternatives for portable instrumentation, camcorders, and handheld medical devices where supply headroom and standby power are critical.
Technical Context
The NCP585DSN09T1G implements a CMOS-based LDO architecture with three configurable operating modes: CE-active enables regulation; ECO = Vin selects Fast Transient mode (80 µA Iq, 40 mV load regulation); ECO = GND selects Low Power mode (3.5 µA Iq, 15 mV load regulation). Its internal foldback protection and auto-discharge circuit (enabled by active-high CE with discharge path to GND) ensure safe shutdown and rapid output discharge.
It operates across 1.4–6.0 V input range with 0.9 V fixed output, supports up to 300 mA continuous load, and maintains stability with 1.0 µF ceramic or tantalum output capacitors - no unstable region observed in LP mode per Figure 33. The device uses an internal voltage reference with 100 ppm/°C temperature coefficient and achieves 0.01%/V line regulation in FT mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 0.9 V ±2% (FT mode), ±3% (LP mode) - ensures precise rail generation for 0.9 V core logic or RF biasing. |
| Max Output Current | 300 mA - sufficient for single-core microcontrollers, sensors, or low-power DSPs without thermal derating in SOT-23-5. |
| Dropout Voltage | 550 mV @ 300 mA (ECO = Vin) - enables operation from 1.45 V input, critical for single-cell Li-ion or NiMH systems. |
| Quiescent Current | 80 µA (FT mode), 3.5 µA (LP mode) - extends battery life in sleep states while retaining fast wake-up capability. |
| PSRR | 70 dB @ 1 kHz - suppresses switching noise from DC-DC converters feeding the LDO input. |
| Line Regulation | 0.01%/V (FT), 0.05%/V (LP) - minimizes output drift during battery discharge or input ripple. |
| Load Regulation | 40 mV (FT), 15 mV (LP) - maintains tight output under dynamic load steps typical in sensor sampling bursts. |
Pinout & Package
SOT-23-5 package (Case 1212, 2.8 × 2.5 mm footprint, 1.15 mm height), thermally enhanced with exposed pad not present - suitable for space-constrained portable PCBs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - Vin | Power input | Accepts 1.4–6.0 V; requires 1.0 µF ceramic decoupling to GND per layout guidelines. |
| 2 - GND | Ground reference | Common return for input/output paths; must be low-impedance connection to minimize noise coupling. |
| 3 - CE | Chip enable (active-high) | Drives regulator ON/OFF; high-Z when floating; includes auto-discharge path to GND when disabled. |
| 4 - ECO | Mode selection | ECO = Vin → FT mode (fast response); ECO = GND → LP mode (ultra-low Iq); no pull-up/down required. |
| 5 - Vout | Regulated output | Delivers stable 0.9 V; requires 1.0 µF low-ESR capacitor placed adjacent to pin for stability. |
Key Features
| Feature | Design Value |
|---|---|
| Tri-mode operation | Single device supports three distinct power states: CE-controlled ON/OFF, ECO-selectable FT (performance) or LP (efficiency) - eliminates need for external mode-switching logic. |
| Foldback current limiting | 50 mA short-circuit current limit - protects IC and source during output faults without thermal runaway. |
| Auto-discharge function | Active-high CE enables internal discharge path from Vout to GND upon disable - prevents residual voltage hold-up in safety-critical or multi-rail sequencing systems. |
| Ultra-low shutdown current | 0.1 µA max - reduces battery drain to negligible levels during deep sleep, enabling years of shelf life in coin-cell applications. |
| Temperature-stable reference | 100 ppm/°C output drift - maintains accuracy across −40°C to +85°C ambient, critical for outdoor or industrial handhelds. |
Applications
| Portable Medical Sensors | Wearable Biometric Monitors |
|---|---|
Use Scenario: Continuous glucose monitor (CGM) using 0.9 V ADC reference and ultra-low-power MCU. IC Role / Device Role / Timing Role: Primary 0.9 V power rail generator with LP mode engaged during sensor idle cycles. Use Value: 3.5 µA quiescent current extends single CR2032 battery life beyond 12 months while maintaining sub-2% voltage accuracy over temperature. |
Use Scenario: Optical heart-rate sensor module with pulsed LED drive and analog front-end. IC Role / Device Role / Timing Role: Supplies clean 0.9 V to photodiode amplifier and 12-bit SAR ADC during measurement bursts. Use Value: 70 dB PSRR at 1 kHz rejects noise from switching LED driver, preserving SNR in low-light conditions. |
| Industrial Handheld Scanners | Low-Power IoT Edge Nodes |
Use Scenario: Barcode scanner with laser diode, CMOS imager, and BLE radio sharing a single Li-ion cell. IC Role / Device Role / Timing Role: Provides regulated 0.9 V to imager analog core and PLL circuits during active scan. Use Value: 550 mV dropout enables full 300 mA output even as battery discharges to 1.45 V, sustaining image capture fidelity. |
Use Scenario: Environmental sensor node transmitting temperature/humidity data every 5 minutes via LoRaWAN. IC Role / Device Role / Timing Role: Powers 0.9 V RF transceiver and microcontroller in LP mode between transmissions. Use Value: Mode switching via ECO pin allows instantaneous transition from 3.5 µA sleep to 80 µA active state - no wake-up latency penalty. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP1804T-0902E/MB | Fixed 0.9 V, 150 mA, 220 mV dropout @ 150 mA, no tri-mode - only one low-Iq state (1.6 µA). | Limited to lower-current peripherals; lacks FT mode for transient-heavy loads. | Select when cost sensitivity outweighs need for >200 mA or dynamic mode switching. |
| Torex XC6219B092MR-G | Fixed 0.9 V, 300 mA, 250 mV dropout @ 300 mA, 1.0 µA Iq - no ECO pin or tri-mode; single LDO state. | No fast-transient optimization; simpler control but no LP/FT trade-off flexibility. | Choose for minimal BOM count where ultra-low Iq dominates over transient response requirements. |
Compared with MCP1804T-0902E/MB and XC6219B092MR-G, the NCP585DSN09T1G uniquely delivers 300 mA capability with dual low-power optimization paths - enabling designers to tune Iq/load-regulation/PSRR trade-offs per operational phase rather than accepting fixed compromises.
Availability
NCP585DSN09T1G is available at Aetrix Electronics and suitable for portable medical sensors, wearable biometric monitors, industrial handheld scanners, and low-power IoT edge nodes requiring stable component supply across extended production lifecycles.
Supply support for NCP585DSN09T1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient electronics, with leadership in power management, analog, and sensor technologies.
The NCP585DSN09T1G belongs to the NCP585 series of tri-mode LDOs designed specifically for portable battery-powered equipment demanding precision voltage regulation, ultra-low standby current, and adaptive power-state control without external components.
FAQ
What is the maximum input voltage rating for the NCP585DSN09T1G?
The NCP585DSN09T1G has a maximum input voltage rating of 6.5 V, as specified in the Absolute Maximum Ratings table. Operation above this level risks permanent damage. For reliable long-term use, the recommended operating input range is 1.4 V to 6.0 V per electrical characteristics - ensuring optimal dropout behavior and thermal performance in the SOT-23-5 package. The NCP585DSN09T1G must never be subjected to input transients exceeding 6.5 V, even briefly.
How does the ECO pin affect the NCP585DSN09T1G's quiescent current and load regulation?
The ECO pin directly selects between Fast Transient (ECO = Vin) and Low Power (ECO = GND) modes. In FT mode, the NCP585DSN09T1G draws 80 µA quiescent current and delivers 40 mV load regulation across 1–300 mA. In LP mode, it draws only 3.5 µA and achieves 15 mV load regulation across 1–100 mA. These values are measured at 0.9 V output and 25°C, and represent mutually exclusive operating points - the NCP585DSN09T1G cannot simultaneously optimize for both ultra-low Iq and high-load transient response.
Can the NCP585DSN09T1G be used with a 0.47 µF output capacitor?
No - the NCP585DSN09T1G requires a minimum 1.0 µF output capacitor for guaranteed stability, as confirmed in the Application Information section and Figure 32–35. Using 0.47 µF risks oscillation, especially in FT mode and at higher load currents (>100 mA), due to insufficient phase margin. The datasheet explicitly recommends 1.0 µF ceramic or tantalum with low ESR; deviation invalidates the stability guarantee for the NCP585DSN09T1G across its full operating range.
Does the NCP585DSN09T1G support active-low enable functionality?
No - the NCP585DSN09T1G variant with "DSN" in the part number denotes Active-High CE with Auto Discharge, as confirmed in the Ordering Information table (page 11). It features an active-high chip enable pin that activates regulation when pulled high and initiates Vout discharge to GND when pulled low. For active-low enable, designers must select alternate variants such as NCP585LSN09T1G (marked "LSN"), which is a different orderable part with distinct pin behavior and marking code (P09).
What is the thermal performance of the NCP585DSN09T1G in SOT-23-5 at 300 mA output?
At 300 mA output and 0.9 V, the NCP585DSN09T1G dissipates approximately 165 mW (PD = (Vin − 0.9 V) × 0.3 A; assuming Vin = 1.45 V min). With a SOT-23-5 thermal resistance θJA of 320°C/W (typical for this package on 2-layer board), junction temperature rise is ~53°C above ambient. Thus, at 85°C ambient, TJ reaches ~138°C - exceeding the 125°C absolute maximum. Derating to ≤200 mA or improving PCB copper area is required for full-load operation at high ambient temperatures. This thermal limit is intrinsic to the NCP585DSN09T1G's SOT-23-5 construction.
NCP585DSN09T1G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- SC-74A, SOT-753
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 0.9V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.78V @ 300mA
- Current - Output:
- 300mA
- Current - Quiescent (Iq):
- 90 µA
- Current - Supply (Max):
- 111 µA
- PSRR:
- 75dB ~ 65dB (120Hz ~ 10kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-5
NCP585DSN09T1G FAQ
1.How can I place an order for NCP585DSN09T1G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP585DSN09T1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP585DSN09T1G reliable?
The price and inventory of NCP585DSN09T1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP585DSN09T1G is usually 5 days.
3.What payment methods are accepted for NCP585DSN09T1G?
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Once your NCP585DSN09T1G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP585DSN09T1G?
For technical support, including NCP585DSN09T1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP585DSN09T1G requirements.
6.How does Aetrix verify that NCP585DSN09T1G is sourced from the original manufacturer or authorized distributors?
All NCP585DSN09T1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP585DSN09T1G meets industry standards.
7.What is the process for return or replacement of NCP585DSN09T1G?
All NCP585DSN09T1G units undergo pre-shipment inspection (PSI). If there is an issue with NCP585DSN09T1G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP585DSN09T1G part is unused and in its original packaging.
Return procedure for NCP585DSN09T1G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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