onsemi NCP59301DS30R4G
- Part No.:
- NCP59301DS30R4G
- Manufacturer:
- onsemi
- Package:
- TO-263-6, D2PAK (5 Leads + Tab), TO-263BA
- Datasheet:
-
NCP59301DS30R4G.pdf
- Description:
- IC REG LINEAR 3V 3A D2PAK-5
- Quantity:
- Payment:

- Shipping:

Inventory:2,720
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Product details
Overview
NCP59301DS30R4G from onsemi is a 3.0 A, 3.0 V fixed-output, very low-dropout (VLDO) linear regulator in D2PAK−5 package with logic-compatible enable and open-collector error flag pins, delivering <300 mV typical dropout at full load and stable operation with ceramic output capacitors - used for FPGA core power, DSP post-regulation, and industrial point-of-load applications.
For engineers reviewing the NCP59301DS30R4G datasheet, pinout, applications, or equivalent options, this page delivers verified electrical parameters, thermal behavior, protection features, and real-world design implications - including fast transient response, reverse output current protection, and AEC-Q100-qualified automotive compatibility via NCV variants.
Technical Context
The NCP59301DS30R4G implements a high-precision VLDO architecture with internal PMOS pass transistor, enabling 3.0 A continuous output while maintaining ≤300 mV dropout at 3.0 A and ±2.5% output voltage accuracy across –40°C to +125°C. Its error flag monitors VOUT at 93–95% of nominal and latches low during fault conditions.
It integrates CMOS/TTL-compatible enable input (1.8 V threshold), thermal shutdown, current limiting (3.5–5 A), and reverse output current protection up to 6.5 V (VOUT–VIN) when disabled. Ground current remains 60–120 mA at 3.0 A load and drops to ≤5 µA in shutdown.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 3.0 V ±2.5% over –40°C to +125°C - ensures stable core supply for 3.0 V FPGA I/O or microcontroller peripherals. |
| Max Output Current | 3.0 A continuous - supports high-current digital loads without external parallel regulation. |
| Dropout Voltage | 300 mV typical at 3.0 A - enables operation with VIN as low as 3.3 V, minimizing heat dissipation in low-VIN systems. |
| Ground Current | 60–120 mA at 3.0 A load; ≤5 µA in shutdown - reduces system standby power and improves efficiency at light loads. |
| Enable Threshold | 1.8 V (enable), 0.8 V (shutdown) - compatible with 1.8 V/3.3 V logic without level-shifting circuitry. |
| Error Flag | Open-collector, active-low at VOUT ≤95% nominal - provides direct interface to MCU GPIO or supervisor IC for fault detection. |
| Input Voltage Range | 2.24 V to 13.5 V - supports wide-input industrial supplies and battery-backed systems with headroom for ripple. |
Pinout & Package
D2PAK−5 surface-mount package (Case 936A) with exposed tab thermally and electrically connected to GND - optimized for high-power dissipation on PCB copper pours.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - EN | Enable input | CMOS/TTL-compatible control: logic high ≥1.8 V enables regulator; low ≤0.8 V forces shutdown with µA-level leakage. |
| 2 - VIN | Input voltage supply | Accepts 2.24–13.5 V; powers internal circuitry and delivers regulated current to load - requires local 1 µF bypass capacitor. |
| 3 - GND | Ground reference | Common return for input, output, and internal circuitry; tab is internally bonded to this pin for thermal and electrical grounding. |
| 4 - VOUT | Regulated output | 3.0 V fixed output capable of sourcing 3.0 A; stable with ≥47 µF ceramic capacitor - critical for transient response in FPGA/DSP rails. |
| 5 - FLG | Error flag output | Open-collector output pulled low when VOUT falls below 93–95% of 3.0 V; sinks up to 5 mA - requires external pull-up resistor. |
Key Features
| Feature | Design Value |
|---|---|
| Fast transient response | Stabilizes within microseconds after load steps - maintains <±30 mV deviation at 3.0 A step, critical for FPGA core voltage integrity. |
| Ceramic-capacitor stability | Guaranteed stable with ≥47 µF X7R/X5R ceramic output capacitor - eliminates need for electrolytic or tantalum, reducing board area and aging risk. |
| Reverse output current protection | Blocks reverse current flow when VOUT > VIN (up to 6.5 V differential) during shutdown - prevents backup battery discharge in dual-supply systems. |
| Thermal shutdown & current limit | Shuts down at TJ ≥125°C; limits output current to 3.5–5 A during overload - protects device and downstream circuits during short-circuit or startup surge. |
| AEC-Q100 qualified variant available | NCV59301DS30R4G meets AEC-Q100 Grade 1 (–40°C to +125°C) with PPAP capability - suitable for automotive infotainment and ADAS power rails. |
Applications
| FPGA Core Power Supply | DSP Post-Regulation |
|---|---|
|
Use Scenario: Providing clean, low-noise 3.0 V supply to Xilinx Artix-7 FPGA banks requiring tight voltage tolerance and fast load-step response. IC Role / Device Role / Timing Role: Primary point-of-load (POL) regulator delivering 3.0 V at up to 3.0 A with sub-300 mV dropout and <1% line/load regulation. Use Value: Enables reliable FPGA configuration and operation under dynamic current demands (e.g., DDR3 I/O switching), avoiding brownout resets. |
Use Scenario: Final-stage regulation for TI C6000 DSP I/O voltage rail after a primary DC-DC converter, where ripple rejection and fast transient recovery are essential. IC Role / Device Role / Timing Role: Low-noise linear post-regulator with 70+ dB PSRR at 100 kHz - suppresses switching noise from upstream buck converter. Use Value: Prevents data corruption and timing errors in high-speed serial interfaces (e.g., EMIF, McASP) by maintaining VIO stability during burst-mode processing. |
| Industrial PLC I/O Module | Battery-Backed Memory Controller |
|
Use Scenario: Powering isolated 3.0 V logic in programmable logic controller (PLC) digital I/O modules operating in harsh industrial environments (–40°C to +85°C). IC Role / Device Role / Timing Role: Robust, thermally protected LDO with built-in thermal shutdown and current limiting - sustains operation during ambient temperature spikes and short-circuit faults. Use Value: Eliminates need for external thermal monitoring or fuse networks, reducing BOM count and improving field reliability. |
Use Scenario: Maintaining 3.0 V supply to SRAM or NVSRAM during main power loss, using a backup coin cell or supercapacitor. IC Role / Device Role / Timing Role: Reverse-current protected LDO that blocks VOUT-to-VIN backfeed when main supply fails - preserves backup energy. Use Value: Extends backup runtime by preventing >30 µA parasitic discharge through internal feedback divider, validated per datasheet spec. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar fixed-output LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MIC29302WU | 3.0 A, 3.0 V fixed, TO-263-5 package; higher 450 mV dropout at 3.0 A; no error flag pin. | Lacks FLG output and has slower transient response - unsuitable for fault-monitoring or high-dV/dt load scenarios. | Select only if error flag and ultra-fast response are unnecessary and thermal margin allows higher dropout loss. |
| TPS7A8300RGRT | 3.0 A, 3.0 V fixed, VQFN-20 package; 115 mV dropout at 3.0 A; includes power-good flag and adjustable soft-start. | Smaller footprint but requires external compensation; not AEC-Q100 qualified; higher cost. | Prefer for space-constrained designs needing lower dropout and PG signal - avoid if automotive qualification or D2PAK thermal robustness is required. |
Compared with MIC29302WU and TPS7A8300RGRT, the NCP59301DS30R4G uniquely balances automotive-grade reliability (via NCV variant), integrated fault signaling, and proven thermal performance in D2PAK−5 - making it optimal for industrial and automotive POL where robustness and diagnostics are prioritized over minimal footprint or lowest dropout.
Availability
NCP59301DS30R4G is available at Aetrix Electronics and suitable for FPGA power delivery, DSP post-regulation, and industrial PLC point-of-load applications requiring stable component supply, long-term lifecycle support, and traceable Pb-free sourcing.
Supply support for NCP59301DS30R4G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensor, and connectivity solutions for automotive, industrial, cloud, and consumer markets.
The NCP59300/59301 series was designed specifically for high-current, low-noise point-of-load regulation in FPGA, DSP, and ASIC power domains - emphasizing thermal resilience, fast transient immunity, and functional safety readiness.
FAQ
What is the maximum input voltage rating for the NCP59301DS30R4G?
The NCP59301DS30R4G supports an absolute maximum input voltage of 18 V, but its recommended operating range is 2.24 V to 13.5 V. Operation above 13.5 V may trigger internal protection or degrade long-term reliability - always maintain VIN within the recommended range for guaranteed performance and lifetime.
Does the NCP59301DS30R4G require an external output capacitor, and what value is recommended?
Yes, the NCP59301DS30R4G requires an external output capacitor for stability and transient performance. The datasheet specifies ≥47 µF ceramic (X7R or X5R) as the minimum recommended value - smaller values risk oscillation, while larger values improve ripple suppression and load-step response without compromising stability.
How does the error flag (FLG) pin on the NCP59301DS30R4G behave during an output fault?
The FLG pin on the NCP59301DS30R4G is an open-collector output that pulls low when VOUT drops below 93–95% of its nominal 3.0 V output - indicating undervoltage fault. It remains asserted until VOUT recovers above the hysteresis threshold (97–99.2% of 3.0 V), providing reliable fault latching without external circuitry.
Can the NCP59301DS30R4G be used in automotive applications?
Yes - while the NCP59301DS30R4G itself is industrial-grade, its automotive-qualified counterpart NCV59301DS30R4G is AEC-Q100 Grade 1 certified (–40°C to +125°C) and PPAP capable. For automotive use, specify the NCV prefix part to ensure compliance with automotive quality and reliability requirements.
What thermal considerations apply to the NCP59301DS30R4G in high-current operation?
At 3.0 A and 300 mV dropout, the NCP59301DS30R4G dissipates ~0.9 W. With RJA = 52°C/W on a 100 mm² 2 oz copper pad, junction temperature rise is ~47°C above ambient - ensuring safe operation below 125°C TJ max up to +78°C ambient. Use adequate copper pour and consider airflow or heatsinking for sustained 3.0 A loads in enclosed environments.
NCP59301DS30R4G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- TO-263-6, D2PAK (5 Leads + Tab), TO-263BA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 13.5V
- Voltage - Output (Min/Fixed):
- 3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.5V @ 3A
- Current - Output:
- 3A
- Current - Quiescent (Iq):
- -
- Current - Supply (Max):
- -
- PSRR:
- -
- Control Features:
- Enable, Error Flag
- Protection Features:
- Over Current, Over Temperature, Reverse Polarity
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- D2PAK-5
NCP59301DS30R4G FAQ
1.How can I place an order for NCP59301DS30R4G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP59301DS30R4G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP59301DS30R4G reliable?
The price and inventory of NCP59301DS30R4G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP59301DS30R4G is usually 5 days.
3.What payment methods are accepted for NCP59301DS30R4G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP59301DS30R4G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP59301DS30R4G?
NCP59301DS30R4G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP59301DS30R4G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP59301DS30R4G?
For technical support, including NCP59301DS30R4G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP59301DS30R4G requirements.
6.How does Aetrix verify that NCP59301DS30R4G is sourced from the original manufacturer or authorized distributors?
All NCP59301DS30R4G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP59301DS30R4G meets industry standards.
7.What is the process for return or replacement of NCP59301DS30R4G?
All NCP59301DS30R4G units undergo pre-shipment inspection (PSI). If there is an issue with NCP59301DS30R4G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP59301DS30R4G part is unused and in its original packaging.
Return procedure for NCP59301DS30R4G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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