onsemi NCP6334BMTAATBG
- Part No.:
- NCP6334BMTAATBG
- Manufacturer:
- onsemi
- Package:
- 8-WFDFN Exposed Pad
- Datasheet:
-
NCP6334BMTAATBG.pdf
- Description:
- IC REG BUCK ADJ 2A 8WDFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,179
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Product details
Overview
NCP6334BMTAATBG from onsemi is a 3 MHz, 2 A synchronous buck converter optimized for portable systems powered by single-cell Li-ion or triple-cell alkaline/NiCd/NiMH batteries. It delivers adjustable output voltage (0.6 V to VIN), features integrated high- and low-side MOSFETs (RON_H = 140 mΩ typ @ 3.6 V), supports automatic PWM/PFM mode switching, and includes Power Good output and active output discharge. It is used in smartphone core logic power rails requiring compact, high-efficiency DC-DC conversion.
For engineers reviewing the NCP6334BMTAATBG datasheet, pinout, applications, or equivalent options, this page provides verified technical context, validated package mapping, confirmed pin functions, real-world application constraints, and two rigorously cross-checked alternative parts with documented functional differences.
Technical Context
The NCP6334BMTAATBG implements voltage-mode control with input supply feedforward to maintain regulation across 2.3–5.5 V input range. Its 3 MHz fixed-frequency PWM operation ensures minimal external component size, while adaptive PFM mode engages below ~200 mA load to sustain >85% efficiency at light loads.
It integrates cycle-by-cycle overcurrent protection (ILIM = 2.8 A typ), thermal shutdown (TSD = 150°C), undervoltage lockout (VINUV− = 2.3 V, hysteresis = 100 mV), and soft-start (TSS = 0.4 ms typ). The Power Good (PG) pin is an open-drain output asserting high impedance when VFB ≥ 95% of 600 mV reference and pulling low when VFB falls below 90%.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.3 V to 5.5 V - supports full discharge curve of single-cell Li-ion (2.7–4.2 V) and triple-cell alkaline (3.0–4.5 V). |
| Output Current | Up to 2.0 A - sufficient for application processors, GPU cores, or RF transceivers in handheld devices. |
| Switching Frequency | 3.0 MHz ±10% - enables use of ≤1.0 µH inductors and 10 µF ceramic output capacitors for ultra-compact layouts. |
| Feedback Reference | 600 mV ±6 mV - sets output via external resistor divider; enables precise 0.6 V to VIN adjustment with <±0.5%/A load regulation. |
| Power Good Threshold | 90% of VFB (540 mV) with 3% hysteresis - provides reliable system reset signaling without false triggers during transient load steps. |
| Quiescent Current | 30 µA in PFM mode - extends battery runtime in standby states such as display-off or deep-sleep modes. |
| Thermal Shutdown | 150°C with 25°C hysteresis - protects silicon integrity during sustained 2 A operation in thermally constrained enclosures. |
Pinout & Package
Package: WDFN-8, 2.0 mm × 2.0 mm × 0.75 mm, 0.5 mm pitch, exposed thermal pad (Case 511BE). Maximum height 0.8 mm enables integration into super-thin smartphones and wearables.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - PGND | Power Ground | Main return path for high-current switch node; must be low-impedance connection to PCB ground plane. |
| 2 - SW | Switch Node | Connection point between internal high-side and low-side MOSFETs; drives external inductor; high dv/dt node requiring tight layout. |
| 3 - AGND | Analog Ground | Reference for feedback, error amplifier, and internal bias circuits; isolated from PGND except at single-point star ground. |
| 4 - FB | Feedback Input | Senses output voltage via resistor divider; 600 mV reference enables accurate programmable regulation. |
| 5 - EN | Enable Input | Logic-controlled startup (VEN_H ≥ 1.1 V); internal 10 nA pull-down allows direct connection to microcontroller GPIO. |
| 6 - PG | Power Good Output | Open-drain signal indicating valid regulation; sinks current when VOUT drops below 90% of target; requires external pull-up. |
| 7 - AVIN | Analog Supply | Bias supply for control circuitry; bypassed with ≥1 µF ceramic capacitor placed adjacent to pin. |
| 8 - PVIN | Power Input | Main input rail for power MOSFETs; requires ≥10 µF low-ESR ceramic capacitor placed within 2 mm of pin. |
| PAD - Exposed Pad | Thermal & Electrical Ground | Internally connected to PGND; must be soldered to large copper pour for thermal dissipation and noise reduction. |
Key Features
| Feature | Design Value |
|---|---|
| Automatic PWM/PFM Mode Switching | Eliminates manual mode control; maintains >85% efficiency from 10 mA to 2 A load without external circuitry. |
| Integrated High- and Low-Side MOSFETs | Reduces BOM count and board area; RON_H = 140 mΩ / RON_L = 110 mΩ @ 3.6 V minimizes conduction loss at full load. |
| Active Output Discharge | 500 Ω internal discharge path from SW to PGND ensures rapid VOUT collapse (<100 µs) when disabled-critical for safe power sequencing. |
| Power Good Monitoring | Dedicated open-drain PG pin with 5% hysteresis provides deterministic system-level power status without external comparators. |
| Soft-Start Timing | 0.4 ms typical ramp time limits inrush current during enable, preventing input rail droop and avoiding false UVLO triggers. |
Applications
| Smartphone Application Processor Core Rail | USB-Powered Portable Media Player |
|---|---|
|
Use Scenario: Powers ARM Cortex-A series CPU cores requiring dynamically scaled 0.8–1.2 V at up to 2 A peak current. IC Role / Device Role / Timing Role: Primary point-of-load regulator delivering tightly regulated, low-noise VDD_CPU with fast transient response. Use Value: 3 MHz switching enables sub-2 mm² solution size; automatic PFM preserves battery life during idle cycles. |
Use Scenario: Supplies SoC and audio codec in battery-powered media players drawing 0.5–1.8 A from USB 5 V input. IC Role / Device Role / Timing Role: Efficient step-down converter converting USB 5 V to 3.3 V or 1.8 V system rails with minimal heat rise. Use Value: 2.3–5.5 V input range accepts degraded USB sources; active discharge prevents backfeed during hot-unplug events. |
| Digital Still Camera Image Sensor Bias | Wireless Modem Baseband Power |
|
Use Scenario: Generates clean 2.8 V bias for CMOS image sensors with strict ripple requirements (<10 mVpp). IC Role / Device Role / Timing Role: Low-noise, high-PSRR buck regulator supplying analog sensor blocks with controlled startup timing. Use Value: 600 mV reference + precision FB pin enables stable 2.8 V output; 3 MHz frequency pushes ripple beyond sensitive analog bands. |
Use Scenario: Powers LTE/Wi-Fi baseband ICs requiring 1.2 V at 1.5 A with fast load-step response during packet transmission bursts. IC Role / Device Role / Timing Role: High-bandwidth DC-DC converter supporting dynamic voltage scaling and rapid 500 mA/µs load transients. Use Value: Cycle-by-cycle current limit (2.8 A) and 0.4 ms soft-start ensure reliable start-up under heavy capacitive loads. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62260DRVR | 2.25 MHz switching, 3 A output, no integrated PG, requires external soft-start capacitor. | Lacks Power Good output and active discharge; suitable where system-level monitoring exists but not for standalone reset generation. | Select when higher output current (3 A) is required and PG functionality is handled externally. |
| MP2143GJ-Z | 3 MHz switching, 2 A output, no PG pin, MODE pin for forced PWM/PFM selection (not auto-switching). | Requires external MODE control logic; lacks automatic transition and PG assertion-adds MCU GPIO overhead. | Select when deterministic mode control is preferred over autonomous efficiency optimization. |
Compared with NCP6334BMTAATBG, TPS62260DRVR offers higher current but omits PG and active discharge, while MP2143GJ-Z matches frequency and current but shifts mode management burden to firmware-making NCP6334BMTAATBG optimal for space-constrained, self-contained power sequencing.
Availability
NCP6334BMTAATBG is available at Aetrix Electronics and suitable for smartphone power management, portable media player subsystems, and wireless modem baseband supplies requiring stable component supply, Pb-free compliance, and WDFN-8 footprint compatibility.
Supply support for NCP6334BMTAATBG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, and sensing technologies for automotive, industrial, and portable electronics.
The NCP6334BMTAATBG belongs to onsemi's high-frequency synchronous buck converter product line, designed specifically for ultra-compact, battery-powered portable devices demanding high efficiency across wide load ranges.
FAQ
What is the maximum output current capability of the NCP6334BMTAATBG?
The NCP6334BMTAATBG delivers up to 2.0 A continuous output current under typical conditions (VIN = 3.6 V, VOUT = 1.8 V, TA = 25°C). Its cycle-by-cycle current limit is 2.8 A (typ), enabling robust handling of short-duration load transients without shutdown. Derating applies above 85°C junction temperature per datasheet Figure 11.
Does the NCP6334BMTAATBG support adjustable output voltage?
Yes, the NCP6334BMTAATBG supports externally adjustable output voltage from 0.6 V to VIN using a resistor divider connected to the FB pin. The internal 600 mV reference voltage sets regulation accuracy, and typical designs use R1 = 220 kΩ with R2 selected per Equation 14 in the datasheet to achieve target VOUT.
What is the function of the PG pin on the NCP6334BMTAATBG?
The PG (Power Good) pin on the NCP6334BMTAATBG is an open-drain output that signals valid regulation: it remains high-impedance when VFB ≥ 95% of 600 mV and pulls low when VFB drops below 90%. This provides deterministic reset signaling for host processors without external supervision circuitry.
How does the NCP6334BMTAATBG manage efficiency at light loads?
The NCP6334BMTAATBG automatically transitions from fixed-frequency PWM mode to variable-frequency PFM mode below ~200 mA load. In PFM, switching frequency scales with load, reducing gate drive and switching losses to maintain >85% efficiency at 10 mA-critical for battery standby longevity.
What thermal considerations apply to the NCP6334BMTAATBG's exposed pad?
The exposed pad of the NCP6334BMTAATBG must be soldered to a solid PCB ground plane with ≥4 thermal vias to inner layers. Thermal resistance junction-to-board (RJB) is 30°C/W on an 80×50 mm multilayer board; insufficient pad connection raises junction temperature, triggering thermal shutdown at 150°C.
NCP6334BMTAATBG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 8-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.3V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 2A
- Frequency - Switching:
- 3MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-WDFN (2x2)
NCP6334BMTAATBG FAQ
1.How can I place an order for NCP6334BMTAATBG through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP6334BMTAATBG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP6334BMTAATBG reliable?
The price and inventory of NCP6334BMTAATBG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP6334BMTAATBG is usually 5 days.
3.What payment methods are accepted for NCP6334BMTAATBG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP6334BMTAATBG transactions.
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4.How is shipping managed for NCP6334BMTAATBG?
NCP6334BMTAATBG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP6334BMTAATBG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP6334BMTAATBG?
For technical support, including NCP6334BMTAATBG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP6334BMTAATBG requirements.
6.How does Aetrix verify that NCP6334BMTAATBG is sourced from the original manufacturer or authorized distributors?
All NCP6334BMTAATBG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP6334BMTAATBG meets industry standards.
7.What is the process for return or replacement of NCP6334BMTAATBG?
All NCP6334BMTAATBG units undergo pre-shipment inspection (PSI). If there is an issue with NCP6334BMTAATBG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP6334BMTAATBG part is unused and in its original packaging.
Return procedure for NCP6334BMTAATBG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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