onsemi NCP690MN15T2G
- Part No.:
- NCP690MN15T2G
- Manufacturer:
- onsemi
- Package:
- 6-VDFN Exposed Pad
- Datasheet:
-
NCP690MN15T2G.pdf
- Description:
- IC REG LINEAR 1.5V 1A 6DFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,000
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Product details
Overview
NCP690MN15T2G from onsemi is a fixed-output 1.5 V, 1 A CMOS low-dropout (LDO) voltage regulator in a 6-lead DFN3x3 package. It delivers ±2% output voltage tolerance over −40°C to 125°C, features 190 mV dropout at 1 A (VOUT = 2.5 V), active output discharge, and operates from 1.5 V to 6.0 V input. It is designed for space-constrained portable battery-powered systems such as FPGA core supplies and SSD power rails.
For engineers reviewing the NCP690MN15T2G datasheet, pinout, applications, or equivalent options, key selection criteria include guaranteed 1 A output current with low ground current (145 µA typical at 1 A), high PSRR (62 dB at 120 Hz), 50 µVRMS output noise, and thermal shutdown at 175°C - all critical for noise-sensitive digital load regulation.
Technical Context
The NCP690MN15T2G implements a PMOS pass transistor architecture with bandgap reference, internal current limiting, and thermal shutdown circuitry. Its fixed 1.5 V output is trimmed during production to ±2% tolerance across temperature and load, and it uses a dedicated SNS (sense) pin for remote output voltage monitoring to improve regulation accuracy under PCB trace impedance.
It supports ceramic output capacitors ≥1 µF without minimum ESR requirements and includes an active output discharge path to rapidly pull down VOUT when disabled. The EN pin is NC (no connect) - unlike NCP691/NCP692 variants - confirming this device lacks enable functionality and remains always-on when powered within its operating range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.5 V ±2% over −40°C to 125°C - ensures stable core voltage for low-voltage logic without external feedback components. |
| Max Output Current | 1 A continuous - sufficient for powering single-core microprocessors, DDR memory termination, or FPGA I/O banks. |
| Dropout Voltage | 190 mV at 1 A (VOUT = 2.5 V); 290 mV at 1 A (VOUT = 1.5 V) - enables operation from 1.79 V input while maintaining regulation. |
| Ground Current | 145 µA typical at 1 A load - minimizes quiescent power loss in battery-critical applications like wearables and IoT sensors. |
| PSRR | 62 dB at 120 Hz - suppresses ripple from switching DC/DC converters feeding the LDO input, reducing noise coupling into analog/digital subsystems. |
| Output Noise | 50 µVRMS (200 Hz–100 kHz) - meets stringent noise requirements for RF biasing, ADC reference supplies, and PLL VCO cores. |
| Thermal Shutdown | 175°C activation with 10°C hysteresis - protects against sustained overload or poor PCB thermal design without latch-up. |
Pinout & Package
Package: DFN6 3×3 mm, 0.95 mm pitch, exposed thermal pad (Case 506AH). Pin 2 is GND-connected EPAD for enhanced thermal dissipation; pins 1 and 6 are paralleled IN inputs to support full 1 A current capability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 6 | IN | Primary input voltage supply pins - must be shorted externally to deliver full 1 A output current and minimize IR drop. |
| 2 | GND | Power ground and thermal pad connection - soldered to PCB copper pour for junction-to-ambient thermal resistance of 70°C/W (645 mm² Cu). |
| 3 | N/C | No-connect terminal - not internally bonded; must be left floating or tied to GND per layout best practice (no enable function). |
| 4 | OUT | Regulated 1.5 V output - connects directly to load; requires ≥1 µF ceramic capacitor placed adjacent to pin for stability. |
| 5 | SNS | Sense input - must be routed directly to OUT pin (Kelvin connection) to compensate for PCB trace resistance and maintain ±2% regulation accuracy. |
Key Features
| Feature | Design Value |
|---|---|
| Active Output Discharge | Internal NMOS switch pulls OUT to GND when input is removed - prevents floating rail and ensures predictable power-down sequencing in multi-rail systems. |
| Low-Noise Operation | 50 µVRMS integrated noise without bypass capacitor - eliminates need for external noise-reduction caps and reduces BOM count and board area. |
| Ceramic Capacitor Stability | Stable with ≥1 µF ceramic output cap, zero minimum ESR requirement - simplifies layout and avoids tantalum/capacitor aging concerns. |
| Enhanced ESD Protection | 4 kV HBM / 200 V MM - improves robustness during handling and assembly in high-volume manufacturing environments. |
| Wide Input Range | 1.5 V to 6.0 V operating input - supports direct Li-ion (3.0–4.2 V), USB (5 V), or buck-converted intermediate bus (1.8–3.3 V) inputs. |
Applications
| Laptop Core Voltage Regulation | FPGA I/O Bank Supply |
|---|---|
|
Use Scenario: Providing clean 1.5 V supply to CPU/GPU core logic in ultra-thin notebooks with strict thermal and size constraints. IC Role / Device Role / Timing Role: Primary post-regulator delivering stable, low-noise voltage to sensitive digital cores requiring tight voltage tolerance and fast transient response. Use Value: 190 mV dropout enables operation from partially discharged batteries; 50 µVRMS noise prevents timing jitter in high-speed SerDes links. |
Use Scenario: Powering 1.5 V I/O banks of Xilinx Artix-7 or Intel Cyclone V FPGAs in industrial control modules. IC Role / Device Role / Timing Role: Dedicated LDO for I/O rail decoupling, isolated from noisy system rails via local ceramic filtering. Use Value: ±2% output tolerance ensures compliance with FPGA I/O VCCIO specs; 1 A rating supports full bank loading with margin. |
| SSD NAND Flash Controller Supply | Portable Medical Sensor Node |
|
Use Scenario: Regulating 1.5 V for NAND flash controller ASICs in M.2 NVMe SSDs where thermal density and EMI are critical. IC Role / Device Role / Timing Role: Low-noise, thermally efficient local regulator placed adjacent to controller die to minimize voltage droop during burst writes. Use Value: Active output discharge prevents back-powering during hot-swap; DFN3x3 footprint saves space in dense M.2 layouts. |
Use Scenario: Powering ultra-low-power 1.5 V analog front-end (AFE) and BLE SoC in wearable ECG patches with coin-cell battery. IC Role / Device Role / Timing Role: Always-on LDO supplying precision analog circuitry and radio transceiver, optimized for microamp quiescent current. Use Value: 145 µA ground current at 1 A load scales linearly downward at light loads - extends battery life beyond 7 days per charge. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NCP692MN15T2G | Includes active-high EN pin; otherwise identical electrical specs and package. | Required where system-level power sequencing or standby mode control is needed. | Select NCP692MN15T2G only if enable functionality is mandatory; NCP690MN15T2G reduces component count when always-on operation suffices. |
| TPS7A2015PDQNR | 1.5 V fixed, 1 A, 165 mV dropout (at 1 A), 6.5 µVRMS noise, SOT-23-5 package. | Better noise performance but lower thermal capability; unsuitable for >0.5 A continuous in compact layouts. | Choose TPS7A2015PDQNR for ultra-low-noise analog rails; prefer NCP690MN15T2G for higher-current digital loads with thermal constraints. |
Compared with NCP692MN15T2G, the NCP690MN15T2G eliminates enable logic to reduce cost and complexity in always-on systems; versus TPS7A2015PDQNR, it trades lower noise for higher output current and superior thermal performance in DFN3x3, making it optimal for thermally dense digital power domains.
Availability
NCP690MN15T2G is available at Aetrix Electronics and suitable for laptop motherboard designs, FPGA-based industrial controllers, SSD power management, and portable medical sensor nodes requiring stable component supply, long-term lifecycle support, and Pb-free compliance.
Supply support for NCP690MN15T2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, and sensing solutions for automotive, industrial, and cloud infrastructure markets.
The NCP690MN15T2G belongs to onsemi's NCP69x CMOS LDO family, engineered for portable and space-constrained battery-powered applications demanding high PSRR, low quiescent current, and ceramic-capacitor compatibility.
FAQ
What is the maximum input voltage for the NCP690MN15T2G?
The absolute maximum input voltage for the NCP690MN15T2G is 6.5 V, but the recommended operating input range is 1.5 V to 6.0 V. Exceeding 6.5 V risks permanent damage. For reliable 1.5 V output regulation at 1 A, minimum input is 1.79 V (1.5 V + 290 mV dropout), and VIN must remain ≥ (VOUT + VDO) across all load and temperature conditions. The NCP690MN15T2G includes overvoltage clamp protection on the IN pin per datasheet Section 5.
Does the NCP690MN15T2G have an enable pin?
No, the NCP690MN15T2G does not have functional enable logic. Pin 3 is designated N/C (no connect) and must be left unconnected or tied to GND per layout guidelines - it is not bonded internally. This distinguishes it from the NCP691MN15T2G (active-low EN) and NCP692MN15T2G (active-high EN). The NCP690MN15T2G operates continuously whenever valid input voltage is applied within its operating range.
What output capacitor value is required for stability with the NCP690MN15T2G?
The NCP690MN15T2G is stable with a minimum 1 µF ceramic output capacitor, as confirmed in the Applications Information section (page 12). A 10 µF ceramic capacitor is recommended to improve load transient response and startup performance. Unlike many LDOs, it imposes no minimum ESR requirement, enabling use of low-ESR X5R/X7R MLCCs without risk of oscillation. The NCP690MN15T2G also supports tantalum capacitors.
How does the SNS pin function on the NCP690MN15T2G?
The SNS (sense) pin on the NCP690MN15T2G provides remote voltage sensing to compensate for IR drop across PCB traces between the regulator and load. It must be connected directly to the OUT pin using a dedicated Kelvin trace - not shared with the main power trace - to maintain ±2% output voltage accuracy under varying load currents. This feature is essential for high-precision applications like FPGA core rails where even 20 mV deviation can cause timing violations. The NCP690MN15T2G's SNS pin is not present in non-sense LDOs like the TPS7A20 series.
Is the NCP690MN15T2G suitable for automotive applications?
The NCP690MN15T2G is not AEC-Q100 qualified. For automotive-grade equivalents, onsemi offers the NCV8690MN15T2G (same pinout and electrical specs, with NCV prefix), which is AEC-Q100 qualified and PPAP capable. The NCP690MN15T2G is rated for −40°C to 125°C junction temperature and meets industrial reliability standards, but lacks the extended qualification testing, unique site controls, and change notification protocols required for automotive Tier-1 deployments. Use NCP690MN15T2G only in non-automotive industrial or consumer systems.
NCP690MN15T2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 6-VDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 1.5V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.41V @ 1A
- Current - Output:
- 1A
- Current - Quiescent (Iq):
- 200 µA
- Current - Supply (Max):
- 240 µA
- PSRR:
- -
- Control Features:
- -
- Protection Features:
- Over Temperature, Short Circuit
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-DFN (3x3)
NCP690MN15T2G FAQ
1.How can I place an order for NCP690MN15T2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP690MN15T2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP690MN15T2G reliable?
The price and inventory of NCP690MN15T2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP690MN15T2G is usually 5 days.
3.What payment methods are accepted for NCP690MN15T2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP690MN15T2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP690MN15T2G?
NCP690MN15T2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP690MN15T2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP690MN15T2G?
For technical support, including NCP690MN15T2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP690MN15T2G requirements.
6.How does Aetrix verify that NCP690MN15T2G is sourced from the original manufacturer or authorized distributors?
All NCP690MN15T2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP690MN15T2G meets industry standards.
7.What is the process for return or replacement of NCP690MN15T2G?
All NCP690MN15T2G units undergo pre-shipment inspection (PSI). If there is an issue with NCP690MN15T2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP690MN15T2G part is unused and in its original packaging.
Return procedure for NCP690MN15T2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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