onsemi NCP6915AFCCLT1G

Overview

NCP6915AFCCLT1G from onsemi is a 6-channel power management IC integrating one 600 mA step-down DC-DC converter with Dynamic Voltage Scaling (DVS) and five low-noise, low-dropout regulators (LDOs) in a WLCSP16 package. It delivers programmable output voltages (DCDC: 0.8–2.3 V; LDO1–3: 1.7–3.3 V; LDO4–5: 1.2–2.85 V), supports 400 kHz / 3.4 MHz I²C control, and operates across 2.5–5.5 V input range - optimized for camera subsystems and application processors in battery-powered portable devices.

For engineers reviewing the NCP6915AFCCLT1G datasheet, pinout, applications, or equivalent options, key selection considerations include its dual-mode (PWM/PFM) DC-DC efficiency up to 96%, 45 µVrms LDO output noise, 82 µA quiescent current at no load, and hardware enable (HWEN) with customizable power-up sequencing for multi-rail SoC supply domains.

Technical Context

The NCP6915AFCCLT1G implements a synchronous buck converter operating at 3.0 MHz with integrated compensation and active output discharge, supporting DVS via I²C-controlled voltage ramping (50 mV/2.67 s default). Its five LDOs feature independent input supplies (VIN1 for LDO1–3; VIN2 for LDO4–5), programmable soft-start (128 µs), and thermal warning/interrupt signaling at 135°C.

Control is handled through a dual-speed I²C interface (400 kHz standard mode / 3.4 MHz fast mode) and a dedicated hardware enable pin (HWEN) with internal pull-down. The device includes under-voltage lockout (2.3 V threshold, 60–200 mV hysteresis), thermal shutdown (150°C), and configurable rearm behavior after thermal events via register $09.

Key Specifications

Pinout & Package

Package: WLCSP16 (1.56 × 1.56 mm², 0.4 mm pitch, Case 567GF), Pb-free, bottom-side solder balls.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar multi-rail PMIC applications.

Compared with TPS65023RSBR and RTQ2136B-QA, the NCP6915AFCCLT1G offers unique DVS capability and thermal warning in the smallest WLCSP16 footprint, making it optimal for space-constrained consumer portables where dynamic core voltage control and early thermal mitigation are critical.

Availability

NCP6915AFCCLT1G is available at Aetrix Electronics and suitable for smartphone camera modules, portable media players, GPS navigation devices, and industrial barcode scanners requiring stable component supply across high-mix, low-volume production runs.

Supply support for NCP6915AFCCLT1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensor, and connectivity solutions for automotive, industrial, cloud, and consumer markets.

The NCP6915AFCCLT1G belongs to onsemi's mini power management IC family, designed specifically to consolidate multiple voltage rails in battery-powered portable systems while minimizing board area and quiescent power consumption.

FAQ

What is the default power-up sequence behavior of the NCP6915AFCCLT1G?

The NCP6915AFCCLT1G executes a factory-programmed default power-up sequence upon HWEN assertion: DC-DC starts at 128 µs (1.2 V), followed by LDO1 at 256 µs (2.8 V), LDO2 at 512 µs (2.8 V), LDO3 at 640 µs (1.8 V), LDO4 at 768 µs (2.8 V), and LDO5 at 896 µs (1.8 V). All rails are initially disabled; I²C programming is required post-bias time to enable them. This sequence is defined in Table 5 of the NCP6915AFCCLT1G datasheet and can be fully reconfigured via TIME and ENABLE registers.

Does the NCP6915AFCCLT1G support Dynamic Voltage Scaling on all output rails?

No - Dynamic Voltage Scaling is supported only on the integrated DC-DC converter (NCP6915AFCCLT1G's buck stage), enabling smooth 50 mV-step voltage transitions between two factory-programmed values (V1 and V2) under I²C command. The five LDOs offer programmable output voltages within their respective ranges (e.g., LDO1–3: 1.7–3.3 V), but lack ramp-rate control or DVS timing features. Their voltage changes are immediate and step-wise.

What is the maximum allowable input voltage on the PVIN pin of the NCP6915AFCCLT1G?

The absolute maximum rating for the PVIN pin of the NCP6915AFCCLT1G is +6.0 V, as specified in Table 2 (Maximum Ratings). However, the recommended operating range is 2.5 V to 5.5 V per Table 3. Operation above 5.5 V risks permanent damage and violates functional specifications - sustained use beyond 5.5 V is not supported, even briefly. System design must ensure PVIN remains within 2.5–5.5 V under all conditions, including battery charge termination spikes.

Can the NCP6915AFCCLT1G's LDOs be powered from the DC-DC output?

Yes - the NCP6915AFCCLT1G supports flexible power routing: LDO1–3 are supplied from VIN1, which may be connected directly to the DC-DC output (VOUT_DCDC); LDO4–5 are supplied from VIN2, which can also be tied to VOUT_DCDC or to a separate source. This architecture allows cascaded regulation (e.g., DC-DC → LDO1) to improve PSRR and reduce noise on sensitive analog rails, as confirmed in Figure 1 and the "Optimized Power Efficiency" feature list of the NCP6915AFCCLT1G datasheet.

How does the thermal protection system operate in the NCP6915AFCCLT1G?

The NCP6915AFCCLT1G incorporates three-tier thermal protection: a warning interrupt triggers at 135°C (TWARNING), thermal shutdown activates at 150°C (TSD), and automatic rearming occurs at 110°C (TSDR). During shutdown, all outputs disable and the HWEN pin remains functional. Recovery behavior depends on REARM[7:6] bits in register $09: if set to 00, registers reset to defaults; otherwise, prior configuration is restored. This behavior is fully documented in the "Thermal Shutdown" section of the NCP6915AFCCLT1G datasheet.