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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Voltage Regulators - Linear, Low Drop Out (LDO) Regulators

onsemi NCP691MNADJT2G

Name: NCP691MNADJT2G
Brand: onsemi
SKU: NCP691MNADJT2G
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: NCP691MNADJT2G

Manufacturer:: onsemi

Category:: Voltage Regulators - Linear, Low Drop Out (LDO) Regulators

Package:: 6-VDFN Exposed Pad

Datasheet:: NCP691MNADJT2G.pdf

Description:: IC REG LINEAR POS ADJ 1A 6DFN

Quantity:: RFQ Add To RFQ list

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Product details

Overview

NCP691MNADJT2G from onsemi is a 1 A adjustable-output CMOS low-dropout (LDO) voltage regulator with active-low enable, ±1.5% output voltage tolerance, 190 mV dropout at 1 A (V_OUT = 2.5 V), and 50 µV_RMS output noise - designed for space-constrained portable battery-powered systems such as FPGA and microprocessor power rails.

For engineers reviewing the NCP691MNADJT2G datasheet, pinout, applications, or equivalent options, key selection criteria include its DFN6 3×3 mm package with exposed thermal pad, EN-active-low control logic, adjustable output range (1.25 V to 5.0 V), guaranteed 1 A load capability, and compatibility with low-ESR ceramic capacitors without minimum ESR requirement.

Technical Context

The NCP691MNADJT2G implements a PMOS pass transistor architecture enabling very low dropout operation and high PSRR (62 dB at 120 Hz). Its bandgap reference and feedback loop support stable regulation across −40°C to +125°C junction temperature, with internal thermal shutdown (175°C) and current limiting (1.1–2.4 A).

It features active output discharge during disable, ground current as low as 145 µA at 1 A load, and operates from 1.5 V to 6.0 V input while maintaining regulation down to V_OUT + V_DO. The ADJ pin accepts external resistor divider networks for precise output setting, with feedback current ≤320 nA.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Current	Guaranteed 1 A continuous output - supports high-current digital loads like FPGAs without derating under typical PCB thermal conditions.
Dropout Voltage	190 mV at 1 A, V_OUT = 2.5 V - enables efficient regulation from low-input sources such as single-cell Li-ion (3.0 V min) or buck-boost pre-regulators.
Output Voltage Range	Adjustable from 1.25 V to 5.0 V via external resistors - covers core voltages for DSPs, microprocessors, and I/O rails in portable systems.
Output Voltage Tolerance	±1.5% over all operating conditions - ensures tight supply margining for sensitive logic and analog circuitry without additional trimming.
Noise Performance	50 µV_RMS (200 Hz–100 kHz) - eliminates need for external noise-reduction capacitors, simplifying layout and reducing BOM count.
Enable Logic	Active-low EN pin - allows direct interfacing with standard GPIOs or power sequencers requiring negative-enable signaling.
Thermal Protection	Internal thermal shutdown at 175°C with 10°C hysteresis - prevents permanent damage during sustained overload or poor heatsinking.

Pinout & Package

Package: DFN6 3×3 mm, 0.95 mm pitch, exposed thermal pad (Case 506AH, MN suffix). Thermal resistance R_JA = 70°C/W with 645 mm² copper area.

Pin/Terminal	Circuit Role	Design Meaning
1, 6 (IN)	Input voltage supply	Dual input pins must be connected together to deliver full 1 A output current and minimize trace impedance.
2 (GND)	Power ground / thermal pad	Connected to die via lead frame; soldered to PCB copper plane for effective heat dissipation and low-noise grounding.
3 (EN)	Enable control input	Active-low logic: device enabled when EN < 0.4 V; disabled when EN > 0.9 V - supports power sequencing and standby modes.
4 (ADJ)	Feedback reference node	Connects to midpoint of external R1/R2 divider; 210–320 nA bias current enables high-resistor values for low quiescent error.
5 (OUT)	Regulated output	Delivers stable output voltage; requires local 1 µF ceramic capacitor (10 µF recommended) for transient response and stability.

Key Features

Feature	Design Value
Active output discharge	Drains output capacitance when disabled - prevents floating rail and ensures clean power-down sequencing in multi-rail systems.
Low ground current	145 µA at 1 A load - minimizes total system power loss and extends battery life in always-on portable applications.
High PSRR	62 dB at 120 Hz - suppresses ripple from noisy switch-mode pre-regulators, reducing need for additional filtering stages.
Ceramic capacitor compatible	No minimum ESR required - enables use of small, low-cost, high-reliability MLCCs instead of larger tantalum or aluminum electrolytics.
Enhanced ESD protection	4 kV HBM, 200 V MM - improves robustness during board assembly and field handling without external protection devices.

Applications

Laptop Core Power Rail	FPGA I/O Bank Supply
Use Scenario: Regulating 1.8 V or 2.5 V I/O supply from a shared 3.3 V intermediate rail in ultraportable notebooks. IC Role / Device Role / Timing Role: Primary LDO delivering clean, low-noise voltage to FPGA I/O banks with fast load transient response. Use Value: 50 µV_RMS noise and 190 mV dropout ensure signal integrity and timing margin compliance under dynamic load steps up to 1 A.	Use Scenario: Providing configurable 1.25–3.3 V supply to reconfigurable I/O standards (LVCMOS, SSTL) on Xilinx/Intel FPGA development boards. IC Role / Device Role / Timing Role: Adjustable LDO supporting multiple I/O voltage standards via resistor selection - no hardware change needed per design revision. Use Value: ±1.5% tolerance and 1 A rating guarantee stable operation across process/voltage/temperature corners for high-speed interface compliance.
Industrial PLC Digital Module	Medical Portable Monitor MCU Core
Use Scenario: Powering ARM Cortex-M7 microcontroller and CAN transceiver in DIN-rail mounted programmable logic controller modules. IC Role / Device Role / Timing Role: Single-point regulated 3.3 V source with EN-controlled power gating for firmware updates and sleep mode. Use Value: Active-low EN and thermal shutdown (175°C) enable safe, predictable behavior during overtemperature faults and brown-out recovery.	Use Scenario: Supplying 1.2 V core voltage to ultra-low-power medical SoC in battery-operated patient monitors with strict EMC and reliability requirements. IC Role / Device Role / Timing Role: Low-noise, low-quiescent LDO ensuring clean power to ADC reference and RF subsystems during ECG/SpO₂ acquisition. Use Value: 145 µA ground current at full load and 50 µV_RMS noise directly improve battery runtime and measurement SNR without added filtering.

Laptop Core Power Rail

FPGA I/O Bank Supply

Use Scenario: Regulating 1.8 V or 2.5 V I/O supply from a shared 3.3 V intermediate rail in ultraportable notebooks.

IC Role / Device Role / Timing Role: Primary LDO delivering clean, low-noise voltage to FPGA I/O banks with fast load transient response.

Use Value: 50 µV_RMS noise and 190 mV dropout ensure signal integrity and timing margin compliance under dynamic load steps up to 1 A.

Use Scenario: Providing configurable 1.25–3.3 V supply to reconfigurable I/O standards (LVCMOS, SSTL) on Xilinx/Intel FPGA development boards.

IC Role / Device Role / Timing Role: Adjustable LDO supporting multiple I/O voltage standards via resistor selection - no hardware change needed per design revision.

Use Value: ±1.5% tolerance and 1 A rating guarantee stable operation across process/voltage/temperature corners for high-speed interface compliance.

Industrial PLC Digital Module

Medical Portable Monitor MCU Core

Use Scenario: Powering ARM Cortex-M7 microcontroller and CAN transceiver in DIN-rail mounted programmable logic controller modules.

IC Role / Device Role / Timing Role: Single-point regulated 3.3 V source with EN-controlled power gating for firmware updates and sleep mode.

Use Value: Active-low EN and thermal shutdown (175°C) enable safe, predictable behavior during overtemperature faults and brown-out recovery.

Use Scenario: Supplying 1.2 V core voltage to ultra-low-power medical SoC in battery-operated patient monitors with strict EMC and reliability requirements.

IC Role / Device Role / Timing Role: Low-noise, low-quiescent LDO ensuring clean power to ADC reference and RF subsystems during ECG/SpO₂ acquisition.

Use Value: 145 µA ground current at full load and 50 µV_RMS noise directly improve battery runtime and measurement SNR without added filtering.

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
NCP692MNADJT2G	Same architecture and pinout, but EN pin is active-high - requires inverted control signal or level-shifting circuitry.	Suitable where host processor GPIOs default to high-state or where power-up sequencing mandates positive-enable logic.	Select when system-level enable logic is active-high; verify EN threshold (0.9 V HI / 0.4 V LO) matches driving source.
TPS7A4700RGWR	Lower noise (4.7 µV_RMS), higher IQ (1 mA), fixed 3.3 V or adjustable (1.4–20.5 V), SOIC-8 package - not pin-compatible.	Better suited for ultra-sensitive analog front-ends (e.g., precision ADCs, op-amps) where sub-10 µV noise is critical.	Choose only if noise performance is primary constraint and board redesign for SOIC-8 is acceptable; not drop-in replacement.

Compared with NCP691MNADJT2G, NCP692MNADJT2G offers identical electrical specs but reversed enable polarity - ideal for systems with native high-assert logic; TPS7A4700RGWR delivers superior noise reduction but at higher quiescent current and larger footprint, making it appropriate only for noise-critical analog domains rather than digital core rails.

Availability

NCP691MNADJT2G is available at Aetrix Electronics and suitable for FPGA power management, portable medical device design, and industrial embedded control applications requiring stable component supply, long-term lifecycle support, and Pb-free compliance.

Supply support for NCP691MNADJT2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensor, and connectivity solutions for automotive, industrial, and cloud infrastructure markets.

The NCP691MNADJT2G belongs to onsemi's NCP69x CMOS LDO family - engineered specifically for space-constrained, battery-powered portable electronics demanding high PSRR, low noise, and robust thermal protection.

FAQ

What is the minimum input voltage required for NCP691MNADJT2G to deliver 1 A at 1.25 V output?

The minimum input voltage is determined by dropout: V_IN(MIN) = V_OUT + V_DO. For 1.25 V output, typical dropout is 450 mV at 1 A, so V_IN(MIN) = 1.7 V. The datasheet recommends ≥1.75 V for guaranteed 1 A operation across temperature and process variation. NCP691MNADJT2G will not regulate below this threshold.

Does NCP691MNADJT2G require an external bypass capacitor on the ADJ pin?

No, NCP691MNADJT2G does not require an external capacitor on the ADJ pin. Its feedback network is designed for direct connection to the resistor divider; adding capacitance may destabilize regulation. The device achieves 50 µV_RMS noise without any ADJ-side filtering - a key differentiator versus older LDO architectures that mandate noise-reduction caps.

Can NCP691MNADJT2G be used with ceramic output capacitors smaller than 1 µF?

No - the datasheet specifies a minimum 1 µF ceramic capacitor on the OUT pin for stability. While larger values (e.g., 10 µF) improve load transient response and noise rejection, using less than 1 µF risks oscillation or loss of regulation under dynamic load conditions. NCP691MNADJT2G is stable with ceramic capacitors but has a hard lower limit.

What is the function of pins 1 and 6 on NCP691MNADJT2G, and can they be used independently?

Pins 1 and 6 are both IN terminals and must be connected together externally to achieve full 1 A output current capability. They are not independent inputs - splitting them reduces current capacity and increases thermal resistance. The dual-pin design lowers package inductance and improves high-frequency PSRR, but requires parallel routing to the input bulk capacitor.

Is NCP691MNADJT2G qualified for automotive applications?

No - NCP691MNADJT2G is not AEC-Q100 qualified. For automotive use, onsemi offers the NCV8690MNADJT2G (same pinout and electrical specs) with NCV prefix, PPAP capability, and extended temperature support (−40°C to +150°C junction). NCP691MNADJT2G is rated for −40°C to +125°C and intended for industrial and consumer portable equipment.

NCP691MNADJT2G Specifications

Product attributes: Attribute value

Manufacturer:: onsemi

Series:: -

Package/Case:: 6-VDFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Output Configuration:: Positive

Output Type:: Adjustable

Number of Regulators:: 1

Voltage - Input (Max):: 6V

Voltage - Output (Min/Fixed):: 1.25V

Voltage - Output (Max):: 5V

Voltage Dropout (Max):: 0.47V @ 1A

Current - Output:: 1A

Current - Quiescent (Iq):: 200 µA

Current - Supply (Max):: 240 µA

PSRR:: 62dB ~ 40dB (120Hz ~ 10kHz)

Control Features:: Enable

Protection Features:: Over Temperature, Short Circuit

Operating Temperature:: -40°C ~ 85°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 6-DFN (3x3)

NCP691MNADJT2G FAQ

1.How can I place an order for NCP691MNADJT2G through Aetrix?

Please submit a Request for Quotation (RFQ) for NCP691MNADJT2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for NCP691MNADJT2G reliable?

The price and inventory of NCP691MNADJT2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP691MNADJT2G is usually 5 days.

3.What payment methods are accepted for NCP691MNADJT2G?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP691MNADJT2G transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for NCP691MNADJT2G?

NCP691MNADJT2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your NCP691MNADJT2G order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for NCP691MNADJT2G?

For technical support, including NCP691MNADJT2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP691MNADJT2G requirements.

6.How does Aetrix verify that NCP691MNADJT2G is sourced from the original manufacturer or authorized distributors?

All NCP691MNADJT2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP691MNADJT2G meets industry standards.

7.What is the process for return or replacement of NCP691MNADJT2G?

All NCP691MNADJT2G units undergo pre-shipment inspection (PSI). If there is an issue with NCP691MNADJT2G, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The NCP691MNADJT2G part is unused and in its original packaging.

Return procedure for NCP691MNADJT2G:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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