My Inquiry
My Account
onsemi NCP700BMT25TBG
- Part No.:
- NCP700BMT25TBG
- Manufacturer:
- onsemi
- Package:
- 6-WFDFN
- Datasheet:
-
NCP700BMT25TBG.pdf
- Description:
- IC REG LINEAR 2.5V 200MA 6WDFN
- Quantity:
- Payment:
- Shipping:
Inventory:2,306
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NCP700BMT25TBG from onsemi is a 200 mA ultra-low-noise, high-PSRR LDO regulator in WDFN6 (1.5 mm × 1.5 mm) package, delivering 2.5 V ±2.5% output with 10 µVRMS noise (10 Hz–100 kHz), 82 dB PSRR at 1 kHz, and 115 mV dropout at 200 mA - engineered for RF power amplifier biasing in smartphones and noise-sensitive analog signal chains.
For engineers reviewing the NCP700BMT25TBG datasheet, pinout, applications, or equivalent options, key selection criteria include its BiCMOS process enabling simultaneous low ground current (70 µA no-load), active discharge (1 kΩ), enable threshold (0.4–1.2 V), and stability with 1 µF ceramic output capacitors - critical for space-constrained portable designs.
Technical Context
The NCP700BMT25TBG uses a BiCMOS architecture to merge bipolar precision (ultra-low noise, high PSRR) with CMOS efficiency (70 µA no-load ground current). Its internal bandgap reference is accessible via the BYP pin, allowing external 10–100 nF capacitors to reduce output noise below 10 µVRMS.
It integrates logic-level enable control (EN pin with 5 MΩ internal pull-down), active discharge circuitry (1 kΩ path to GND), thermal shutdown (150 °C trip, 135 °C reset), and current limiting (310 mA typical). The regulator remains stable with ≥1 µF ceramic COUT and requires no minimum load.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | 2.5 V ±2.5% - tight regulation across −40 °C to +125 °C junction temperature, suitable for precision analog rails. |
| Max Output Current | 200 mA - supports RF PA biasing and multi-rail subsystems without thermal derating at ambient. |
| Dropout Voltage | 115 mV @ 200 mA - enables operation from 2.615 V input, ideal for single-cell Li-ion (2.7–4.2 V) systems. |
| Output Noise | 10 µVRMS (10 Hz–100 kHz, Cnoise = 100 nF) - meets stringent RF supply cleanliness requirements for 5G front-end modules. |
| PSRR | 82 dB @ 1 kHz - suppresses switching noise from adjacent DC/DC converters feeding shared battery rails. |
| Ground Current | 70 µA @ no load - extends battery life in always-on sensor nodes and standby modes. |
| Enable Threshold | 0.4 V (low) / 1.2 V (high) - compatible with 1.8 V and 3.3 V GPIOs without level-shifting. |
Pinout & Package
Package: WDFN6 (1.5 mm × 1.5 mm, 0.75 mm height, Case 511BJ), thermally enhanced with exposed thermal pad (Pin 2 = GND).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IN) | Input voltage supply | Accepts 2.5–5.5 V; requires 1 µF ceramic decoupling to GND for line transient immunity. |
| 2 (GND) | Power ground | Primary thermal and electrical reference; connects to PCB thermal pad for 111 °C/W junction-to-board dissipation. |
| 3 (OUT) | Regulated output | Delivers 2.5 V ±2.5%; stable with ≥1 µF X5R/X7R ceramic COUT; no minimum load required. |
| 4 (EN) | Enable control input | Logic-compatible: <0.4 V = OFF (0.1 µA IDIS), >1.2 V = ON; internal 5 MΩ pull-down ensures default-off safety. |
| 5 (NC) | No connect | Not internally bonded; must remain unconnected per design - no routing or soldering permitted. |
| 6 (BYP) | Noise reduction node | Direct access to internal bandgap reference; connect 10–100 nF capacitor to GND to reduce output noise to ≤10 µVRMS. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low output noise | 10 µVRMS (10 Hz–100 kHz) with 100 nF BYP cap - enables clean biasing of GaAs/GaN PAs without added filtering. |
| High PSRR at audio frequencies | 82 dB @ 1 kHz - rejects ripple from buck converters powering baseband ICs sharing same battery source. |
| Active output discharge | 1 kΩ internal discharge path - ensures rapid VOUT decay (<1 ms for 10 µF COUT) during EN deassertion, preventing latch-up in sequenced systems. |
| BiCMOS process integration | Combines bipolar low-noise gain stages with CMOS low-IQ pass elements - achieves 70 µA no-load current without sacrificing PSRR or transient response. |
| Thermal shutdown protection | 150 °C trip / 135 °C reset hysteresis - prevents permanent damage during sustained overload or poor heatsinking in sealed enclosures. |
Applications
| Smartphone RF Power Amplifier Bias | Noise-Sensitive Analog Signal Chain |
|---|---|
Use Scenario: Providing clean 2.5 V bias to LTE/5G power amplifiers in compact smartphone mainboards where battery voltage varies from 3.2–4.2 V. IC Role / Device Role / Timing Role: Low-dropout linear regulator supplying stable, ultra-low-noise VCC_PA rail independent of noisy switched-mode PMIC outputs. Use Value: 10 µVRMS noise and 82 dB PSRR prevent AM-to-PM distortion and EVM degradation in high-order QAM transmissions. | Use Scenario: Powering high-resolution ADCs, DACs, and op-amps in portable medical sensors or audio codecs where supply-induced jitter impacts SNR. IC Role / Device Role / Timing Role: Precision analog LDO delivering 2.5 V reference-grade rail with <2.5% total error over temperature and load. Use Value: 115 mV dropout allows direct use of partially discharged Li-ion cells while maintaining 16-bit ADC full-scale accuracy. |
| Battery-Powered IoT Sensor Node | Portable GPS/GLONASS Receiver |
Use Scenario: Supplying 2.5 V to ultra-low-power microcontrollers and MEMS accelerometers in coin-cell–operated asset trackers. IC Role / Device Role / Timing Role: Always-on LDO with 70 µA no-load ground current and logic-enable shutdown (0.1 µA), minimizing quiescent drain. Use Value: Enables >5-year battery life in sleep mode while supporting fast wake-up (<400 µs turn-on time with 10 nF BYP cap). | Use Scenario: Delivering clean 2.5 V to GNSS RF front-end and baseband processors in handheld navigation devices operating under dynamic RF interference. IC Role / Device Role / Timing Role: High-PSRR LDO rejecting coupling from nearby cellular/Wi-Fi transceivers and internal switching regulators. Use Value: 82 dB PSRR at 1 kHz suppresses conducted noise that would otherwise raise GNSS acquisition threshold and increase time-to-first-fix. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Torex XC6210B252MR-G | 200 mA, 2.5 V, 45 µVRMS noise, 65 dB PSRR @ 1 kHz, SOT-25 package (2.9 × 2.8 mm) | Larger footprint, lower PSRR, higher noise - suitable only where RF sensitivity is relaxed. | Select when board area is not constrained and cost is prioritized over RF performance. |
| Richtek RT9013-25GB | 250 mA, 2.5 V, 30 µVRMS noise, 70 dB PSRR @ 1 kHz, SOT-23-5 package (2.9 × 1.6 mm) | Higher max current but inferior noise/PSRR; lacks active discharge and BYP pin for noise tuning. | Choose for general-purpose 2.5 V rails where fast turn-off and sub-10 µVRMS noise are unnecessary. |
Compared with XC6210B252MR-G and RT9013-25GB, the NCP700BMT25TBG uniquely delivers <10 µVRMS noise via configurable BYP pin, 82 dB PSRR, and active discharge - making it the only option qualified for 5G PA biasing and precision analog subsystems in miniaturized portable designs.
Availability
NCP700BMT25TBG is available at Aetrix Electronics and suitable for smartphone RF power amplifier biasing, portable GNSS receivers, battery-powered IoT sensor nodes, and noise-sensitive analog signal chains requiring stable component supply with guaranteed long-term continuity.
Supply support for NCP700BMT25TBG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NCP700B series is designed specifically for ultra-low-noise, high-PSRR power regulation in RF and precision analog systems - emphasizing BiCMOS process advantages for simultaneous low noise, low IQ, and robust transient response.
FAQ
What is the maximum input voltage rating for the NCP700BMT25TBG?
The NCP700BMT25TBG has an absolute maximum input voltage rating of 6 V. Operation above this value risks permanent damage. For reliable continuous operation, the recommended input range is 2.5 V to 5.5 V - ensuring proper regulation across the full 2.5 V output range while maintaining specified dropout and PSRR performance.
Does the NCP700BMT25TBG require an external capacitor on the BYP pin?
Yes, the NCP700BMT25TBG requires an external capacitor (10–100 nF) between the BYP pin and GND to achieve its specified ultra-low noise performance. Without this capacitor, output noise rises to 15 µVRMS; with 100 nF, it drops to ≤10 µVRMS. The capacitor must be placed directly at the BYP pin with minimal trace length to avoid parasitic inductance degrading noise suppression.
What is the thermal resistance (θJA) of the NCP700BMT25TBG in its WDFN6 package?
The NCP700BMT25TBG in the WDFN6 package (Case 511BJ) has a junction-to-ambient thermal resistance (θJA) of 185 °C/W when mounted on a standard 1 oz FR4 PCB with 645 mm² copper area. This value assumes no additional heatsinking; adding thermal vias under the exposed pad reduces θJA significantly - e.g., 4× thermal vias can improve it by ~30 °C/W.
Can the NCP700BMT25TBG operate without connecting the EN pin?
Yes, the NCP700BMT25TBG can operate without external EN control: its internal 5 MΩ pull-down resistor ensures the device powers on by default when EN is left floating or tied to IN. However, for explicit ON/OFF control - such as power sequencing or low-power sleep states - EN must be driven actively to >1.2 V (ON) or <0.4 V (OFF).
How does the active discharge feature function in the NCP700BMT25TBG?
When the EN pin is pulled low, the NCP700BMT25TBG activates an internal 1 kΩ discharge path from OUT to GND, rapidly discharging the output capacitor. This ensures VOUT falls within milliseconds (e.g., <1 ms for 10 µF COUT), preventing back-powering of upstream circuitry and enabling safe, controlled power-down sequences in multi-rail systems.
NCP700BMT25TBG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 6-WFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 2.5V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.23V @ 200mA
- Current - Output:
- 200mA
- Current - Quiescent (Iq):
- 110 µA
- Current - Supply (Max):
- 130 µA
- PSRR:
- 82dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WDFN (1.5x1.5)
NCP700BMT25TBG FAQ
1.How can I place an order for NCP700BMT25TBG through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP700BMT25TBG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP700BMT25TBG reliable?
The price and inventory of NCP700BMT25TBG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP700BMT25TBG is usually 5 days.
3.What payment methods are accepted for NCP700BMT25TBG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP700BMT25TBG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP700BMT25TBG?
NCP700BMT25TBG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP700BMT25TBG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP700BMT25TBG?
For technical support, including NCP700BMT25TBG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP700BMT25TBG requirements.
6.How does Aetrix verify that NCP700BMT25TBG is sourced from the original manufacturer or authorized distributors?
All NCP700BMT25TBG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP700BMT25TBG meets industry standards.
7.What is the process for return or replacement of NCP700BMT25TBG?
All NCP700BMT25TBG units undergo pre-shipment inspection (PSI). If there is an issue with NCP700BMT25TBG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP700BMT25TBG part is unused and in its original packaging.
Return procedure for NCP700BMT25TBG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NCP700BMT25TBG Tags
-
MIC5504-1.8YM5-TR
Microchip Technology
-
MIC5504-3.3YM5-TR
Microchip Technology
-
MIC5365-3.0YC5-TR
Microchip Technology
-
MIC5365-1.8YC5-TR
Microchip Technology
-
MIC5365-2.5YC5-TR
Microchip Technology
-
MIC5365-3.3YC5-TR
Microchip Technology
-
MIC5365-3.3YD5-TR
Microchip Technology
-
MIC5317-3.3YM5-TR
Microchip Technology
-
TLV1117LV33DCYR
Texas Instruments
-
MIC5317-3.3YMT-TZ
Microchip Technology
-
MIC5528-3.3YMT-TR
Microchip Technology
-
TLV75801PDRVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
