onsemi NCP700MN180R2G

Overview

NCP700MN180R2G from onsemi is a 200 mA ultra-low-noise, high-PSRR BiCMOS LDO regulator delivering a precise 1.8 V output with 15 µV_RMS noise (typ), 80 dB PSRR (typ at 1 kHz), and 140 mV dropout at 200 mA - engineered for RF power amplifier biasing in cellular handsets and other noise-sensitive analog circuits.

For engineers reviewing the NCP700MN180R2G datasheet, pinout, applications, or equivalent options, key selection criteria include its DFN6 2×2.2 mm package, C_noise-pin-enabled noise reduction, active discharge capability, thermal shutdown protection, and stable operation with ≥1 µF ceramic output capacitors.

Technical Context

The NCP700MN180R2G integrates a bipolar-based error amplifier and PMOS pass device in a BiCMOS process to simultaneously achieve ultra-low output noise and low ground current (70–220 µA across load). Its reference voltage node is externally accessible via the C_noise pin, enabling direct bypassing to reduce noise from 20 µV_RMS to 15 µV_RMS using a 100 nF capacitor.

It features logic-controlled enable (CE) with 0.4 V/1.2 V thresholds, active discharge circuitry that sinks output capacitance when disabled, and thermal shutdown with 150 °C trip point and 20 °C hysteresis. Dropout voltage remains ≤140 mV at full 200 mA load and 25 °C ambient.

Key Specifications

Pinout & Package

DFN6 2×2.2 mm package (Case 506BA) with exposed thermal pad (EPAD) fused to pins 2 and 5 for enhanced thermal dissipation (R_θJA = 120 °C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with TPS79518DBVR and MCP1700T-1802E/MB, the NCP700MN180R2G delivers superior noise/PSRR performance and system-level features (active discharge, thermal hysteresis, C_noise pin) in a space-constrained 2×2.2 mm DFN - making it the preferred choice for RF and precision analog power domains.

Availability

NCP700MN180R2G is available at Aetrix Electronics and suitable for cellular handset design, portable instrumentation, GPS module development, and noise-critical analog subsystems requiring stable component supply with full traceability and lifecycle management.

Supply support for NCP700MN180R2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensors, and connectivity solutions for automotive, industrial, and cloud infrastructure markets.

The NCP700MN180R2G belongs to onsemi's high-performance RF LDO family, designed specifically to meet stringent noise and PSRR requirements of cellular transceivers, wireless infrastructure, and precision analog signal chains.

FAQ

What is the maximum input voltage rating for the NCP700MN180R2G?

The NCP700MN180R2G has an absolute maximum input voltage (Vin) rating of −0.3 V to 6 V. Operation above 5.5 V is outside the recommended operating conditions and may compromise reliability or regulation accuracy. For continuous operation, keep Vin between 2.5 V and 5.5 V per the Electrical Characteristics table.

Does the NCP700MN180R2G require an external capacitor on the Cnoise pin?

Yes - the Cnoise pin must be connected to GND via a capacitor (10 nF to 100 nF) to achieve specified ultra-low noise performance. Without this capacitor, output noise rises to 20 µV_RMS. The datasheet confirms 15 µV_RMS is only attainable with 100 nF on Cnoise, and 10 nF yields 20 µV_RMS.

Can the NCP700MN180R2G operate stably with a 1 µF ceramic output capacitor?

Yes - the NCP700MN180R2G is explicitly characterized and guaranteed stable with a minimum 1 µF ceramic output capacitor (e.g., Murata GRM219R71E105K), and no ESR minimum is required. This eliminates need for bulkier or higher-ESR alternatives in space-constrained designs.

What is the purpose of the active discharge feature in the NCP700MN180R2G?

The active discharge circuit rapidly pulls down the Vout node when the CE pin is driven low, preventing slow decay through load impedance. This ensures fast, deterministic power-down sequencing - critical in multi-rail systems where uncontrolled floating voltages could cause latch-up or data corruption in downstream ICs.

How does thermal shutdown behave in the NCP700MN180R2G during sustained overload?

When junction temperature exceeds 150 °C (typ), the NCP700MN180R2G disables Vout and enters thermal shutdown. It remains off until temperature falls below ~130 °C (150 °C − 20 °C hysteresis), then resumes regulation automatically - preventing thermal runaway while avoiding oscillatory on/off cycling during marginal thermal conditions.