onsemi NCP700MN280R2G

Overview

NCP700MN280R2G from onsemi is a 200 mA ultra-low-noise, high-PSRR BiCMOS LDO regulator optimized for RF power amplifier supply in cellular handsets. It delivers a precise 2.8 V ±2% output with 15 µV_rms noise (10 Hz–100 kHz), 80 dB PSRR at 1 kHz, and 150 mV dropout at 200 mA - enabling clean biasing of sensitive analog/RF circuitry.

For engineers reviewing the NCP700MN280R2G datasheet, pinout, applications, or equivalent options, key selection criteria include low-noise performance under 200 mA load, DFN6 2×2.2 mm package compatibility, active discharge capability, and Cnoise pin support for external 10–100 nF noise-reduction capacitors.

Technical Context

The NCP700MN280R2G integrates a bandgap reference, error amplifier, and PMOS pass device in a BiCMOS process to achieve ultra-low noise and high PSRR while maintaining 110 µA ground current at full 200 mA load. Its Cnoise pin provides direct access to the internal reference node for external filtering.

It features logic-controlled enable (CE) with 0.4 V/1.2 V thresholds, active discharge circuitry for fast turn-off, thermal shutdown at 150 °C with 20 °C hysteresis, and current limiting set to 200 mA (min) - all operating across −40 °C to +85 °C ambient temperature.

Key Specifications

Pinout & Package

Package: DFN6 2×2.2 mm, 0.65 mm pitch, exposed thermal pad (EPAD). Pin 2 and Pin 5 are internally fused to GND; EPAD must be soldered to PCB ground plane for thermal and electrical performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with TPS79528DRVR and MCP1703T-2802E/MB, the NCP700MN280R2G uniquely combines 15 µV_rms noise, 80 dB PSRR, active discharge, and 150 mV dropout in a 2×2.2 mm DFN - making it optimal for space-constrained, noise-critical RF and precision analog designs.

Availability

NCP700MN280R2G is available at Aetrix Electronics and suitable for cellular handset power amplifiers, portable GPS receivers, battery-powered PDAs, and noise-sensitive analog instrumentation requiring stable component supply across production lifecycles.

Supply support for NCP700MN280R2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient electronics, with leadership in power management, analog, and sensor technologies.

The NCP700MN280R2G belongs to onsemi's ultra-low-noise RF LDO family, engineered specifically for clean power delivery in cellular transceivers, wireless infrastructure, and precision analog systems.

FAQ

What is the maximum input voltage rating for the NCP700MN280R2G?

The NCP700MN280R2G has an absolute maximum input voltage (Vin) rating of 6 V. Operation above this level risks permanent damage. For reliable function, the recommended input range is 2.5 V to 5.5 V - ensuring proper regulation while maintaining 150 mV dropout margin at 200 mA load. The NCP700MN280R2G must never be subjected to reverse input voltage or transient spikes exceeding −0.3 V.

How does the Cnoise pin improve output noise performance in the NCP700MN280R2G?

The Cnoise pin on the NCP700MN280R2G provides direct access to the internal bandgap reference node, allowing external 10–100 nF capacitors to shunt reference noise before amplification. With a 100 nF capacitor, the NCP700MN280R2G achieves 15 µV_rms output noise (10 Hz–100 kHz); using 10 nF yields 20 µV_rms. This feature is absent in standard LDOs and makes the NCP700MN280R2G uniquely suited for RF and high-SNR analog applications.

Does the NCP700MN280R2G require an external capacitor on the CE pin for stable enable/disable operation?

No, the NCP700MN280R2G does not require an external capacitor on the CE pin. It includes an internal 5 MΩ pull-down resistor between CE and GND, ensuring reliable disable behavior when the pin is left floating or driven low. The CE threshold is guaranteed at 0.4 V (max low) and 1.2 V (min high), supporting direct interfacing with 1.8 V logic without level shifters. The NCP700MN280R2G enters sleep mode drawing ≤1 µA when CE is at 0 V.

What thermal derating applies to the NCP700MN280R2G in a standard 1 oz copper PCB layout?

On a standard 1 oz copper PCB with the NCP700MN280R2G's DFN6 2×2.2 mm package, the junction-to-ambient thermal resistance (R_JA) is 120 °C/W. At 200 mA load with 3.0 V input (150 mV dropout), power dissipation is 30 mW - resulting in ~3.6 °C junction rise above ambient. Derating becomes critical only above 100 mA in enclosed environments; full 200 mA is sustainable up to +85 °C ambient if the EPAD is fully soldered to ≥100 mm² of copper.

Can the NCP700MN280R2G replace the NCP700MN275R2G or NCP700MN300R2G in an existing design?

No - the NCP700MN280R2G is not a drop-in replacement for NCP700MN275R2G (2.75 V) or NCP700MN300R2G (3.0 V), as output voltage is laser-trimmed during manufacturing and not adjustable. Swapping changes the regulated rail by ±25–200 mV, potentially violating downstream IC V_CC tolerances. The NCP700MN280R2G must be used only where 2.8 V ±2% is explicitly required; voltage-specific variants are not interchangeable without circuit validation.