onsemi NCP720BMT110TBG
- Part No.:
- NCP720BMT110TBG
- Manufacturer:
- onsemi
- Package:
- 6-WDFN Exposed Pad
- Datasheet:
-
NCP720BMT110TBG.pdf
- Description:
- IC REG LINEAR 1.1V 350MA 6WDFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,753
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Product details
Overview
NCP720BMT110TBG from onsemi is a 350 mA very low dropout (VLDO) CMOS voltage regulator with NMOS pass transistor and separate VBIAS supply, delivering 1.10 V fixed output at ±2% accuracy over −40°C to +125°C, ultra-low 110 mV typical dropout at full load, and stable operation with 2.2 µF ceramic output capacitor - used in smartphone core logic rails and camera sensor biasing.
For engineers reviewing the NCP720BMT110TBG datasheet, pinout, applications, or equivalent options, key selection criteria include dual-rail input compatibility (VIN: 0.8–5.5 V, VBIAS: 2.4–5.5 V), monotonic soft-start behavior, PSRR >65 dB at 1 kHz, and WDFN6 thermal performance (RJA = 65°C/W).
Technical Context
The NCP720BMT110TBG implements a dual-input NMOS-based VLDO architecture where VIN supplies the pass element and VBIAS powers internal control circuitry, enabling independent optimization of power path and bias stability. Its UVLO monitors VBIAS with 1.6 V turn-on threshold and 0.2 V hysteresis.
It features built-in current limiting (420–800 mA), thermal shutdown at +160°C with +140°C reset, and monotonic soft-start ensuring controlled 140 µs VOUT rise to 95% of 1.10 V nominal without overshoot - critical for noise-sensitive image sensor and processor I/O rails.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.10 V ±2% over −40°C to +125°C - ensures stable core voltage for low-power SoC domains. |
| VIN Dropout | 110 mV typical at 350 mA - enables regulation down to VIN = 1.21 V, supporting single-cell Li-ion post-regulation. |
| VBIAS Dropout | 1.15 V typical - requires VBIAS ≥ 2.25 V for full-load operation, decoupling bias rail design from main input. |
| PSRR @ 1 kHz | 65 dB (VIN), 70 dB (VBIAS) - suppresses switching noise from upstream DC/DC converters feeding VIN or VBIAS. |
| Bias Current | 80 µA typical (active), 0.5 µA typical (shutdown) - minimizes quiescent drain on auxiliary bias supplies. |
| Startup Time | 140 µs to 95% of 1.10 V - prevents system-level brown-out during power-up sequencing. |
| Thermal Resistance | RJA = 65°C/W (WDFN6, 2 mm × 2 mm) - supports 350 mA continuous load with ≤35°C junction rise on standard PCB. |
Pinout & Package
Package: WDFN6 (Case 511BR), 2 mm × 2 mm, 0.65 mm pitch, exposed thermal pad soldered to GND plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - OUT | Regulated output voltage node | Delivers 1.10 V to load; connects directly to 2.2 µF ceramic capacitor with minimal trace inductance. |
| 2 - N/C | Not internally connected | No electrical function; must remain unconnected or floating - not tied to GND or any signal. |
| 3 - EN | Enable control input | Active-high logic: ≥1.1 V enables regulator; ≤0.4 V disables, reducing ground current to 0.5 µA. |
| 4 - BIAS | Bias supply input | Powers internal reference and control circuits; monitored by UVLO; requires ≥2.25 V for full-load operation. |
| 5 - GND | Ground reference | Common return for IN, OUT, EN, BIAS; thermal pad must be soldered to PCB ground plane for RJA compliance. |
| 6 - IN | Main input voltage supply | Feeds NMOS pass transistor; minimum VIN = 1.21 V (1.10 V + 110 mV dropout) at 350 mA. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-rail input architecture | Separate VIN (0.8–5.5 V) and VBIAS (2.4–5.5 V) inputs enable optimized power delivery: VIN handles high-current pass path, VBIAS powers low-noise control circuitry. |
| Monotonic soft-start | 140 µs controlled VOUT ramp to 95% of 1.10 V eliminates inrush current spikes and prevents system reset during power-up. |
| Ultra-low noise & high PSRR | 40 µVRMS output noise (10 Hz–100 kHz); 70 dB PSRR at 1 kHz on VBIAS - preserves signal integrity in camera ISP and ADC reference rails. |
| Stability with small ceramics | Guaranteed stable with 2.2 µF–10 µF X5R/X7R ceramic capacitors - eliminates need for bulky tantalum or electrolytic output caps in space-constrained mobile designs. |
| Integrated protection | Current limit (420–800 mA), thermal shutdown (+160°C trip, +140°C reset), and VBIAS UVLO (1.6 V with 0.2 V hysteresis) provide robust fault handling without external components. |
Applications
| Smartphone Application Processor Core Rail | Camera Sensor Bias Supply |
|---|---|
|
Use Scenario: Powering ARM Cortex-A series CPU cores requiring tightly regulated 1.10 V at up to 350 mA with fast transient response. IC Role / Device Role / Timing Role: Primary post-regulator converting switched-mode 1.8 V intermediate rail to clean 1.10 V core voltage. Use Value: 110 mV dropout allows operation down to 1.21 V VIN, extending battery runtime; 65 dB PSRR rejects DC/DC ripple at 1 kHz. |
Use Scenario: Supplying analog front-end and pixel array bias for 13 MP+ CMOS image sensors in smartphones and tablets. IC Role / Device Role / Timing Role: Low-noise, fixed-output LDO delivering stable 1.10 V to sensor analog blocks and PLLs. Use Value: 40 µVRMS output noise and 70 dB VBIAS PSRR prevent image noise and timing jitter in high-resolution capture modes. |
| Portable DVR Video Encoder Rail | STB SoC I/O Voltage Domain |
|
Use Scenario: Providing regulated 1.10 V to H.264/H.265 video encoder ASICs in battery-powered dashcams and action cameras. IC Role / Device Role / Timing Role: Load-transient-optimized LDO maintaining voltage within ±2% during burst encoding cycles. Use Value: 140 µs soft-start prevents encoder lock-up at boot; 350 mA current capability supports peak encode loads without dropout. |
Use Scenario: Powering 1.10 V I/O banks of set-top box SoCs interfacing with HDMI, USB, and memory controllers. IC Role / Device Role / Timing Role: Fixed-output LDO isolating noise-sensitive I/O interfaces from noisy system power rails. Use Value: Dual-rail architecture lets VBIAS derive from clean LDO while VIN taps noisy buck converter - improving signal integrity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar low-noise, dual-rail LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TI TPS7A2011PDBVR | Single-rail input (1.6–6.0 V), 1.1 V fixed, 300 mA, 150 mV dropout, no VBIAS pin | Lacks VBIAS separation - less effective PSRR on bias path; simpler layout but higher VIN dependency | Select when board space prohibits dual-rail routing and PSRR >60 dB above 100 kHz is not required. |
| Richtek RT9080L-11PU5 | Single-rail input (0.8–5.5 V), 1.1 V fixed, 500 mA, 120 mV dropout, no VBIAS pin, 30 µVRMS noise | Higher current rating but no dedicated bias rail - limits independent optimization of control circuit noise immunity | Select when higher output current (500 mA) is needed and VBIAS decoupling is not critical for system-level noise budget. |
Compared with TPS7A2011PDBVR and RT9080L-11PU5, the NCP720BMT110TBG uniquely provides dual-rail input architecture for independent noise suppression on VIN and VBIAS paths - essential for systems where upstream DC/DC ripple affects both power and control domains.
Availability
NCP720BMT110TBG is available at Aetrix Electronics and suitable for smartphone processor core rails, camera sensor biasing, portable DVR video encoding, and STB SoC I/O domains requiring stable component supply across production lifecycles.
Supply support for NCP720BMT110TBG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensing, and connectivity solutions for automotive, industrial, cloud, and consumer markets.
The NCP720BMT110TBG belongs to onsemi's VLDO linear regulator product line, designed specifically for space-constrained, noise-sensitive portable electronics requiring dual-rail input flexibility and sub-2% output accuracy across wide temperature ranges.
FAQ
What is the exact output voltage tolerance of the NCP720BMT110TBG over temperature?
The NCP720BMT110TBG delivers 1.10 V output with ±2% accuracy across the full operating junction temperature range of −40°C to +125°C, as specified in the Electrical Characteristics table under "Output Voltage Accuracy Over VBIAS, VIN, IOUT, TJ". This tolerance includes all process, voltage, and temperature variations - no binning or external trimming is required.
Can the NCP720BMT110TBG operate with VIN below 1.10 V?
No - the NCP720BMT110TBG requires VIN ≥ VOUT + VDO_IN, and its typical dropout voltage is 110 mV at 350 mA. Therefore, minimum functional VIN is 1.21 V. At lower VIN, regulation fails and VOUT drops proportionally; operation below 1.21 V is outside the guaranteed specification and may cause system instability.
Is the NCP720BMT110TBG pin-compatible with other NCP720 variants like NCP720BMT120TBG?
Yes - all NCP720 variants including NCP720BMT110TBG share identical WDFN6 package (Case 511BR), pinout, and thermal pad layout. Only the factory-programmed output voltage differs (1.10 V vs. 1.20 V, etc.), so PCB design is fully reusable across the family without layout changes.
What is the recommended output capacitor for the NCP720BMT110TBG and why?
The NCP720BMT110TBG is stable with 2.2 µF to 10 µF X5R or X7R ceramic capacitors. A 2.2 µF capacitor is the minimum recommended value because it ensures phase margin >45° across temperature and load conditions - verified in the datasheet's stability section and typical characteristics curves.
Does the NCP720BMT110TBG require a bypass capacitor on the BIAS pin?
Yes - the datasheet recommends ≥0.1 µF ceramic capacitor between BIAS and GND, placed as close as possible to the pin. This stabilizes the internal reference and control circuitry against high-frequency noise on the bias rail, preventing erratic enable behavior or degraded PSRR performance.
NCP720BMT110TBG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 6-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.1V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 1.4V @ 350mA
- Current - Output:
- 350mA
- Current - Quiescent (Iq):
- -
- Current - Supply (Max):
- -
- PSRR:
- 65dB ~ 25dB (1kHz ~ 1MHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WDFN (2x2)
NCP720BMT110TBG FAQ
1.How can I place an order for NCP720BMT110TBG through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP720BMT110TBG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP720BMT110TBG reliable?
The price and inventory of NCP720BMT110TBG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP720BMT110TBG is usually 5 days.
3.What payment methods are accepted for NCP720BMT110TBG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP720BMT110TBG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP720BMT110TBG?
NCP720BMT110TBG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP720BMT110TBG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP720BMT110TBG?
For technical support, including NCP720BMT110TBG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP720BMT110TBG requirements.
6.How does Aetrix verify that NCP720BMT110TBG is sourced from the original manufacturer or authorized distributors?
All NCP720BMT110TBG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP720BMT110TBG meets industry standards.
7.What is the process for return or replacement of NCP720BMT110TBG?
All NCP720BMT110TBG units undergo pre-shipment inspection (PSI). If there is an issue with NCP720BMT110TBG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP720BMT110TBG part is unused and in its original packaging.
Return procedure for NCP720BMT110TBG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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