onsemi NCP720BMT125TBG
- Part No.:
- NCP720BMT125TBG
- Manufacturer:
- onsemi
- Package:
- 6-WDFN Exposed Pad
- Datasheet:
-
NCP720BMT125TBG.pdf
- Description:
- IC REG LINEAR 1.25V 350MA 6WDFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,504
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NCP720BMT125TBG from onsemi is a 350 mA very low dropout (VLDO) CMOS voltage regulator with NMOS pass transistor and separate VBIAS supply, delivering 1.25 V fixed output at ±2% accuracy over −40°C to +125°C. It achieves 110 mV typical dropout at full load, supports 0.8–5.5 V input and 2.4–5.5 V bias rails, and operates stably with only a 2.2 µF ceramic output capacitor - ideal for space-constrained, noise-sensitive portable power rails.
For engineers reviewing the NCP720BMT125TBG datasheet, pinout, applications, or equivalent options, key selection criteria include dual-rail operation (VIN/VBIAS), ultra-low bias current (80 µA typ), monotonic soft-start, thermal shutdown (160°C trip), and WDFN6 2 mm × 2 mm package compatibility with high-density PCB layouts.
Technical Context
The NCP720BMT125TBG implements a dual-supply architecture: VIN powers the NMOS pass element while VBIAS independently supplies internal control circuitry, enabling stable regulation even when VIN approaches VOUT. This decoupling allows ultra-low dropout (110 mV) and reduces sensitivity to input capacitance placement.
Its built-in soft-start ensures monotonic VOUT rise to limit inrush current; enable logic includes hysteresis (VEN(HI) = 1.1 V, VEN(LO) = 0.4 V); and under-voltage lockout triggers at 1.6 V on VBIAS with 0.2 V hysteresis. PSRR exceeds 65 dB at 1 kHz for both VIN and VBIAS inputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.25 V ±2% over −40°C to +125°C - ensures precise core/I/O rail compliance without external feedback. |
| VIN Dropout Voltage | 110 mV typical at 350 mA - enables operation down to VIN = 1.36 V for 1.25 V output, critical for battery brownout resilience. |
| VBIAS Dropout Voltage | 1.15 V typical at 350 mA - defines minimum VBIAS = 2.4 V required to sustain regulation, independent of VIN. |
| Bias Pin Current | 80 µA typical across load and temperature - minimizes auxiliary supply burden in multi-rail systems. |
| PSRR @ 1 kHz | 65 dB for both VIN and VBIAS - suppresses switching noise from upstream DC/DC converters feeding either rail. |
| Shutdown Current | 0.5 µA typical - enables deep-sleep power gating in always-on subsystems. |
| Thermal Shutdown | 160°C trip / 140°C reset - provides self-protecting operation under sustained overload or poor heatsinking. |
Pinout & Package
Package: WDFN6 2 mm × 2 mm (Case 511BR), thermally enhanced with exposed pad soldered to ground plane (RJA = 65°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - OUT | Regulated output voltage node | Delivers stable 1.25 V to load; requires direct connection to 2.2 µF ceramic capacitor with minimal trace inductance. |
| 2 - N/C | No internal connection | Must remain unconnected; no routing or copper fill allowed to avoid parasitic coupling. |
| 3 - EN | Enable control input | Active-high logic (1.1 V threshold); internal hysteresis prevents chatter during slow-rising control signals. |
| 4 - BIAS | Bias supply input for internal circuitry | Powers reference, error amp, and control logic; must be ≥2.4 V and stable - decoupling capacitor ≥0.1 µF required. |
| 5 - GND | Analog/digital ground reference | Common return for IN, OUT, BIAS, and EN; thermal pad must be soldered to PCB ground plane for thermal performance. |
| 6 - IN | Main input voltage supply | Feeds NMOS pass transistor; requires ≥1 µF ceramic input capacitor close to pin to suppress PCB inductance effects. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-rail NMOS architecture | Separates power path (VIN→OUT) from control logic supply (VBIAS), enabling lower dropout and improved PSRR vs. single-rail LDOs. |
| Monotonic soft-start | Guarantees controlled 140 µs VOUT rise to 95% of 1.25 V, eliminating output overshoot and limiting inrush into downstream capacitive loads. |
| Ultra-low bias current | 80 µA typical active current and 0.5 µA shutdown current reduce auxiliary supply loading - essential for multi-rail battery systems. |
| Stable with small ceramics | Validated for 2.2 µF–10 µF ceramic output capacitors without external compensation - simplifies layout and lowers BOM cost. |
| Integrated protection | Includes current limit (420–800 mA), thermal shutdown (160°C), and VBIAS UVLO (1.6 V) - eliminates need for discrete protection circuitry. |
Applications
| Mobile Application Processor Core Rail | Low-Power IoT Sensor Node Power |
|---|---|
|
Use Scenario: Powers ARM Cortex-A/M series CPU cores requiring tightly regulated 1.25 V at up to 350 mA with fast transient response. IC Role / Device Role / Timing Role: Primary post-regulator converting switched-mode output (e.g., buck converter at 2.5 V) to clean, low-noise core voltage. Use Value: 65 dB PSRR at 1 kHz rejects ripple from upstream DC/DC; 110 mV dropout extends battery runtime during discharge. |
Use Scenario: Supplies microcontroller, BLE radio, and analog sensor interface in coin-cell–powered wearables. IC Role / Device Role / Timing Role: Ultra-low-quiescent linear regulator providing always-on 1.25 V rail with sub-µA shutdown current. Use Value: 0.5 µA shutdown current preserves battery life; 2.2 µF ceramic stability enables smallest possible footprint. |
| Camera Module I/O Interface | STB/OTT Set-Top Box Memory Rail |
|
Use Scenario: Delivers clean 1.25 V to image signal processor (ISP) I/O banks and MIPI CSI-2 interface circuitry. IC Role / Device Role / Timing Role: Noise-sensitive LDO filtering switching noise from shared system power rail before high-speed digital interfaces. Use Value: 40 µVRMS output noise and >65 dB PSRR prevent bit errors and jitter in high-speed serial links. |
Use Scenario: Regulates DDR3/LPDDR4 memory termination and I/O voltage in compact STB designs with tight thermal constraints. IC Role / Device Role / Timing Role: Compact-area, thermally robust LDO replacing larger SOIC alternatives in dense multilayer boards. Use Value: WDFN6 2 mm × 2 mm package with exposed thermal pad achieves 65°C/W RJA, enabling 350 mA in confined spaces. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar low-dropout, dual-rail voltage regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS7A2025PDQNR | Single-rail 250 mA LDO; no VBIAS input; 170 mV dropout at 300 mA; 6.5 µA IQ. | Lacks dual-rail flexibility and ultra-low dropout - suitable only where VBIAS is unavailable or VIN margin >200 mV. | Select when board space permits larger package and system lacks dedicated bias rail. |
| MCP1826T-12501E/DB | Single-rail 500 mA LDO; 250 mV dropout at 500 mA; ±2% accuracy; no soft-start or VBIAS support. | Higher dropout and no monotonic start - risks inrush in high-capacitance loads; no bias rail optimization. | Choose for cost-sensitive, non-battery applications where 250 mV dropout is acceptable and soft-start not required. |
Compared with TPS7A2025PDQNR and MCP1826T-12501E/DB, the NCP720BMT125TBG uniquely delivers dual-rail operation, 110 mV dropout, and monotonic soft-start in a 2 mm × 2 mm package - making it optimal for battery-powered systems demanding maximum efficiency and noise immunity.
Availability
NCP720BMT125TBG is available at Aetrix Electronics and suitable for mobile processor core rails, IoT sensor nodes, camera module I/O interfaces, and STB memory power applications requiring stable component supply, long-term lifecycle support, and Pb-free WDFN packaging.
Supply support for NCP720BMT125TBG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NCP720BMT125TBG belongs to onsemi's VLDO regulator product line, engineered specifically for space-constrained, noise-sensitive portable electronics requiring dual-rail flexibility and ultra-low dropout performance.
FAQ
What is the exact output voltage tolerance and temperature range for the NCP720BMT125TBG?
The NCP720BMT125TBG delivers a factory-programmed fixed 1.25 V output with ±2% accuracy over the full operating junction temperature range of −40°C to +125°C. This specification is verified per the Electrical Characteristics table in the official onsemi datasheet (Rev. 3, December 2024), with test conditions including VBIAS ≥ (VOUT + 1.4 V), VIN ≥ VOUT + 0.5 V, and load current from 0 to 350 mA.
Does the NCP720BMT125TBG require an external feedback resistor network?
No, the NCP720BMT125TBG is a fixed-output voltage regulator with factory-trimmed internal feedback. Its 1.25 V output is set permanently during manufacturing - no external resistors, dividers, or compensation components are needed. This simplifies design, reduces BOM count, and eliminates drift-related inaccuracies associated with external networks.
Can the NCP720BMT125TBG operate with only the VIN supply, without connecting VBIAS?
No. The NCP720BMT125TBG requires both VIN and VBIAS to function: VIN powers the NMOS pass transistor, while VBIAS supplies all internal control circuitry including the reference, error amplifier, and enable logic. If VBIAS is unconnected or below 1.6 V (UVLO threshold), the device remains disabled regardless of EN state or VIN level.
What is the minimum recommended output capacitor for stable operation of the NCP720BMT125TBG?
The NCP720BMT125TBG is stable with a minimum effective output capacitance of 2.2 µF using X5R/X7R ceramic capacitors. The datasheet confirms stability across 2.2 µF to 10 µF, and recommends direct placement of the capacitor on the OUT pin with minimal trace length - no ESR requirements or external compensation are needed.
Is the NCP720BMT125TBG pin-compatible with other variants in the NCP720 family?
Yes, all NCP720 variants - including NCP720BMT125TBG, NCP720BMT150TBG, and NCP720BMT180TBG - share identical WDFN6 2 mm × 2 mm pinout and package dimensions (Case 511BR). Output voltage is the only functional difference; no PCB layout changes are required when substituting between fixed-voltage versions.
NCP720BMT125TBG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 6-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.25V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 1.4V @ 350mA
- Current - Output:
- 350mA
- Current - Quiescent (Iq):
- -
- Current - Supply (Max):
- -
- PSRR:
- 65dB ~ 25dB (1kHz ~ 1MHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WDFN (2x2)
NCP720BMT125TBG FAQ
1.How can I place an order for NCP720BMT125TBG through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP720BMT125TBG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP720BMT125TBG reliable?
The price and inventory of NCP720BMT125TBG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP720BMT125TBG is usually 5 days.
3.What payment methods are accepted for NCP720BMT125TBG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP720BMT125TBG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP720BMT125TBG?
NCP720BMT125TBG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP720BMT125TBG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP720BMT125TBG?
For technical support, including NCP720BMT125TBG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP720BMT125TBG requirements.
6.How does Aetrix verify that NCP720BMT125TBG is sourced from the original manufacturer or authorized distributors?
All NCP720BMT125TBG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP720BMT125TBG meets industry standards.
7.What is the process for return or replacement of NCP720BMT125TBG?
All NCP720BMT125TBG units undergo pre-shipment inspection (PSI). If there is an issue with NCP720BMT125TBG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP720BMT125TBG part is unused and in its original packaging.
Return procedure for NCP720BMT125TBG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NCP720BMT125TBG Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

