onsemi NCP752ASN18T1G
- Part No.:
- NCP752ASN18T1G
- Manufacturer:
- onsemi
- Package:
- SOT-23-5 Thin, TSOT-23-5
- Datasheet:
-
NCP752ASN18T1G.pdf
- Description:
- IC REG LINEAR 1.8V 200MA 5TSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NCP752ASN18T1G from onsemi is a 200 mA ultra-low-noise, ultra-low-quiescent-current LDO regulator with fixed 1.8 V output, designed for RF-sensitive power domains in portable electronics. It delivers ±2% output accuracy over load/line/temperature, 130 mV typical dropout at 200 mA, 11.5 µVRMS noise (100 Hz–100 kHz), and 68 dB PSRR at 1 kHz - enabling clean biasing of power amplifiers in satellite radios and infotainment systems.
For engineers reviewing the NCP752ASN18T1G datasheet, pinout, applications, or equivalent options, key selection criteria include its Auto Low-Power Mode (12 µA IQ), active output discharge, open-drain Power Good flag, and stability with only a 1 µF ceramic output capacitor - critical for space-constrained battery-powered designs requiring fast turn-off and low standby leakage.
Technical Context
The NCP752ASN18T1G integrates a PMOS pass transistor with adaptive ground current control to maintain ultra-low quiescent current across input voltage (2.0–5.5 V) and load conditions. Its internal bandgap reference, soft-start circuitry, and thermal shutdown (160°C trip, 20°C hysteresis) ensure robust operation during load transients and fault events.
It features dual-mode enable logic (EN threshold: 0.4 V low, 0.9 V high), programmable Power Good detection (92–96% VOUT rising/falling thresholds), and built-in short-circuit protection (typ. 400 mA limit). The device operates without external noise-bypass capacitors and supports reverse-current protection awareness via its inherent body diode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.8 V ±2% - ensures stable core/bias rail for 1.8 V logic and RF ICs without external feedback. |
| Max Output Current | 200 mA continuous - sufficient for powering baseband processors, RF front-ends, or sensor subsystems in handheld devices. |
| Dropout Voltage | 130 mV typical at 200 mA - enables regulation from 2.0 V input down to 1.8 V output, maximizing battery runtime. |
| Quiescent Current | 12 µA typical at no load - extends shelf life and operational time in always-on, low-duty-cycle IoT sensors. |
| Output Noise | 11.5 µVRMS (100 Hz–100 kHz) - eliminates need for external noise-filtering caps, simplifying layout near noise-sensitive PA stages. |
| PSRR | 68 dB at 1 kHz - suppresses switching noise from upstream DC-DC converters feeding the LDO input. |
| Power Good Flag | Open-drain PG with 92–96% VOUT hysteresis - provides reliable system-level power sequencing and fault monitoring. |
Pinout & Package
Package: XDFN-6 (1.5 mm × 1.5 mm, 0.5 mm pitch, Case 711AE), thermally enhanced with exposed pad for PCB heat sinking.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IN) | Input supply connection | Accepts 2.0–5.5 V; requires ≥1 µF ceramic capacitor to GND for stability and transient response. |
| 2 (PG) | Open-drain Power Good output | Pulls low when VOUT drops below 92% nominal; requires external pull-up for host MCU monitoring. |
| 3 (GND) | Power ground reference | Connected to die via lead frame; must be soldered to large copper plane for thermal dissipation (RJA = 149 °C/W). |
| 4 (EN) | Enable control input | Logic-high (>0.9 V) enables regulation; logic-low (<0.4 V) disables output and activates active discharge. |
| 5 (N/C) | No-connect terminal | Internally unconnected; may be tied to GND to improve thermal conduction without electrical impact. |
| 6 (OUT) | Regulated output | Delivers 1.8 V ±2%; stable with 1 µF ceramic cap; active discharge pulls OUT to GND within ~1 ms after EN deassertion. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low noise without bypass cap | 11.5 µVRMS noise performance achieved with no external noise-reduction capacitor - reduces BOM count and board area. |
| Auto Low-Power Mode | Reduces quiescent current to 12 µA at zero load - critical for multi-year battery life in wearables and remote sensors. |
| Active output discharge | Internal 1 kΩ discharge path pulls OUT to GND within milliseconds of EN deassertion - prevents floating rails and ensures deterministic system reset. |
| Stable with minimal output capacitance | Guaranteed stability with 1 µF ceramic COUT (min 500 nF) and ESR < 700 mΩ - supports compact, low-ESR MLCCs without compensation networks. |
| Integrated protections | Thermal shutdown (160°C), current limiting (~400 mA), and undervoltage lockout (1.2–1.9 V) - eliminate need for external fault management circuitry. |
Applications
| Satellite Radio Power Amplifier Bias | Smartphone Application Processor Core Rail |
|---|---|
Use Scenario: Providing ultra-clean 1.8 V bias to GaAs or SiGe PAs in satellite radio modules where switching noise from DC-DC converters must be suppressed. IC Role / Device Role / Timing Role: Primary low-noise post-regulator delivering stable VCC_PA with high PSRR and minimal ripple. Use Value: Enables >68 dB PSRR rejection of 1 MHz–10 MHz switching artifacts, preserving EVM and adjacent channel leakage ratio (ACLR). |
Use Scenario: Supplying the 1.8 V I/O or core voltage for application processors in smartphones during low-power states (e.g., display-off, background sync). IC Role / Device Role / Timing Role: Always-on LDO maintaining regulated rail while minimizing battery drain during extended idle periods. Use Value: 12 µA quiescent current extends standby time by >30% vs. standard LDOs, validated across −40°C to +85°C ambient. |
| Portable Medical Sensor Node | Bluetooth LE Audio Transceiver Bias |
Use Scenario: Powering low-noise analog front-ends (AFE) and ADCs in wearable ECG/PPG sensors where supply noise directly impacts signal-to-noise ratio (SNR). IC Role / Device Role / Timing Role: Precision analog supply rail generator with tight DC accuracy and low broadband noise. Use Value: ±2% output accuracy and 11.5 µVRMS noise preserve 16-bit ADC effective resolution without post-processing correction. |
Use Scenario: Delivering clean 1.8 V to Bluetooth 5.3 LE audio SoCs (e.g., CSR8675, DA145xx) during synchronous streaming with strict jitter and SNR requirements. IC Role / Device Role / Timing Role: Dedicated low-noise LDO for RF/analog sections, decoupled from noisy digital supply domains. Use Value: Fast load transient response (±90 mV deviation at 200 mA step) maintains RF PLL lock stability during packet bursts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Torex XC6210B182MR-G | 180 mA rated, 25 µA IQ, no PG flag, no active discharge, 150 mV dropout at 180 mA | Lacks Power Good monitoring and fast turn-off capability - unsuitable for systems requiring sequenced power-down or fault reporting. | Select when PG and active discharge are unnecessary and cost sensitivity outweighs noise/efficiency advantages. |
| Richtek RT9080AL-18GJ6F | 200 mA rated, 20 µA IQ, 120 mV dropout, no PG, no active discharge, requires 2.2 µF min COUT | Higher minimum output capacitance and missing PG/active discharge reduce design flexibility in compact, safety-critical systems. | Prefer for simpler, lower-cost implementations where thermal performance and precise sequencing are secondary. |
Compared with the NCP752ASN18T1G, both alternatives trade off critical RF-grade noise performance (11.5 µVRMS), integrated PG signaling, and sub-1 ms active discharge for lower unit cost - making them viable only in non-noise-sensitive, non-sequencing applications.
Availability
NCP752ASN18T1G is available at Aetrix Electronics and suitable for satellite radio modules, smartphone power management, portable medical sensors, and Bluetooth LE audio systems requiring stable component supply, long-lifecycle support, and guaranteed Pb-free compliance.
Supply support for NCP752ASN18T1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (Nasdaq: ON) is a global semiconductor leader delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NCP752 series was engineered specifically for ultra-low-noise, ultra-low-IQ power delivery in battery-constrained RF and portable systems - prioritizing PSRR, transient response, and thermal efficiency over generic LDO versatility.
FAQ
What is the maximum input voltage rating for the NCP752ASN18T1G?
The NCP752ASN18T1G has an absolute maximum input voltage of 6 V. However, its recommended operating input voltage range is 2.0 V to 5.5 V. Operation above 5.5 V risks permanent damage, and sustained operation near 6 V is not advised due to thermal and reliability constraints specified in the Absolute Maximum Ratings table.
Does the NCP752ASN18T1G require an external capacitor on the EN pin?
No, the NCP752ASN18T1G does not require an external capacitor on the EN pin. Its internal deglitch circuitry filters noise on the enable line, and the EN pin has a built-in 100 nA pulldown current source - ensuring reliable disable behavior even when left floating. External filtering is unnecessary unless system-level EMI exceeds the internal immunity.
Can the NCP752ASN18T1G be used with a 0.5 µF output capacitor?
No - the NCP752ASN18T1G requires a minimum effective output capacitance of 500 nF (0.5 µF) for stability, but the datasheet specifies 1.0 µF as the recommended minimum for full margin across temperature, voltage, and manufacturing tolerances. Using exactly 0.5 µF risks instability under DC bias derating or low-temperature conditions, especially with X5R/X7R ceramics.
How does the active discharge function operate in the NCP752ASN18T1G?
When the EN pin voltage falls below 0.4 V, the NCP752ASN18T1G disables the pass transistor and turns on an internal 1 kΩ discharge path between OUT and GND. This pulls the output voltage to ground within approximately 1 ms, preventing residual charge from interfering with downstream logic states or causing undefined reset behavior in tightly coupled systems.
Is the NCP752ASN18T1G compatible with ceramic capacitors having 5 mΩ ESR?
Yes - the NCP752ASN18T1G is explicitly designed for low-ESR ceramic capacitors and imposes no minimum ESR requirement. Its stability is guaranteed for output capacitors with ESR up to 700 mΩ, so 5 mΩ ESR is well within specification and enhances high-frequency PSRR and transient response without risk of oscillation.
NCP752ASN18T1G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- SOT-23-5 Thin, TSOT-23-5
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.8V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- -
- Current - Output:
- 200mA
- Current - Quiescent (Iq):
- 25 µA
- Current - Supply (Max):
- -
- PSRR:
- -
- Control Features:
- Enable, Power Good
- Protection Features:
- Over Current, Over Temperature, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-TSOP
NCP752ASN18T1G FAQ
1.How can I place an order for NCP752ASN18T1G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP752ASN18T1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP752ASN18T1G reliable?
The price and inventory of NCP752ASN18T1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP752ASN18T1G is usually 5 days.
3.What payment methods are accepted for NCP752ASN18T1G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP752ASN18T1G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP752ASN18T1G?
NCP752ASN18T1G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP752ASN18T1G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP752ASN18T1G?
For technical support, including NCP752ASN18T1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP752ASN18T1G requirements.
6.How does Aetrix verify that NCP752ASN18T1G is sourced from the original manufacturer or authorized distributors?
All NCP752ASN18T1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP752ASN18T1G meets industry standards.
7.What is the process for return or replacement of NCP752ASN18T1G?
All NCP752ASN18T1G units undergo pre-shipment inspection (PSI). If there is an issue with NCP752ASN18T1G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP752ASN18T1G part is unused and in its original packaging.
Return procedure for NCP752ASN18T1G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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