onsemi NCV4299CD133R2G
- Part No.:
- NCV4299CD133R2G
- Manufacturer:
- onsemi
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
NCV4299CD133R2G.pdf
- Description:
- IC REG LINEAR 3.3V 150MA 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NCV4299CD133R2G from onsemi is a precision 3.3 V ±2% low-dropout linear voltage regulator delivering up to 150 mA output current in an SOIC-8 package. It features 0.26 V typical dropout at 100 mA, 80 µA quiescent current in active mode, and AEC-Q100 Grade 1 qualification for automotive use. The device integrates reset monitoring (RO), sense warning (SI/SO), adjustable reset threshold (RADJ), and inhibit control (INH) - enabling robust power management in battery-powered microprocessor systems.
For engineers reviewing the NCV4299CD133R2G datasheet, pinout, applications, or equivalent options, key selection criteria include its 3.3 V output accuracy, ultra-low quiescent current under light load, early-warning SI/SO interface, automotive-grade transient tolerance (±40 V reverse, 60 V load dump), and SOIC-8 footprint compatibility with thermal design constraints.
Technical Context
The NCV4299CD133R2G uses a PNP pass transistor architecture to achieve low dropout while maintaining regulation down to VQ = 1.0 V. Its internal bandgap reference and saturation-sense circuitry ensure stable 3.3 V output within ±2% across −40 °C to +150 °C junction temperature.
It embeds three independent supervisory functions: (1) a delay-adjustable reset output (RO) with 17–35 ms programmable delay via external capacitor D; (2) a sense input/output pair (SI/SO) providing early-warning hysteresis (50–130 mV) at 1.36 V nominal threshold; and (3) an inhibit input (INH) that reduces quiescent current to <1.0 µA when asserted low.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | 3.3 V ±2% (3.23–3.37 V); ensures reliable logic-level supply for 3.3 V microcontrollers and peripherals. |
| Max Dropout Voltage | 0.50 V at 100 mA; enables operation with input as low as 3.83 V while sustaining full 150 mA load. |
| Quiescent Current | 80 µA typ. at 100 µA load; extends battery life in always-on automotive modules (e.g., CAN nodes, sensors). |
| Reset Threshold | 2.96–3.16 V (3.3 V version); triggers RO output low when VQ falls outside regulation window. |
| Input Transient Tolerance | ±40 V reverse, +60 V peak transient; withstands ISO 16750-2 load dump without external protection. |
| Operating Temp Range | −40 °C to +150 °C junction; supports under-hood automotive deployment without derating. |
| AEC-Q100 Grade | Grade 1 qualified (−40 °C to +125 °C ambient); meets PPAP requirements for production automotive ECUs. |
Pinout & Package
NCV4299CD133R2G is housed in a Pb-free SOIC-8 (Case 751) package with 1.27 mm pitch, 5.0 mm × 4.0 mm body, and 1.75 mm max height. Thermal resistance is RθJA = 198 °C/W (typ.) on 2 oz copper, 50 mm² pad.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | I | Battery input; requires ceramic bypass capacitor to GND to suppress high-frequency noise and stabilize regulation. |
| 2 | SI | Sense input; connects to resistor divider from Q to set early-warning trip point (e.g., 3.0 V); unused → connect to Q. |
| 3 | RADJ | Reset adjust; sets lower reset threshold (down to 3.5 V) via external divider to Q; unused → connect to GND. |
| 4 | D | Reset delay; charges external capacitor CD to program reset assertion delay (e.g., 100 nF → ~28 ms). |
| 5 | GND | Ground reference; four internal GND pins bonded together; must be low-impedance connection to PCB ground plane. |
| 6 | RO | Reset output; open-collector NPN with 20 kΩ internal pullup to Q; asserts low during undervoltage or thermal shutdown. |
| 7 | SO | Sense output; open-collector NPN with 20 kΩ internal pullup to Q; provides early-warning low signal before RO activates. |
| 8 | Q | 3.3 V regulated output; requires 22 µF output capacitor with ESR ≤ 4 Ω for guaranteed stability across temperature. |
Key Features
| Feature | Design Value |
|---|---|
| Adjustable Reset Threshold | Lowered from default 3.07 V to ≥3.5 V using external resistor divider on RADJ, enabling custom brown-out detection. |
| Early-Warning Sense Interface | SI/SO pair provides programmable hysteresis (50–130 mV) and 1.3–1.5 V trip thresholds, giving MCU time to save state before reset. |
| Ultra-Low Off-State Current | <1.0 µA quiescent current when INH = 0 V, meeting automotive "sleep mode" current budgets (<10 µA system-wide). |
| Integrated Fault Protection | Reverse-battery (−40 V), short-circuit, thermal overload, and load-dump (60 V) protection eliminate need for discrete protection components. |
| Pb-Free SOIC-8 Packaging | RoHS-compliant, MSL Level 1, reflow-compatible up to 265 °C peak; compatible with standard SMT assembly lines. |
Applications
| Automotive Body Control Module | Advanced Driver Assistance System Sensor |
|---|---|
|
Use Scenario: Powering 3.3 V CAN transceivers and microcontrollers in door modules, seat controllers, and lighting ECUs. IC Role / Device Role / Timing Role: Primary 3.3 V LDO supplying logic rails; RO drives MCU reset; SO signals impending brown-out during battery sag. Use Value: Withstands 60 V load dump transients and −40 V reverse polarity without external TVS or diodes, reducing BOM count by 2–3 components. |
Use Scenario: Regulating power for radar/LiDAR sensor SoCs operating in engine bay environments. IC Role / Device Role / Timing Role: Stable 3.3 V supply with thermal shutdown (150 °C trigger) and early-warning SO output to initiate graceful sensor shutdown. Use Value: 150 mA output and 0.26 V dropout allow operation from degraded 6 V battery, extending functional uptime during cold-crank events. |
| Telematics Control Unit | Infotainment System Sub-Regulator |
|
Use Scenario: Supplying 3.3 V to GPS/GNSS receivers and cellular modems requiring low-noise, always-on power. IC Role / Device Role / Timing Role: Always-on LDO with INH-controlled sleep mode; 80 µA IQ enables >10-year battery backup for real-time clock and wake-up logic. Use Value: Inhibit function reduces total system sleep current to <10 µA, satisfying OEM telematics "parking mode" requirements. |
Use Scenario: Generating clean 3.3 V rail for audio codecs, display interfaces, and touch controllers in head units. IC Role / Device Role / Timing Role: Secondary LDO decoupling noisy main 5 V rail; PSRR of 66 dB at 100 Hz suppresses switching noise from DC/DC converters. Use Value: Integrated 20 kΩ pullups on RO/SO eliminate external resistors, saving PCB area and improving reliability over discrete solutions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar low-dropout voltage regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NCV8664CDT33RKG | 3.3 V ±2%, 150 mA, SOIC-8, but lacks SI/SO early-warning and RADJ adjust; only fixed reset threshold (2.93 V). | No early-warning capability; unsuitable where MCU state preservation before reset is required. | Select when cost sensitivity outweighs need for programmable supervision; verify reset timing fits system boot sequence. |
| TLE42744G | 3.3 V ±2%, 150 mA, PG-TO263-5, includes watchdog timer and window reset; higher IQ (120 µA) and larger footprint. | Supports watchdog timeout recovery; not pin-compatible; requires heatsink above 100 mA continuous load. | Choose when system-level fault recovery (e.g., automatic MCU restart after hang) is mandatory; accept layout redesign. |
Compared with NCV4299CD133R2G, NCV8664CDT33RKG offers simpler integration but forfeits early-warning and reset adjust flexibility, while TLE42744G adds watchdog functionality at the cost of higher quiescent current and non-SOIC packaging - making NCV4299CD133R2G optimal for space-constrained, supervision-rich automotive modules.
Availability
NCV4299CD133R2G is available at Aetrix Electronics and suitable for automotive body electronics, ADAS sensor modules, telematics control units, and infotainment subsystems requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for NCV4299CD133R2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor leader focused on energy-efficient innovation, serving automotive, industrial, cloud, and IoT markets with silicon-based solutions for power, analog, sensing, and connectivity.
The NCV4299C series belongs to onsemi's automotive-qualified power management portfolio, designed specifically for robust, low-quiescent-current regulation in harsh-temperature, high-transient automotive environments - including engine control, chassis, and safety-critical systems.
FAQ
What is the output voltage tolerance and load regulation performance of the NCV4299CD133R2G?
The NCV4299CD133R2G delivers a nominal 3.3 V output with ±2% initial accuracy (3.23–3.37 V). Load regulation is specified at ≤30 mV across 1.0 mA to 100 mA output current, ensuring minimal voltage shift during dynamic MCU activity - critical for maintaining digital logic integrity in automotive microcontrollers.
How does the early-warning SI/SO function work in the NCV4299CD133R2G?
The NCV4299CD133R2G uses an internal comparator referenced to a 1.36 V bandgap to monitor SI voltage. When SI drops below the hysteresis-adjusted low threshold (e.g., 1.26–1.44 V), SO pulls low - signaling the MCU to complete pending tasks before RO asserts reset. This gives designers programmable warning time (e.g., 1.3–8.0 µs reaction) to avoid data corruption.
Can the NCV4299CD133R2G operate with input voltages below 5.0 V?
Yes - the NCV4299CD133R2G supports input voltages as low as 4.4 V (recommended minimum for 3.3 V version) and maintains regulation down to a 0.50 V dropout. At 100 mA load, it operates stably with VI ≥ 3.83 V, enabling use in degraded-battery scenarios like cold-cranking or start-stop systems.
What thermal design guidance applies to the NCV4299CD133R2G in SOIC-8 package?
The NCV4299CD133R2G SOIC-8 has RθJA = 198 °C/W on minimal copper and 150.7 °C/W on 150 mm² 2 oz copper. For 150 mA at 13.5 V input, worst-case power dissipation is ~1.5 W - requiring ≥500 mm² copper area or thermal vias to keep TJ < 150 °C. Derating above 100 mA is recommended without enhanced cooling.
Is the NCV4299CD133R2G pin-compatible with other members of the NCV4299C family?
No - the NCV4299CD133R2G (SOIC-8) is not pin-compatible with SOIC-14 variants like NCV4299CD233R2G. While both share identical electrical functionality and pin naming, the SOIC-8 omits the INH pin (relocated to Pin 6 in SOIC-14) and consolidates GND connections. Layout redesign is required when migrating between packages.
NCV4299CD133R2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Last Time Buy
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 45V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- -
- Current - Output:
- 150mA
- Current - Quiescent (Iq):
- 90 µA
- Current - Supply (Max):
- 2 mA
- PSRR:
- 66dB (100Hz)
- Control Features:
- Reset
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 150°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
NCV4299CD133R2G FAQ
1.How can I place an order for NCV4299CD133R2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCV4299CD133R2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCV4299CD133R2G reliable?
The price and inventory of NCV4299CD133R2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCV4299CD133R2G is usually 5 days.
3.What payment methods are accepted for NCV4299CD133R2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCV4299CD133R2G transactions.
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4.How is shipping managed for NCV4299CD133R2G?
NCV4299CD133R2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCV4299CD133R2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCV4299CD133R2G?
For technical support, including NCV4299CD133R2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCV4299CD133R2G requirements.
6.How does Aetrix verify that NCV4299CD133R2G is sourced from the original manufacturer or authorized distributors?
All NCV4299CD133R2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCV4299CD133R2G meets industry standards.
7.What is the process for return or replacement of NCV4299CD133R2G?
All NCV4299CD133R2G units undergo pre-shipment inspection (PSI). If there is an issue with NCV4299CD133R2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCV4299CD133R2G part is unused and in its original packaging.
Return procedure for NCV4299CD133R2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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