Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Voltage Regulators - Linear, Low Drop Out (LDO) Regulators

onsemi NCV4299D1R2G

Name: NCV4299D1R2G
Brand: onsemi
SKU: NCV4299D1R2G
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: NCV4299D1R2G

Manufacturer:: onsemi

Category:: Voltage Regulators - Linear, Low Drop Out (LDO) Regulators

Package:: 8-SOIC (0.154", 3.90mm Width)

Datasheet:: NCV4299D1R2G.pdf

Description:: IC REG LINEAR 5V 150MA 8SOIC

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:1,780

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

NCV4299D1R2G from onsemi is a precision automotive-grade LDO voltage regulator delivering 150 mA at 3.3 V ±2%, with 0.22 V typical dropout at 100 mA, 90 µA quiescent current in active mode, and integrated reset/sense monitoring for microprocessor supervision. It is designed for battery-powered automotive ECUs requiring robust fault protection and early-warning system monitoring.

For engineers reviewing the NCV4299D1R2G datasheet, pinout, applications, or equivalent options, this page provides verified technical context, SO-8 package details, real-world timing behavior of RO/SO signals, thermal derating guidance, and validated alternative parts for automotive power management design.

Technical Context

The NCV4299D1R2G uses a PNP pass transistor architecture to achieve low dropout (≤0.5 V at 100 mA) while maintaining regulation down to input voltages as low as 4.4 V for the 3.3 V output version. Its internal bandgap reference and saturation control circuitry ensure stable output across −40°C to +150°C junction temperature.

It integrates three supervisory functions: an adjustable reset output (RO) with programmable delay via external capacitor D, a sense input/output pair (SI/SO) for early-warning threshold detection (typ. 1.35 V trip), and - in the SO-14 variant - an inhibit function. The SO-8 variant (NCV4299D1R2G) omits INH but retains full RO/SI/SO functionality.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Voltage	3.3 V ±2% (3.23–3.37 V), trimmed and stable over temp and load - ensures reliable MCU core/logic supply within spec.
Max Output Current	150 mA continuous, with 250–500 mA current limit - supports mid-power automotive sensors and interface ICs.
Dropout Voltage	0.22 V (typ) at 100 mA - enables operation from degraded 4.4 V battery during cold-crank conditions.
Quiescent Current	90 µA (typ) at 1 mA load - extends battery life in always-on vehicle modules (e.g., CAN wake-up receivers).
Reset Threshold	2.96–3.16 V (3.3 V version), with adjustable lower bound via RADJ - allows precise brown-out detection before MCU failure.
SO Sense Threshold	1.26–1.44 V (hysteresis 50–130 mV) - provides configurable early-warning window for controlled shutdown sequencing.
Transient Protection	Withstands 60 V load dump peaks and −40 V reverse battery - meets ISO 7637-2 Pulse 5a requirements without external TVS.

Pinout & Package

NCV4299D1R2G is housed in an 8-lead SOIC (SO-8, Case 751, D suffix), Pb-free, with exposed pad not electrically connected. Thermal resistance R_θJA = 172°C/W (50 mm² copper), 144°C/W (150 mm²), or 118°C/W (500 mm²).

Pin	Circuit Role	Design Meaning
1 (I)	Battery Input	Main supply input (−40 V to +45 V); bypass directly to GND with ceramic capacitor to suppress transients.
2 (SI)	Sense Input	Threshold comparator input; connects to resistor divider from Q to set early-warning trip point (e.g., 1.35 V).
3 (RADJ)	Reset Adjust	Adjusts RO trigger threshold downward; connect to GND for default 2.96–3.16 V reset point.
4 (D)	Reset Delay	Charges external capacitor (CD) at 7.1 µA typ; sets power-on reset delay (e.g., 28 ms with 100 nF).
5 (GND)	Ground	Common return for regulator, sense, and reset circuits; must be low-impedance connection to minimize noise coupling.
6 (RO)	Reset Output	Open-collector NPN output (20 kΩ internal pullup to Q); asserts low when V_Q < V_RT, valid down to V_Q = 1.0 V.
7 (SO)	Sense Output	Open-collector NPN output (20 kΩ internal pullup to Q); goes low when SI falls below threshold, enabling graceful MCU shutdown.
8 (Q)	Regulated Output	3.3 V ±2% output; requires 22 µF output capacitor (ESR ≤5.0 Ω) for guaranteed stability across −40°C to +150°C.

Key Features

Feature	Design Value
Automotive Qualified (NCV prefix)	Qualified per AEC-Q100 Grade 1 (−40°C to +125°C ambient), with change control and site traceability.
Early-Warning Supervision	SI/SO monitor provides ≥2.2 µs warning before RO assert, allowing MCU to save state or complete critical tasks.
Low-IQ Power Management	90 µA typical I_Q at 1 mA load enables >1-year battery life in always-on telematics modules (e.g., GNSS trackers).
Integrated Fault Protection	Internal short-circuit, thermal overload, −40 V reverse-battery, and 60 V load-dump protection eliminate need for discrete protection components.
Programmable Reset Timing	Delay time (17–35 ms) and threshold (down to ~2.3 V) are externally adjustable via D and RADJ pins - no firmware changes required.

Applications

Body Control Module (BCM)	Instrument Cluster Display
Use Scenario: Powers 32-bit ARM-based microcontroller and CAN transceivers in a vehicle's central body control unit, operating continuously from 12 V battery with cold-crank survival. IC Role / Device Role / Timing Role: Primary 3.3 V LDO with integrated reset/sense; RO triggers MCU reset during battery dip; SO warns 100+ µs before RO assert to flush LIN bus buffers. Use Value: Eliminates external reset IC and reduces BOM count by 2 components while meeting ISO 16750-2 transient immunity requirements.	Use Scenario: Supplies display controller and touch interface ICs in a digital instrument cluster, where EMI-sensitive analog front-ends require ultra-low-noise, stable 3.3 V rail. IC Role / Device Role / Timing Role: Low-dropout regulator with 2% accuracy and <100 µA I_Q; SO monitors V_Q decay during ignition-off fade-out to initiate safe display shutdown sequence. Use Value: Enables seamless power-down animation without visual artifacts or memory corruption, using only one IC instead of discrete supervisor + LDO.
Telematics Control Unit (TCU)	Rear Camera Module
Use Scenario: Powers LTE modem, GNSS receiver, and eSIM controller in always-connected TCU, requiring low standby current and robust reset coordination during network handover. IC Role / Device Role / Timing Role: Main 3.3 V supply with programmable RO delay (via 100 nF on D pin) to synchronize modem reset with cellular baseband processor wake-up timing. Use Value: Guarantees deterministic boot order between modem and host MCU, avoiding race conditions that cause failed network registration.	Use Scenario: Supplies image signal processor (ISP) and MIPI bridge in rear-view camera module, subject to engine bay temperature extremes and vibration-induced transients. IC Role / Device Role / Timing Role: Automotive LDO with 150°C max junction rating and 60 V load-dump tolerance; RO asserts during alternator surge to halt frame capture and prevent corrupted video stream. Use Value: Prevents camera blackouts or distorted frames during generator switching, improving ADAS reliability without adding TVS diodes or thermal margin.

Body Control Module (BCM)

Instrument Cluster Display

Use Scenario: Powers 32-bit ARM-based microcontroller and CAN transceivers in a vehicle's central body control unit, operating continuously from 12 V battery with cold-crank survival.

IC Role / Device Role / Timing Role: Primary 3.3 V LDO with integrated reset/sense; RO triggers MCU reset during battery dip; SO warns 100+ µs before RO assert to flush LIN bus buffers.

Use Value: Eliminates external reset IC and reduces BOM count by 2 components while meeting ISO 16750-2 transient immunity requirements.

Use Scenario: Supplies display controller and touch interface ICs in a digital instrument cluster, where EMI-sensitive analog front-ends require ultra-low-noise, stable 3.3 V rail.

IC Role / Device Role / Timing Role: Low-dropout regulator with 2% accuracy and <100 µA I_Q; SO monitors V_Q decay during ignition-off fade-out to initiate safe display shutdown sequence.

Use Value: Enables seamless power-down animation without visual artifacts or memory corruption, using only one IC instead of discrete supervisor + LDO.

Telematics Control Unit (TCU)

Rear Camera Module

Use Scenario: Powers LTE modem, GNSS receiver, and eSIM controller in always-connected TCU, requiring low standby current and robust reset coordination during network handover.

IC Role / Device Role / Timing Role: Main 3.3 V supply with programmable RO delay (via 100 nF on D pin) to synchronize modem reset with cellular baseband processor wake-up timing.

Use Value: Guarantees deterministic boot order between modem and host MCU, avoiding race conditions that cause failed network registration.

Use Scenario: Supplies image signal processor (ISP) and MIPI bridge in rear-view camera module, subject to engine bay temperature extremes and vibration-induced transients.

IC Role / Device Role / Timing Role: Automotive LDO with 150°C max junction rating and 60 V load-dump tolerance; RO asserts during alternator surge to halt frame capture and prevent corrupted video stream.

Use Value: Prevents camera blackouts or distorted frames during generator switching, improving ADAS reliability without adding TVS diodes or thermal margin.

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
TLV73333PDBVR	300 mA output, 25 µA I_Q, no integrated reset/sense; SO-8, 3.3 V fixed, ±1% accuracy.	Lacks RO/SO supervision; suitable only for non-safety-critical, low-power logic rails without system monitoring needs.	Select TLV73333PDBVR only if reset supervision is handled elsewhere and higher output current is needed.
TPS7B6733QPWPRQ1	250 mA output, 110 µA I_Q, integrated watchdog timer and enable pin; HTSSOP-16, AEC-Q100 Grade 1.	Includes watchdog and EN control but no SI/SO early-warning path; larger footprint and different pinout.	Choose TPS7B6733QPWPRQ1 when system-level watchdog capability is required and PCB layout allows HTSSOP-16.

Compared with TLV73333PDBVR and TPS7B6733QPWPRQ1, the NCV4299D1R2G uniquely combines 3.3 V/150 mA LDO regulation with dual-path supervision (RO + SI/SO) in an SO-8 package, enabling compact, self-contained power sequencing for automotive microcontrollers without external supervisors.

Availability

NCV4299D1R2G is available at Aetrix Electronics and suitable for automotive body electronics, instrument clusters, and telematics systems requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant sourcing.

Supply support for NCV4299D1R2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi is a global semiconductor leader focused on energy-efficient innovation, with deep expertise in automotive, industrial, and cloud power solutions.

The NCV4299 series belongs to onsemi's automotive power management portfolio, engineered specifically for under-hood and infotainment applications demanding high transient immunity, extended temperature operation, and integrated system supervision.

FAQ

What is the maximum input voltage the NCV4299D1R2G can withstand during load dump events?

The NCV4299D1R2G is rated for 60 V peak transient voltage per ISO 7637-2 Pulse 5a, making it suitable for direct connection to automotive 12 V battery rails without external TVS diodes. This rating applies across the full −40°C to +150°C junction temperature range and is validated in onsemi's AEC-Q100 stress testing.

Does the NCV4299D1R2G support adjustable reset threshold, and how is it configured?

Yes, the NCV4299D1R2G supports adjustable reset threshold via the RADJ pin. Connecting a resistor divider from Q (3.3 V output) to RADJ lowers the default 2.96–3.16 V trigger point; the threshold follows V_THRES = 1.36 V × (R₁ + R₂) / R₂. If RADJ is tied to GND, the device reverts to its factory-trimmed default threshold.

What output capacitor is required for stable operation of the NCV4299D1R2G?

The NCV4299D1R2G requires a minimum 22 µF output capacitor with ESR ≤5.0 Ω for guaranteed stability across −40°C to +150°C. Aluminum electrolytic or tantalum capacitors are recommended; ceramic capacitors with near-zero ESR may cause oscillation and are not advised unless validated per Figure 18 in the datasheet.

How does the SI/SO early-warning function work in the NCV4299D1R2G?

The SI pin accepts a voltage divider from Q; when that voltage drops below 1.26–1.44 V (with 50–130 mV hysteresis), the SO pin pulls low - providing ≥2.2 µs advance notice before RO asserts. This allows the MCU to complete pending tasks (e.g., saving EEPROM data) prior to hard reset, improving system robustness.

Is the NCV4299D1R2G pin-compatible with other variants in the NCV4299 family?

The NCV4299D1R2G (SO-8) shares identical pinout and function with the 3.3 V SO-8 variants (e.g., NCV4299D1G), but is not pin-compatible with SO-14 versions (e.g., NCV4299D2R2G) due to added INH and extra GND pins. All SO-8 variants use the same 8-pin mapping shown in Figure 1 and Table 1 of the datasheet.

NCV4299D1R2G Specifications

Product attributes: Attribute value

Manufacturer:: onsemi

Series:: -

Package/Case:: 8-SOIC (0.154", 3.90mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Output Configuration:: Positive

Output Type:: Fixed

Number of Regulators:: 1

Voltage - Input (Max):: 45V

Voltage - Output (Min/Fixed):: 5V

Voltage - Output (Max):: -

Voltage Dropout (Max):: 0.5V @ 100mA

Current - Output:: 150mA

Current - Quiescent (Iq):: 100 µA

Current - Supply (Max):: 2 mA

PSRR:: 66dB (100Hz)

Control Features:: Reset

Protection Features:: Over Temperature, Reverse Polarity, Short Circuit

Operating Temperature:: -40°C ~ 150°C

Grade:: Automotive

Qualification:: AEC-Q100

Mounting Type:: Surface Mount

Supplier Device Package:: 8-SOIC

NCV4299D1R2G FAQ

1.How can I place an order for NCV4299D1R2G through Aetrix?

Please submit a Request for Quotation (RFQ) for NCV4299D1R2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for NCV4299D1R2G reliable?

The price and inventory of NCV4299D1R2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCV4299D1R2G is usually 5 days.

3.What payment methods are accepted for NCV4299D1R2G?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCV4299D1R2G transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for NCV4299D1R2G?

NCV4299D1R2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your NCV4299D1R2G order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for NCV4299D1R2G?

For technical support, including NCV4299D1R2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCV4299D1R2G requirements.

6.How does Aetrix verify that NCV4299D1R2G is sourced from the original manufacturer or authorized distributors?

All NCV4299D1R2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCV4299D1R2G meets industry standards.

7.What is the process for return or replacement of NCV4299D1R2G?

All NCV4299D1R2G units undergo pre-shipment inspection (PSI). If there is an issue with NCV4299D1R2G, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The NCV4299D1R2G part is unused and in its original packaging.

Return procedure for NCV4299D1R2G:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-09 Counterfeit Electronic Components: How to Detect, Authenticate, and Test Suspect Parts

Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…