onsemi NCV47700PDAJR2G
- Part No.:
- NCV47700PDAJR2G
- Manufacturer:
- onsemi
- Package:
- 8-SOIC (0.154", 3.90mm Width) Exposed Pad
- Datasheet:
-
NCV47700PDAJR2G.pdf
- Description:
- IC REG LIN POS ADJ 350MA 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,500
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Product details
Overview
NCV47700PDAJR2G from onsemi is an automotive-grade adjustable low-dropout (LDO) regulator delivering up to 350 mA output current with ±6% output voltage accuracy across 5 V to 20 V range. It features adjustable current limit (10–350 mA), reverse input voltage protection, thermal shutdown, and integrated current sense via CSO pin for system diagnostics - deployed in instrument clusters and infotainment systems.
For engineers reviewing the NCV47700PDAJR2G datasheet, pinout, applications, or equivalent options, key selection criteria include its AEC-Q100 qualified SOIC-8 EP package, 250 mV typical dropout at 150 mA, 150°C thermal shutdown threshold, and resistor-programmable current limit using RCSO.
Technical Context
The NCV47700PDAJR2G uses a PNP pass transistor controlled by a bandgap-referenced error amplifier (VREF1 = 1.275 V), enabling ultra-low dropout and stable regulation under wide input (5.5–40 V) and junction temperature (−40°C to +150°C) ranges. Its saturation control prevents oversaturation during low-Vin or overload conditions, minimizing ground pin quiescent current.
Current sensing is implemented via a precision current mirror: ICSO = Iout / 100 (±10%), with CSO voltage proportional to output current and reaching 2.55 V at current limit. Enable logic thresholds (0.8 V low, 2.7 V high) support direct 5 V microcontroller interfacing without level shifting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | Up to 350 mA - supports mid-power automotive subsystems without external boost stages. |
| Dropout Voltage | 250 mV typ @ 150 mA - enables operation with minimal Vin–Vout margin, e.g., 5.5 V input for 5 V output. |
| Output Voltage Range | Adjustable 5 V to 20 V via external resistor divider - accommodates diverse rail requirements in audio, navigation, and cluster ECUs. |
| Current Limit Accuracy | ±10% over 10–350 mA range - ensures predictable fault response when set with RCSO resistor. |
| Thermal Shutdown | 150°C nominal activation - protects against sustained overload or ambient overheating in enclosed automotive enclosures. |
| PSRR | 70 dB @ 100 Hz - suppresses battery ripple and alternator noise before sensitive analog or RF circuitry. |
| Quiescent Current | 150 µA typ @ 1 mA load - maintains low standby power in always-on vehicle modules. |
Pinout & Package
NCV47700PDAJR2G is housed in a thermally enhanced SOIC-8 EP (Exposed Pad) package (Case 751AC), with the exposed pad electrically isolated and recommended to be connected to GND for optimal thermal performance (RθJA = 29°C/W on 4-layer PCB).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ADJ (Pin 1) | Feedback reference input | Connects to resistor divider to set output voltage; references internal 1.275 V bandgap for Vout = 1.275 × (1 + R1/R2). |
| GND (Pin 2) | Power ground return | Primary ground path for regulator core, current sense, and thermal dissipation via exposed pad. |
| EN (Pin 3) | Enable control input | Active-high logic interface: <0.8 V disables output; >2.7 V enables regulation - compatible with 5 V MCU GPIO. |
| CSO (Pin 4) | Current sense output | Provides analog voltage (0–3.0 V) proportional to Iout; sets current limit via RCSO and enables real-time load monitoring. |
| Vin (Pin 5) | Input power supply | Accepts 5.5–40 V DC with −42 V reverse voltage tolerance - withstands load dump and jump-start transients. |
| NC (Pin 6) | No connect | Internally unconnected; must remain floating or tied to GND per layout best practice. |
| NC (Pin 7) | No connect | Internally unconnected; no electrical function - avoid routing signals or power here. |
| Vout (Pin 8) | Regulated output | Delivers stable, low-noise (100 µVrms) output; requires local 22 µF ceramic capacitor for transient stability. |
Key Features
| Feature | Design Value |
|---|---|
| Adjustable current limit | Set precisely between 10 mA and 350 mA using single external resistor (RCSO), enabling tailored fault protection per subsystem. |
| Reverse input voltage protection | Withstands −42 V on Vin - eliminates need for external reverse-polarity diode in battery-connected applications. |
| Integrated current sense | Provides diagnostic Iout feedback (ICSO = Iout/100) without shunt resistor losses or board space, supporting predictive maintenance. |
| AEC-Q100 qualified | Rated for automotive Grade 1 (−40°C to +125°C ambient) and qualified to stress test standards - suitable for front-end ECU deployment. |
| Low-noise regulation | 100 µVrms output noise (10 Hz–100 kHz) - preserves signal integrity in audio amplifiers and ADC reference rails. |
Applications
| Instrument Cluster Power | Infotainment Core Rail |
|---|---|
Use Scenario: Supplies regulated 5 V or 12 V to microcontroller, display driver, and CAN transceiver in digital instrument clusters. IC Role / Device Role / Timing Role: Primary LDO providing clean, fault-protected power with enable control synchronized to ignition state. Use Value: Reverse voltage tolerance and thermal shutdown prevent field failures during battery reversal or dashboard enclosure overheating. | Use Scenario: Powers DSP, touchscreen controller, and audio codec in head-unit systems requiring stable mid-current rails. IC Role / Device Role / Timing Role: Adjustable-output LDO delivering programmable voltage with current-limit diagnostics for subsystem health monitoring. Use Value: Adjustable current limit (via RCSO) allows precise trip point setting to avoid nuisance shutdowns during audio burst loads. |
| Navigation System Core | Satellite Radio Module |
Use Scenario: Provides 12 V or 15 V bias to GPS receiver, cellular modem, and flash memory in embedded navigation units. IC Role / Device Role / Timing Role: High-input-voltage LDO handling 40 V transients while maintaining tight output regulation during engine cranking. Use Value: 70 dB PSRR at 100 Hz suppresses alternator ripple that would otherwise degrade GNSS signal acquisition sensitivity. | Use Scenario: Delivers 5 V to satellite radio tuner IC and demodulator in vehicle entertainment systems. IC Role / Device Role / Timing Role: Low-noise, AEC-Q100-compliant LDO ensuring clean power for RF front-end components. Use Value: 100 µVrms output noise prevents phase noise degradation in tuner LO paths, preserving bit error rate. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar adjustable LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NCV47701PDAJR2G | Fixed 5 V output (±3% accuracy); same SOIC-8 EP package and pinout; lacks ADJ and CSO pins. | Used where fixed 5 V rail is sufficient and current-sense diagnostics are unnecessary. | Select when design requires tighter output tolerance and simplified BOM - no external resistors needed. |
| TLD1114-1EP | 300 mA output; integrated watchdog timer; different pinout (HTSOP-8); no current-sense output. | Targeted at safety-critical ASIL-B lighting drivers, not general-purpose regulation. | Choose only if watchdog functionality and ASIL compliance are required - not a functional or pin-compatible substitute. |
Compared with NCV47700PDAJR2G, the NCV47701PDAJR2G offers higher accuracy but forfeits adjustability and diagnostics, while the TLD1114-1EP adds safety features at the cost of current-sense capability and pin compatibility - making NCV47700PDAJR2G uniquely suited for programmable, monitorable automotive power rails.
Availability
NCV47700PDAJR2G is available at Aetrix Electronics and suitable for instrument cluster, infotainment, and navigation systems requiring stable component supply, AEC-Q100 qualification, and programmable current-limit protection.
Supply support for NCV47700PDAJR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient silicon solutions for automotive, industrial, and cloud power applications.
The NCV47700PDAJR2G belongs to onsemi's automotive power management portfolio, designed specifically for harsh-environment LDO regulation in body control, infotainment, and ADAS subsystems.
FAQ
What is the maximum input voltage rating for the NCV47700PDAJR2G?
The NCV47700PDAJR2G supports an absolute maximum input voltage of +45 V and withstands reverse input voltages down to −42 V. This robust rating enables direct connection to automotive battery rails without external protection diodes, covering load-dump transients and jump-start scenarios per ISO 7637-2.
How do I set the output voltage of the NCV47700PDAJR2G?
The NCV47700PDAJR2G output voltage is set using an external resistor divider connected to the ADJ pin. With internal VREF1 = 1.275 V, Vout = 1.275 × (1 + R1/R2). For example, R1 = 82 kΩ and R2 = 27 kΩ yields ~5.0 V. R2 should be ≤50 kΩ to minimize error from ADJ pin bias current.
What does the CSO pin do on the NCV47700PDAJR2G?
The CSO pin on the NCV47700PDAJR2G provides an analog voltage proportional to output current (ICSO = Iout / 100, ±10%). At current limit, CSO reaches ~2.55 V. It also sets the limit threshold via external RCSO resistor - enabling both real-time load monitoring and programmable overcurrent protection in the NCV47700PDAJR2G.
Is the NCV47700PDAJR2G AEC-Q100 qualified?
Yes, the NCV47700PDAJR2G is qualified to AEC-Q100 Grade 1 (−40°C to +125°C ambient), with full stress testing including HTOL, TC, and ESD per JS-001 and JESD22-A115. This qualification confirms suitability for under-hood and dashboard-mounted automotive electronics where reliability is critical.
What package type does the NCV47700PDAJR2G use?
The NCV47700PDAJR2G uses a SOIC-8 EP (Exposed Pad) package (Case 751AC), Pb-free and RoHS-compliant. The exposed pad improves thermal performance (RθJA = 29°C/W on 4-layer PCB) and must be soldered to a GND plane for optimal heat dissipation and EMI reduction in the NCV47700PDAJR2G layout.
NCV47700PDAJR2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Adjustable
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 40V
- Voltage - Output (Min/Fixed):
- 5V
- Voltage - Output (Max):
- 20V
- Voltage Dropout (Max):
- 0.5V @ 150mA
- Current - Output:
- 350mA
- Current - Quiescent (Iq):
- 230 µA
- Current - Supply (Max):
- 50 mA
- PSRR:
- 70dB (100Hz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Reverse Polarity
- Operating Temperature:
- -40°C ~ 150°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC-EP
NCV47700PDAJR2G FAQ
1.How can I place an order for NCV47700PDAJR2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCV47700PDAJR2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCV47700PDAJR2G reliable?
The price and inventory of NCV47700PDAJR2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCV47700PDAJR2G is usually 5 days.
3.What payment methods are accepted for NCV47700PDAJR2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCV47700PDAJR2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCV47700PDAJR2G?
NCV47700PDAJR2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCV47700PDAJR2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCV47700PDAJR2G?
For technical support, including NCV47700PDAJR2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCV47700PDAJR2G requirements.
6.How does Aetrix verify that NCV47700PDAJR2G is sourced from the original manufacturer or authorized distributors?
All NCV47700PDAJR2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCV47700PDAJR2G meets industry standards.
7.What is the process for return or replacement of NCV47700PDAJR2G?
All NCV47700PDAJR2G units undergo pre-shipment inspection (PSI). If there is an issue with NCV47700PDAJR2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCV47700PDAJR2G part is unused and in its original packaging.
Return procedure for NCV47700PDAJR2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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