onsemi NCV59748MNADJTBG

Overview

NCV59748MNADJTBG from onsemi is an automotive-grade dual-rail linear voltage regulator with bias rail, delivering up to 1.5 A output current, 60 mV typical dropout at full load, and programmable soft-start. It operates with VIN as low as 0.8 V and supports adjustable output from 0.8 V to 3.6 V via external feedback resistors. Designed for FPGA, DSP, and post-regulation in automotive power systems, it integrates thermal shutdown, current limiting, and open-drain Power-Good monitoring.

For engineers reviewing the NCV59748MNADJTBG datasheet, pinout, applications, or equivalent options, key selection considerations include its dual-input (VIN/VBIAS) architecture, wettable-flank DFN10 package for optical inspection, AEC-Q100 qualification, and NMOS pass transistor enabling stable operation with ≥2.2 µF ceramic output capacitors without ESR constraints.

Technical Context

The NCV59748MNADJTBG uses an NMOS pass transistor powered by a dedicated VBIAS rail (2.7–5.5 V), decoupling control circuitry from VIN and enabling ultra-low dropout (60 mV typ. at 1.5 A) even when VIN approaches VOUT. Its internal 0.8 V reference feeds a precision error amplifier, supporting ±0.5% output accuracy across temperature and load.

Soft-start timing is user-programmed via an external capacitor on the SS pin (0.2–18 ms range), while the open-drain PG pin asserts high-impedance when VOUT reaches 90% of nominal, with 3% hysteresis. Enable logic includes 50 mV hysteresis and 20 µs deglitching to prevent false triggering in noisy automotive environments.

Key Specifications

Pinout & Package

NCV59748MNADJTBG is housed in a Pb-free DFN10 3×3 mm package (Case 485C) with wettable flanks for automated optical inspection. The exposed thermal pad must be soldered to the PCB ground plane to achieve R_JA = 41.5°C/W and maintain junction temperature ≤125°C under full load.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with TPS7A8300RGRT and NCP1117ST50T3G, the NCV59748MNADJTBG uniquely combines dual-rail operation, 1.5 A current, 60 mV dropout, AEC-Q100 Grade 1 rating, and adjustable output - making it the only option among the three qualified for demanding automotive point-of-load regulation with flexible voltage setting.

Availability

NCV59748MNADJTBG is available at Aetrix Electronics and suitable for automotive engine control units, FPGA power supplies, industrial PLC I/O modules, and automotive camera modules requiring stable component supply with full traceability and long-term lifecycle support.

Supply support for NCV59748MNADJTBG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi is a global semiconductor supplier focused on energy-efficient electronics, with leadership in automotive, industrial, cloud, and IoT markets. It emphasizes functional safety, AEC-Q100 compliance, and high-reliability packaging.

The NCV59748MNADJTBG belongs to onsemi's automotive-qualified linear regulator product line, designed specifically for demanding point-of-load regulation in engine control, ADAS, and infotainment systems where low dropout, fast transient response, and robust thermal protection are essential.

FAQ

What is the minimum input voltage required for NCV59748MNADJTBG to regulate at 1.2 V output?

The NCV59748MNADJTBG requires VIN ≥ VOUT + VDO, where VDO is 60 mV typical at full load. To regulate 1.2 V output with margin, VIN must be ≥1.26 V under 1.5 A load. At lighter loads, dropout decreases further - e.g., at 50 mA, VDO is typically <20 mV, allowing VIN as low as 1.22 V. Always verify against the Electrical Characteristics table for worst-case conditions across temperature and process variation.

Can NCV59748MNADJTBG operate with VIN and VBIAS tied together?

Yes, NCV59748MNADJTBG can operate with VIN and VBIAS shorted, but this configuration incurs a higher effective dropout: VBIAS dropout voltage is 1.31 V typical at 1.5 A. This mode sacrifices the key advantage of the dual-rail architecture - optimal efficiency when VIN is low. Use separate VBIAS (e.g., 3.3 V or 5 V) whenever possible to maintain 60 mV dropout and minimize power loss.

How is the soft-start time calculated for NCV59748MNADJTBG?

The soft-start time for NCV59748MNADJTBG is calculated as t_SS = CSS × 1.82 ms/nF, where CSS is the capacitor value in nanofarads connected between SS pin and GND. For example, a 1 nF capacitor yields ~1.82 ms ramp time. The internal soft-start charging current is 0.44 µA, and reference voltage is 0.8 V. Maximum recommended CSS is 15 nF to ensure full discharge before subsequent startup cycles.

Does NCV59748MNADJTBG require a minimum ESR on the output capacitor?

No, NCV59748MNADJTBG does not require minimum ESR on the output capacitor. It is explicitly designed to be stable with any capacitor type (ceramic, polymer, tantalum) and value ≥2.2 µF, including zero-ESR MLCCs. This eliminates ESR-related stability concerns and simplifies design - unlike many older LDOs that mandate specific ESR ranges for phase margin.

What is the purpose of the Power-Good (PG) pin on NCV59748MNADJTBG?

The PG pin on NCV59748MNADJTBG is an open-drain, active-high output that signals when VOUT has reached and sustained ≥90% of its nominal value (with 3% hysteresis). It enables power sequencing in multi-rail systems - for example, asserting PG only after the 1.2 V core rail is stable before enabling downstream logic. A pull-up resistor (10 kΩ–1 MΩ) to a supply ≤5.5 V is required for proper operation.