onsemi NCV59801CMLADJTCG

Overview

NCV59801CMLADJTCG from onsemi is an automotive-grade 1 A adjustable LDO regulator with ±0.7% initial output accuracy at 25°C, 85 dB PSRR at 1 kHz, and 120 mV typical dropout at 1 A (3.3 V output). It features Power Good open-collector output, active output discharge, and 5 mV/s controlled slew rate - designed for RF power supplies and noise-sensitive analog rails in vehicle infotainment and telematics systems.

For engineers reviewing the NCV59801CMLADJTCG datasheet, pinout, applications, or equivalent options, key selection criteria include its AEC-Q100 qualification, DFNW8 3 mm × 3 mm package with exposed thermal pad, 0.6 V reference voltage, and compatibility with 4.7 µF ceramic input/output capacitors without ESR requirements.

Technical Context

The NCV59801CMLADJTCG implements a high-PSRR, low-noise LDO architecture with internal feedback loop referenced to a precision 0.6 V bandgap. Its EN pin enables logic-level control (VENH = 1 V, VENL = 0.4 V), while the open-drain PG output asserts after 9 µs blanking time when VOUT reaches 95% of nominal. The device integrates thermal shutdown (165°C) and current limiting (1.5–1.7 A).

It supports adjustable output via FB pin with <200 nA input bias current, enabling stable regulation from 0.6 V to ≥5.0 V using external resistor dividers. The 5 mV/s slew rate option limits inrush current during startup, and active output discharge (250 Ω typical) ensures rapid VOUT decay upon disable.

Key Specifications

Pinout & Package

NCV59801CMLADJTCG uses the DFNW8 3 mm × 3 mm × 0.9 mm package (Case 507AD) with wettable flanks and an exposed thermal pad tied to GND for optimal heat dissipation. Pin count: 8 terminals + exposed pad.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with NCV59801CMLADJTCG, the NCV8170ADP330T2G offers smaller size but sacrifices current drive, PSRR, and automotive compliance; the TLE42754G adds safety features yet omits adjustable output and low-noise design - making NCV59801CMLADJTCG optimal for high-fidelity analog/RF power domains.

Availability

NCV59801CMLADJTCG is available at Aetrix Electronics and suitable for automotive infotainment, ADAS sensor modules, and telematics gateways requiring stable component supply with AEC-Q100 assurance and long-term production continuity.

Supply support for NCV59801CMLADJTCG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensors, and connectivity solutions for automotive, industrial, and cloud infrastructure markets.

The NCV59801 series belongs to onsemi's automotive-qualified LDO portfolio, engineered specifically for noise-sensitive RF and analog subsystems in vehicles - emphasizing PSRR, low dropout, and robust power sequencing.

FAQ

What is the minimum input voltage required for NCV59801CMLADJTCG to regulate a 1.2 V output?

The NCV59801CMLADJTCG requires VIN ≥ VOUT + VDO. With 124 mV typical dropout at 1.2 V output and 1 A load, minimum VIN is 1.324 V. However, the absolute minimum operating input voltage is 1.6 V per datasheet - so 1.6 V is the practical lower limit regardless of VOUT, ensuring full specification compliance across temperature and load.

Does NCV59801CMLADJTCG require an external resistor divider for adjustable output, and what tolerance is recommended?

Yes, NCV59801CMLADJTCG is the adjustable version and requires an external resistor divider between OUT and FB pins. Resistor values should be 1 kΩ to 220 kΩ to minimize error from FB input bias current (<200 nA). Use 0.1% tolerance resistors for ≤0.1% added output error - critical when targeting tight voltage margins like 0.85 V for processor cores.

How does the Power Good (PG) output behave when NCV59801CMLADJTCG is disabled via the EN pin?

When EN is pulled low, the internal PG transistor is disabled and the PG pin becomes high-impedance. Its logic level is then defined solely by the external pull-up resistor. To ensure a valid low PG signal during disable, connect the pull-up to VOUT - this way, PG goes high only when VOUT is valid, and floats high (not low) when disabled, avoiding false system-ready assertions.

Can NCV59801CMLADJTCG operate with a 2.2 µF output capacitor, or is 4.7 µF mandatory?

The NCV59801CMLADJTCG is stable with ≥2.2 µF ceramic capacitors, but 4.7 µF is recommended for guaranteed performance across temperature, load, and aging. Using 2.2 µF may degrade line/load transient response and PSRR above 100 kHz - especially critical in RF applications where 4.7 µF ensures phase margin remains >60° under all conditions.

What is the thermal performance difference between the DFNW8 and WDFNW6 packages for NCV59801CMLADJTCG?

NCV59801CMLADJTCG in DFNW8 (Case 507AD) has R_JA = 44.4 °C/W vs. 60 °C/W for WDFNW6 (Case 511DW). At 1 A and 120 mV dropout (120 mW dissipation), DFNW8 yields ~5.3°C rise above ambient versus ~7.2°C for WDFNW6 - enabling higher ambient operation or longer continuous duty in space-constrained automotive modules.