onsemi NCV8509PDW26R2G
- Part No.:
- NCV8509PDW26R2G
- Manufacturer:
- onsemi
- Package:
- 16-SOIC (0.295", 7.50mm Width) Exposed Pad
- Datasheet:
-
NCV8509PDW26R2G.pdf
- Description:
- IC REG LINEAR 5V/2.6V 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NCV8509PDW26R2G from onsemi is an automotive-grade dual linear voltage regulator with sequenced power-up, delivering 5.0 V ±2% @ 115 mA (VOUT1) and 2.6 V ±2% @ 100 mA (VOUT2) to protect microcontroller I/O and core logic during startup. It features programmable slew rate control, dual-drive RESET with 0 V validity, thermal shutdown, and a 16-lead SOIC wide-body exposed-pad package (Case 751AG). Designed for automotive powertrain and telematics systems requiring AEC-Q100 compliance.
For engineers reviewing the NCV8509PDW26R2G datasheet, pinout, applications, or equivalent options, key selection criteria include output sequencing integrity, RESET threshold hysteresis (50 mV typ), power shunt capability via REX, low 175 µA quiescent current at light load, and thermal performance with RθJA = 57 °C/W.
Technical Context
The NCV8509PDW26R2G implements independent error amplifiers and bandgap references for each output, enabling precise tracking and independent regulation of VOUT1 (5 V) and VOUT2 (2.6 V). Its dual-drive RESET circuit derives power from both VIN1 and VOUT1, ensuring reset validity down to 0 V on either rail - a critical feature for fault-tolerant automotive microcontroller boot sequences.
Power shunt functionality routes part of VOUT2's current path through external resistor REX to VIN2, reducing on-die power dissipation by shifting heat off-chip. SLEW pin controls rise time via external capacitor (e.g., 33 nF yields ~710 V/s on VOUT1), while Delay pin sets RESET timeout with programmable capacitor-based timing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VOUT1 | 5.0 V ±2% (4.9–5.1 V); powers MCU I/O rails with 115 mA max output current |
| VOUT2 | 2.6 V ±2% (2.548–2.652 V); powers MCU core logic with 100 mA max output current |
| Quiescent Current | 175 µA typ at IOUT = 100 µA, VIN1 = 12 V; enables ultra-low standby power in always-on automotive modules |
| RESET Threshold | 96.5% of VOUT1 (4.73 V typ); hysteresis = 50–100 mV; ensures noise-immune brownout detection |
| SLEW Rate (VOUT1) | 710 V/s typ with CSLEW = 33 nF; provides controlled soft-start to prevent inrush-induced supply droop |
| Thermal Shutdown | 150–210 °C junction range; latches both outputs off until thermal recovery |
| Input Voltage Range | VIN1: −0.3 to 50 V DC; supports 12 V/24 V automotive battery transients per ISO 7637-2 |
Pinout & Package
Package: 16-lead SOIC wide-body with exposed thermal pad (Case 751AG, PDW suffix), 10.3 mm × 7.5 mm footprint, RθJC = 16 °C/W, RθJA = 57 °C/W (standard JEDEC 2-layer board).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SLEW (Pin 1) | Output rise-time control input | Charged by internal 6 µA current source; sets VOUT1/VOUT2 ramp rate via external capacitor to ground |
| Delay (Pin 2) | RESET delay timing node | Sources 6 µA to external capacitor; determines RESET assertion delay after regulation is achieved |
| GND (Pin 3) | Power and signal reference | Common return for both regulators and internal comparators; connects to exposed pad for thermal conduction |
| RESET (Pin 6) | Active-low reset output | Dual-drive open-drain output valid down to 0 V on VIN1 or VOUT1; sinks 1 mA at 0.4 V max |
| VOUT2 (Pin 10) | Core voltage output | 2.6 V regulated output powering MCU core; includes current limit (105–305 mA) and thermal foldback |
| VIN2 (Pin 12) | Secondary input for VOUT2 | Accepts shunted current from VIN1 via REX; enables power dissipation off-chip to reduce die temperature |
| VIN1 (Pin 13) | Main input for VOUT1 and bias | Primary 50 V-rated input powering VOUT1, internal circuitry, and RESET drive; supports transient up to 50 V |
| VOUT1 (Pin 15) | I/O voltage output | 5.0 V regulated output powering MCU I/O; dropout ≤600 mV at 100 mA load |
Key Features
| Feature | Design Value |
|---|---|
| Sequenced Power-Up | Guarantees VOUT1 ramps before VOUT2 to prevent I/O latch-up in modern MCUs with split-core/I/O supplies |
| Programmable SLEW Rate | Adjustable rise time via external capacitor (e.g., 33 nF → 710 V/s on VOUT1), eliminating need for external soft-start circuitry |
| Dual-Drive RESET | Remains valid even if VOUT1 collapses to 0 V (powered by VIN1) or VIN1 drops to 0 V (powered by VOUT1), enhancing system reliability |
| Power Shunt (REX) | External resistor routes VOUT2 current from VIN1 to VIN2, reducing on-die power dissipation by up to 1.1 W in high-VIN scenarios |
| AEC-Q100 Qualified | Qualified to Grade 1 (−40 °C to +125 °C ambient), PPAP-capable, with change control and site traceability for automotive production |
Applications
| Automotive Powertrain Control Unit | Telematics Control Module |
|---|---|
Use Scenario: Engine ECU requiring isolated 5 V I/O and 2.6 V core supplies with synchronized startup to avoid bus contention during cold cranking. IC Role / Device Role / Timing Role: Dual sequenced regulator providing fault-tolerant power sequencing and RESET generation with 0 V validity during battery dip events. Use Value: Prevents MCU lockup during ISO 7637-2 pulse 4a (load dump) by maintaining RESET assertion until both outputs stabilize within tolerance. | Use Scenario: Cellular-connected vehicle infotainment gateway needing stable 5 V USB interface and 2.6 V application processor core under varying battery conditions. IC Role / Device Role / Timing Role: Dual LDO with programmable slew and delay, enabling clean power-up of RF and baseband subsystems without cross-coupling. Use Value: Eliminates need for discrete RC timing networks and external RESET supervisors, reducing BOM count and PCB area by 30%. |
| Advanced Driver Assistance System (ADAS) Camera ECU | Body Control Module (BCM) |
Use Scenario: Vision processing module with image sensor and SoC requiring tightly tracked 5 V/2.6 V rails and fast fault response. IC Role / Device Role / Timing Role: Sequenced regulator with thermal shutdown and fast SLEW recovery from short-circuit faults (≈10 µs decay). Use Value: Enables rapid re-powering after overcurrent events without full system reset, improving camera uptime in safety-critical ADAS functions. | Use Scenario: Centralized vehicle body controller managing door locks, lighting, and HVAC with always-on 5 V I/O and sleep-mode 2.6 V core. IC Role / Device Role / Timing Role: Low-quiescent-current dual regulator supporting <180 µA total system standby current while retaining full RESET functionality. Use Value: Extends battery life in key-off state beyond 120 days without compromising wake-up reliability or brownout immunity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual sequenced LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NCV8509PDW26G | Same electrical specs; differs only in packaging - supplied in 47-unit rail vs. 1000-unit tape-and-reel | No functional difference; rail format suited for prototyping and low-volume validation | Select NCV8509PDW26R2G for production volume orders requiring automated SMT placement; use NCV8509PDW26G for bench testing and pre-production builds. |
| TLV7073325PDRVR | Single-channel 3.3 V/2.5 V dual-output LDO (not sequenced); no RESET, no power shunt, no AEC-Q100 qualification | Limited to non-automotive consumer/industrial applications; lacks fault-tolerant RESET and thermal robustness | Only suitable for cost-sensitive, non-safety-critical designs where sequencing and automotive qualification are not required. |
Compared with NCV8509PDW26G, the NCV8509PDW26R2G offers identical performance but optimized logistics for high-volume manufacturing; versus TLV7073325PDRVR, it delivers automotive-grade sequencing, dual-drive RESET, and power shunt capability essential for reliable operation in harsh environments.
Availability
NCV8509PDW26R2G is available at Aetrix Electronics and suitable for automotive powertrain control units, telematics modules, and ADAS camera ECUs requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for NCV8509PDW26R2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensors, and connectivity solutions for automotive, industrial, and cloud infrastructure markets.
The NCV8509PDW26R2G belongs to the NCV8509 Series of automotive-qualified dual sequenced LDOs, designed specifically to meet the stringent power sequencing, RESET integrity, and thermal reliability requirements of modern automotive electronic control units.
FAQ
What is the purpose of the SLEW pin on the NCV8509PDW26R2G?
The SLEW pin on the NCV8509PDW26R2G controls the rise time of both VOUT1 and VOUT2 during power-up. It accepts an external capacitor to ground and is charged by an internal 6 µA current source. With a 33 nF capacitor, the NCV8509PDW26R2G achieves a typical slew rate of 710 V/s on VOUT1, preventing inrush current and supply droop that could destabilize downstream circuitry. This eliminates the need for external soft-start components.
How does the dual-drive RESET function work in the NCV8509PDW26R2G?
The dual-drive RESET in the NCV8509PDW26R2G remains active even when either VOUT1 or VIN1 falls to 0 V. It draws power from VIN1 when VOUT1 is invalid and from VOUT1 when VIN1 collapses - ensuring continuous reset assertion during battery dips or output faults. The RESET output is open-drain, sinking up to 1 mA at ≤0.4 V, and its threshold is set at 96.5% of VOUT1 with 50 mV hysteresis for noise immunity.
Can the NCV8509PDW26R2G be used without the power shunt resistor REX?
Yes, the NCV8509PDW26R2G can operate without REX by shorting VIN1 to VIN2. However, omitting REX increases on-die power dissipation - especially at high input voltages - potentially triggering thermal shutdown under full load. For example, at VIN1 = 18 V and IOUT2 = 100 mA, using REX = 138 Ω reduces chip power by ~1.1 W. Without REX, thermal margin shrinks significantly, limiting usable input voltage range in high-ambient environments.
What is the maximum allowable input voltage for the NCV8509PDW26R2G?
The NCV8509PDW26R2G supports a DC input voltage of −0.3 V to 50 V on VIN1, with peak transient rating also at 50 V per ISO 7637-2 Pulse 1 and Pulse 4a standards. VIN2 is rated to 50 V but must not sink more than 10 mA. These ratings enable direct connection to 12 V and 24 V automotive batteries, including load-dump and jump-start transients, without external protection circuitry.
Is the NCV8509PDW26R2G pin-compatible with other variants in the NCV8509 family?
Yes, all NCV8509 variants - including NCV8509PDW18R2G (3.3 V/1.8 V), NCV8509PDW25R2G (5 V/2.5 V), and NCV8509PDW26R2G (5 V/2.6 V) - share identical 16-pin SOIC wide-body exposed-pad packaging (Case 751AG) and pinout. Only the output voltage combinations differ; no PCB layout changes are needed when substituting between variants during design iteration or qualification.
NCV8509PDW26R2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 50V
- Voltage - Output (Min/Fixed):
- 5V, 2.6V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.6V @ 100mA, -
- Current - Output:
- 115mA, 100mA
- Current - Quiescent (Iq):
- 175 µA
- Current - Supply (Max):
- 10 mA
- PSRR:
- -
- Control Features:
- Reset
- Protection Features:
- Over Temperature
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
NCV8509PDW26R2G FAQ
1.How can I place an order for NCV8509PDW26R2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCV8509PDW26R2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCV8509PDW26R2G reliable?
The price and inventory of NCV8509PDW26R2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCV8509PDW26R2G is usually 5 days.
3.What payment methods are accepted for NCV8509PDW26R2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCV8509PDW26R2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCV8509PDW26R2G?
NCV8509PDW26R2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCV8509PDW26R2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCV8509PDW26R2G?
For technical support, including NCV8509PDW26R2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCV8509PDW26R2G requirements.
6.How does Aetrix verify that NCV8509PDW26R2G is sourced from the original manufacturer or authorized distributors?
All NCV8509PDW26R2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCV8509PDW26R2G meets industry standards.
7.What is the process for return or replacement of NCV8509PDW26R2G?
All NCV8509PDW26R2G units undergo pre-shipment inspection (PSI). If there is an issue with NCV8509PDW26R2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCV8509PDW26R2G part is unused and in its original packaging.
Return procedure for NCV8509PDW26R2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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