onsemi NCV8535MLADJR2G
- Part No.:
- NCV8535MLADJR2G
- Manufacturer:
- onsemi
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
NCV8535MLADJR2G.pdf
- Description:
- IC REG LIN POS ADJ 500MA 10DFNW
- Quantity:
- Payment:

- Shipping:

Inventory:2,300
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Product details
Overview
NCV8535MLADJR2G from onsemi is an automotive-grade ultra-high-accuracy, low-quiescent-current, low-dropout linear voltage regulator delivering 500 mA output with ±0.9% initial accuracy at 25°C, 260 mV typical dropout at full load, and reverse bias protection. It operates from 2.9 V to 12 V input and supports fixed 3.3 V output in a thermally enhanced DFN10 (485C) package - ideal for DSP supply and display power rails in automotive infotainment systems.
For engineers reviewing the NCV8535MLADJR2G datasheet, pinout, applications, or equivalent options, key selection criteria include its no-minimum-load stability, 1.0 µF MLCC-compatible output capacitance requirement, integrated noise reduction (NR) and shutdown (SD) pins, and AEC-Q100 qualification for under-hood reliability.
Technical Context
The NCV8535MLADJR2G implements a high-gain error amplifier with internal reference (1.25 V for adjustable versions; fixed 3.3 V here), enabling tight line/load regulation (0.04 mV/V and 0.04 mV/mA). Its PMOS pass transistor architecture delivers ultra-low dropout and eliminates reverse current flow without external components.
Stability is guaranteed across temperature (−40°C to +125°C) and load (0.1–500 mA) with any capacitor type - including low-ESR MLCCs - thanks to internal compensation and no minimum output current requirement. The NR pin accepts a 10 nF capacitor to reduce output noise to 46 µVRMS (10 Hz–100 kHz).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 3.3 V ±0.9% at 25°C; ±1.5% over −40°C to +125°C - enables precise core logic and interface rail regulation. |
| Max Output Current | 500 mA continuous; 800 mA peak - sufficient for powering DSPs, FPGAs, and display controllers. |
| Dropout Voltage | 340 mV at 500 mA load - allows operation with minimal headroom (e.g., 3.64 V input for 3.3 V output). |
| Quiescent Current | 9.0 mA in regulation; 0.07 µA in shutdown - extends battery life in always-on automotive modules. |
| Output Noise | 46 µVRMS with 10 nF CNR; 69 µVRMS without - meets low-noise requirements for ADC references and RF subsystems. |
| Input Voltage Range | 2.9 V to 12 V - compatible with 3.3 V/5 V system rails and automotive battery transients (ISO 7637-2 compliant). |
| Thermal Protection | 160°C junction shutdown with automatic recovery - prevents thermal runaway during overload or poor PCB heatsinking. |
Pinout & Package
NCV8535MLADJR2G uses the DFN10 (Case 485C) 3 mm × 3 mm thermally enhanced package with exposed EPAD. Pin 1–2 are VOUT; Pin 3 is SENSE (tied to VOUT for fixed version); Pin 4 is GND; Pins 5–6 are NC; Pin 7 is NR; Pin 8 is SD; Pins 9–10 are VIN; EPAD must be soldered to ground for thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2 | VOUT | Regulated 3.3 V output; requires ≥1.0 µF ceramic output capacitor to ground for stability. |
| 3 | SENSE | Sense input tied directly to VOUT pins; enables remote sensing for improved load regulation in high-current layouts. |
| 4 | GND | Power ground reference; connects to EPAD for optimal thermal dissipation and noise immunity. |
| 5, 6 | NC | No internal connection; must remain unconnected per design - floating or grounded both acceptable. |
| 7 | NR | Noise reduction terminal; adding 10 nF capacitor between NR and GND reduces output noise by ~30%. |
| 8 | SD | Active-low shutdown control; pulled high to VIN for normal operation; driven low to disable regulator and reduce IQ to 0.07 µA. |
| 9, 10 | VIN | Input supply (2.9–12 V); decoupled with ≥1.0 µF ceramic capacitor close to pins 9/10. |
| EPAD | Thermal Pad | Exposed copper pad; must be soldered to ≥100 mm² ground copper area for θJA = 66°C/W performance. |
Key Features
| Feature | Design Value |
|---|---|
| ±0.9% output accuracy at 25°C | Reduces need for post-regulation trimming in safety-critical automotive modules. |
| No minimum load requirement | Enables stable operation down to zero load - critical for standby and sleep-mode power domains. |
| Reverse bias protection | Blocks current flow from VOUT to GND when VIN = 0 V (e.g., battery disconnect), preventing backfeed damage. |
| Stable with any capacitor type | Eliminates ESR constraints - supports cost-effective, small-footprint X7R/X5R MLCCs instead of tantalum. |
| AEC-Q100 Grade 1 qualified | Validated for −40°C to +125°C ambient operation with PPAP documentation support for Tier-1 automotive programs. |
Applications
| Automotive Infotainment DSP Supply | Automotive Display Backlight Driver Bias |
|---|---|
Use Scenario: Powering TI TMS320C674x DSP cores in head-unit systems requiring clean, accurate 3.3 V under wide temperature and load variation. IC Role / Device Role / Timing Role: Primary LDO regulator providing low-noise, tightly regulated 3.3 V to DSP I/O and memory interfaces. Use Value: ±0.9% accuracy and 46 µVRMS noise ensure signal integrity for high-speed parallel buses and ADC sampling clocks. | Use Scenario: Supplying gate bias and logic rails for LED driver ICs (e.g., ON Semi NCP5623) in LCD instrument clusters. IC Role / Device Role / Timing Role: Stable 3.3 V source for driver enable logic and current-sense amplifiers in PWM-controlled backlight systems. Use Value: No-minimum-load stability allows seamless transition between active and dimmed states without output droop or oscillation. |
| Automotive Telematics Modem Core Rail | Automotive Camera Module Sensor Interface |
Use Scenario: Delivering regulated 3.3 V to LTE/Wi-Fi SoCs (e.g., Quectel EC25) in telematics control units operating across cold cranking (6.5 V) and load dump (18 V) conditions. IC Role / Device Role / Timing Role: Input-stage LDO filtering transients before DC-DC converters, reducing EMI on sensitive RF sections. Use Value: 12 V max input rating and reverse bias protection prevent latch-up during ISO 7637-2 pulse 5a/b events. | Use Scenario: Powering image sensor analog front-ends (e.g., Sony IMX327) and MIPI CSI-2 serializer ICs in surround-view camera ECUs. IC Role / Device Role / Timing Role: Low-noise 3.3 V supply for sensor analog blocks and serializer PLLs to minimize pixel noise and clock jitter. Use Value: NR pin capability achieves 46 µVRMS noise - below 1 LSB of 12-bit sensor ADCs at 100 kSPS. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLV73333PDBVR | 300 mA output, 170 mV dropout at 300 mA, no NR pin, SOT-23-5 package | Lacks AEC-Q100 qualification and reverse bias protection; limited to non-automotive consumer use | Select only for cost-sensitive, low-current industrial applications where automotive qualification is unnecessary. |
| NCP1117ST33T3G | 800 mA output, 1.2 V dropout at 800 mA, TO-220/TO-263 package, no SD/NR pins | Higher dropout and larger footprint; lacks shutdown control and noise reduction features | Prefer for high-current, non-space-constrained designs where thermal mass compensates for higher θJA. |
Compared with TLV73333PDBVR and NCP1117ST33T3G, the NCV8535MLADJR2G uniquely combines AEC-Q100 Grade 1 qualification, 500 mA capability in a 3×3 mm DFN, integrated shutdown and noise reduction, and reverse bias protection - making it the only drop-in solution for space-constrained, safety-compliant automotive LDO applications.
Availability
NCV8535MLADJR2G is available at Aetrix Electronics and suitable for automotive infotainment, telematics, digital instrument clusters, and ADAS camera modules requiring stable component supply across extended temperature and long product lifecycles.
Supply support for NCV8535MLADJR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor leader focused on energy-efficient innovation for automotive, industrial, cloud, medical, and IoT applications.
The NCV8535MLADJR2G belongs to onsemi's automotive-qualified power management portfolio, designed specifically to meet stringent AEC-Q100 reliability, transient immunity, and thermal robustness requirements in vehicle electronic control units.
FAQ
What is the output voltage tolerance of the NCV8535MLADJR2G over temperature?
The NCV8535MLADJR2G provides ±1.5% output voltage accuracy over the full operating junction temperature range of −40°C to +125°C. At 25°C, tolerance tightens to ±0.9%, and at 0°C to +85°C it is ±1.4%. This is specified for 3.3 V output with 0.1–500 mA load and input voltage between 3.7 V and 7.3 V.
Does the NCV8535MLADJR2G require an external capacitor on the NR pin?
No, the NR pin on the NCV8535MLADJR2G is optional. Adding a 10 nF capacitor between NR and GND reduces output noise from 69 µVRMS to 46 µVRMS (10 Hz–100 kHz), but the device remains fully functional and stable without it. The NR pin should be left floating if noise reduction is not required.
Can the NCV8535MLADJR2G be used with ceramic output capacitors smaller than 1.0 µF?
No - the NCV8535MLADJR2G requires a minimum 1.0 µF ceramic output capacitor for guaranteed stability across all operating conditions. Using smaller values may cause oscillation or degraded transient response. The datasheet explicitly validates stability only with ≥1.0 µF, including low-ESR X7R/X5R types.
What is the maximum input voltage rating for the NCV8535MLADJR2G?
The absolute maximum input voltage for the NCV8535MLADJR2G is +16 V, but the recommended operating range is 2.9 V to 12 V. Operation above 12 V is permissible only for short-duration transients such as ISO 7637-2 Load Dump pulses, provided proper input clamping is implemented externally.
How does reverse bias protection function in the NCV8535MLADJR2G?
The NCV8535MLADJR2G prevents reverse current flow from VOUT to GND when VIN = 0 V and VOUT is externally forced (e.g., by a backup capacitor or another supply). It limits reverse current to ≤10 µA for VOUT ≤ 7 V above VIN. This protects upstream circuitry during battery disconnection or hot-swap scenarios in automotive systems.
NCV8535MLADJR2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Adjustable
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 12V
- Voltage - Output (Min/Fixed):
- 1.25V
- Voltage - Output (Max):
- 10V
- Voltage Dropout (Max):
- 0.34V @ 500mA
- Current - Output:
- 500mA
- Current - Quiescent (Iq):
- 190 µA
- Current - Supply (Max):
- 14 mA
- PSRR:
- -
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 10-DFNW (3x3)
NCV8535MLADJR2G FAQ
1.How can I place an order for NCV8535MLADJR2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCV8535MLADJR2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCV8535MLADJR2G reliable?
The price and inventory of NCV8535MLADJR2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCV8535MLADJR2G is usually 5 days.
3.What payment methods are accepted for NCV8535MLADJR2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCV8535MLADJR2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCV8535MLADJR2G?
NCV8535MLADJR2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCV8535MLADJR2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCV8535MLADJR2G?
For technical support, including NCV8535MLADJR2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCV8535MLADJR2G requirements.
6.How does Aetrix verify that NCV8535MLADJR2G is sourced from the original manufacturer or authorized distributors?
All NCV8535MLADJR2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCV8535MLADJR2G meets industry standards.
7.What is the process for return or replacement of NCV8535MLADJR2G?
All NCV8535MLADJR2G units undergo pre-shipment inspection (PSI). If there is an issue with NCV8535MLADJR2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCV8535MLADJR2G part is unused and in its original packaging.
Return procedure for NCV8535MLADJR2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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