onsemi NCV8720BMT100TBG
- Part No.:
- NCV8720BMT100TBG
- Manufacturer:
- onsemi
- Package:
- 6-WDFN Exposed Pad
- Datasheet:
-
NCV8720BMT100TBG.pdf
- Description:
- IC REG LINEAR 1V 350MA 6WDFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,587
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NCV8720BMT100TBG from onsemi is an automotive-grade 350 mA very low dropout (VLDO) linear regulator with dual-rail NMOS architecture, fixed 1.00 V output, ±2% accuracy over −40 °C to +125 °C, 110 mV typical dropout at full load, and separate VBIAS supply for ultra-low bias current (80 µA typ). It delivers stable, low-noise power for FPGA core rails and camera sensor I/O in space-constrained automotive modules.
For engineers reviewing the NCV8720BMT100TBG datasheet, pinout, applications, or equivalent options, key selection criteria include its 1.00 V fixed output, WDFN6 wettable flanks package, dual-input (VIN/VBIAS) dropout behavior, AEC-Q100 Grade 1 qualification, and compatibility with 2.2 µF ceramic output capacitors.
Technical Context
The NCV8720BMT100TBG implements a dual-rail NMOS pass transistor architecture: VIN supplies the output path while VBIAS powers internal control circuitry, enabling independent optimization of dropout and quiescent performance. This decoupling allows ultra-low VBIAS current (0.5 µA in shutdown) and high PSRR (>65 dB at 1 kHz for both VIN and VBIAS).
It integrates soft-start with monotonic VOUT rise, undervoltage lockout (UVLO = 1.6 V on VBIAS), thermal shutdown (160 °C trip), and current limiting (420–1000 mA). The enable pin features hysteresis and supports direct tie-to-VIN/VBIAS when unused.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.00 V - factory-programmed, no external feedback required; simplifies layout and reduces BOM count. |
| Max Output Current | 350 mA continuous - sufficient for low-power FPGA I/O banks or image sensor interfaces without thermal derating under typical PCB conditions. |
| VIN Dropout (350 mA) | 110 mV typical - enables regulation down to VIN = 1.11 V, critical for post-regulation after buck converters with tight voltage margins. |
| VBIAS Dropout | 1.15 V min - requires VBIAS ≥ 2.15 V for stable 1.00 V output; separates bias rail design from main input constraints. |
| Output Accuracy | ±2% over −40 °C to +125 °C - meets automotive ASIL-B functional safety margin requirements for power rail monitoring. |
| PSRR @ 1 kHz | 65 dB (VBIAS), 65 dB (VIN) - suppresses switching noise from upstream DC/DC converters feeding camera or radar subsystems. |
| Startup Time | 140 µs to 95% VOUT - ensures fast power-up sequencing for time-critical vision processing pipelines. |
Pinout & Package
NCV8720BMT100TBG is housed in a thermally enhanced WDFN6 2 mm × 2 mm package (Case 511BR) with wettable flanks for automated optical inspection. The exposed thermal pad must be soldered to the PCB ground plane to achieve RJA = 65 °C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - OUT | Regulated output | Delivers 1.00 V to load; connects directly to ceramic capacitor (2.2 µF min) without ESR requirements. |
| 2 - N/C | No connect | Not internally bonded; must remain unconnected on PCB to avoid parasitic coupling or mechanical stress. |
| 3 - EN | Enable control | Active-high logic input (1.1 V threshold); ties to VIN/VBIAS if always-on; enables system-level power sequencing. |
| 4 - BIAS | Bias supply input | Powers internal reference and control circuits; requires ≥2.4 V and stable decoupling (≥0.1 µF ceramic). |
| 5 - GND | Ground reference | Common return for IN, OUT, BIAS, and EN; connects to thermal pad for optimal thermal performance. |
| 6 - IN | Main input supply | Feeds NMOS pass element; operates from 0.8 V to 5.5 V; requires ≥1.11 V for 1.00 V output at 350 mA. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-rail NMOS architecture | Decouples output regulation (VIN) from control circuitry (VBIAS), enabling 80 µA typical bias current and eliminating PMOS gate-drive limitations. |
| Ultra-low dropout (110 mV) | Supports operation with minimal headroom-critical for battery-powered ADAS cameras where VIN may dip near 1.1 V during cold cranking. |
| Wettable flanks WDFN6 | Enables automated AOI of solder joints on bottom-side terminations, improving manufacturing yield in automotive SMT lines. |
| Monotonic soft-start | Prevents output voltage undershoot/overshoot during power-up, avoiding false resets in connected SoCs or FPGAs. |
| AEC-Q100 Grade 1 | Qualified for −40 °C to +125 °C ambient operation with PPAP documentation support-meets Tier-1 automotive qualification requirements. |
Applications
| Automotive Camera Module Power | FPGA I/O Rail Regulation |
|---|---|
|
Use Scenario: Powering image sensor and ISP interface circuitry in rear-view or surround-view cameras operating under wide temperature and battery voltage ranges. IC Role / Device Role / Timing Role: Primary 1.00 V LDO delivering clean, stable power to MIPI CSI-2 transmitter I/O banks and sensor analog front-end. Use Value: 65 dB PSRR at 1 kHz rejects ripple from 2 MHz buck converters; ±2% accuracy ensures reliable LVDS/MIPI signal integrity across temperature. |
Use Scenario: Supplying configurable I/O banks on Xilinx Artix-7 or Intel Cyclone V FPGAs in vehicle infotainment gateways. IC Role / Device Role / Timing Role: Fixed-output post-regulator providing precise 1.00 V to FPGA I/O standards (e.g., HSTL, SSTL) requiring tight voltage tolerance. Use Value: 110 mV dropout allows regulation from 1.11 V input-enabling use after low-VIN buck stages; monotonic start prevents configuration errors. |
| ADAS Radar Signal Chain Bias | Industrial Vision Sensor Interface |
|
Use Scenario: Biasing RF front-end components and ADC drivers in 77 GHz radar modules where EMI immunity and thermal stability are critical. IC Role / Device Role / Timing Role: Low-noise 1.00 V supply for high-speed ADC reference buffers and digital baseband I/O, isolated from noisy digital domains. Use Value: 40 µVRMS output noise and >65 dB PSRR minimize jitter in sampling clocks; Grade 1 rating ensures reliability at under-hood temperatures. |
Use Scenario: Powering CMOS image sensors and embedded vision processors in factory automation cameras exposed to industrial ambient extremes. IC Role / Device Role / Timing Role: Point-of-load regulator converting 3.3 V or 5 V system rails to 1.00 V for sensor pixel array and timing controller logic. Use Value: Stable operation with 2.2 µF ceramic capacitor reduces board area vs. tantalum alternatives; wettable flanks support IPC-A-610 Class 3 inspection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NCV8720BMTW100TBG | Same die, wettable flanks variant (vs. non-wettable flanks in NCV8720BMT100TBG); identical electrical specs. | Required for AOI-capable SMT lines; preferred in new automotive designs with automated optical inspection mandates. | Select NCV8720BMTW100TBG if AOI of bottom terminations is required; otherwise NCV8720BMT100TBG suffices for standard reflow. |
| TLD1113-10ES | 1.0 V fixed LDO, 300 mA, AEC-Q100 Grade 1, but uses PMOS topology; higher dropout (250 mV at 300 mA), no VBIAS rail. | Lacks dual-rail flexibility; less suitable for ultra-low-VIN post-regulation or systems needing independent bias rail control. | Choose only if VBIAS complexity is undesirable and 250 mV dropout is acceptable; not drop-in due to different pinout and architecture. |
Compared with NCV8720BMT100TBG, the wettable-flank variant offers identical performance with enhanced manufacturability, while TLD1113-10ES trades dropout and architecture simplicity for reduced component count-but cannot replicate the 110 mV dropout or VBIAS-enabled low-IQ benefits.
Availability
NCV8720BMT100TBG is available at Aetrix Electronics and suitable for automotive camera modules, FPGA I/O power, ADAS radar biasing, and industrial vision sensor interfaces requiring stable component supply, AEC-Q100 compliance, and long-term lifecycle support.
Supply support for NCV8720BMT100TBG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NCV8720 series belongs to onsemi's automotive-qualified linear regulator portfolio, designed specifically for noise-sensitive, space-constrained point-of-load applications in ADAS, body electronics, and infotainment systems where ultra-low dropout and AEC-Q100 reliability are mandatory.
FAQ
What is the nominal output voltage of the NCV8720BMT100TBG?
The NCV8720BMT100TBG is factory-programmed for a fixed 1.00 V output voltage. This value is laser-trimmed during production and does not require external resistors or feedback networks. The ±2% accuracy is guaranteed over the full −40 °C to +125 °C ambient operating range, making it suitable for precision I/O rail applications in automotive environments where voltage tolerance directly impacts signal integrity.
Does the NCV8720BMT100TBG require an external bias supply, and what are its requirements?
Yes, the NCV8720BMT100TBG requires a separate VBIAS supply connected to Pin 4. VBIAS must be between 2.4 V and 5.5 V, with a minimum of (VOUT + 1.4 V) = 2.4 V for the 1.00 V output. It powers all internal control circuitry and enables ultra-low bias current (80 µA typical). A minimum 0.1 µF ceramic capacitor is recommended close to the BIAS pin to ensure stability and noise rejection.
Can the NCV8720BMT100TBG operate with a 2.2 µF ceramic output capacitor?
Yes, the NCV8720BMT100TBG is explicitly designed to be stable with a 2.2 µF ceramic output capacitor-no ESR requirement or additional compensation is needed. This simplifies design, reduces board area, and improves reliability compared to tantalum or aluminum electrolytic alternatives. The device remains stable across the full effective capacitance range of 2.2 µF to 10 µF, including parallel capacitor configurations.
What is the maximum junction temperature and thermal protection behavior of the NCV8720BMT100TBG?
The NCV8720BMT100TBG includes internal thermal shutdown that activates at +160 °C junction temperature and resets at +140 °C. Its maximum rated junction temperature is 150 °C. When thermal shutdown triggers, the output is disabled until the die cools below the reset threshold. To maintain safe operation, the PCB must provide adequate thermal dissipation-using the exposed thermal pad soldered to a ground plane achieves RJA = 65 °C/W per JEDEC JESD51 simulation.
Is the NCV8720BMT100TBG pin-compatible with other variants in the NCV8720 family?
Yes, all NCV8720 variants-including NCV8720BMT100TBG, NCV8720BMTW100TBG, and NCV8720BMT150TBG-share identical WDFN6 pinout, package dimensions, and terminal functions. Only the output voltage and marking code differ. This allows seamless voltage-scaling within the same PCB layout, provided the VBIAS and VIN operating ranges remain compatible with the selected output voltage.
NCV8720BMT100TBG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 6-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.2V @ 350mA
- Current - Output:
- 350mA
- Current - Quiescent (Iq):
- -
- Current - Supply (Max):
- -
- PSRR:
- 52dB ~ 25dB (10Hz ~ 1MHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WDFN (2x2)
NCV8720BMT100TBG FAQ
1.How can I place an order for NCV8720BMT100TBG through Aetrix?
Please submit a Request for Quotation (RFQ) for NCV8720BMT100TBG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCV8720BMT100TBG reliable?
The price and inventory of NCV8720BMT100TBG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCV8720BMT100TBG is usually 5 days.
3.What payment methods are accepted for NCV8720BMT100TBG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCV8720BMT100TBG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCV8720BMT100TBG?
NCV8720BMT100TBG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCV8720BMT100TBG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCV8720BMT100TBG?
For technical support, including NCV8720BMT100TBG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCV8720BMT100TBG requirements.
6.How does Aetrix verify that NCV8720BMT100TBG is sourced from the original manufacturer or authorized distributors?
All NCV8720BMT100TBG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCV8720BMT100TBG meets industry standards.
7.What is the process for return or replacement of NCV8720BMT100TBG?
All NCV8720BMT100TBG units undergo pre-shipment inspection (PSI). If there is an issue with NCV8720BMT100TBG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCV8720BMT100TBG part is unused and in its original packaging.
Return procedure for NCV8720BMT100TBG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NCV8720BMT100TBG Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

