onsemi NCV890130PDR2G
- Part No.:
- NCV890130PDR2G
- Manufacturer:
- onsemi
- Package:
- 8-SOIC (0.154", 3.90mm Width) Exposed Pad
- Datasheet:
-
NCV890130PDR2G.pdf
- Description:
- IC REG BUCK ADJ 1.2A 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,499
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Product details
Overview
NCV890130PDR2G from onsemi is an AEC-Q100 qualified automotive buck switching regulator with internal N-channel power switch, 2 MHz fixed switching frequency, 4.5 V to 36 V input range, and 3.3 V/1.2 A output capability. It operates above the AM band to minimize EMI, features cycle-by-cycle current limit (1.4 A min), ±1.75% output voltage tolerance, and thermal shutdown - designed for driver information systems requiring compact, low-noise DC-DC conversion.
For engineers reviewing the NCV890130PDR2G datasheet, pinout, applications, or equivalent options, key selection criteria include VIN withstand up to 45 V (load dump), wettable-flank SOIC-8 EP package for solder joint inspection, bootstrap gate drive architecture, and frequency foldback protection at high input voltage.
Technical Context
The NCV890130PDR2G implements current-mode PWM control with integrated oscillator, soft-start (1.4 ms), and slope compensation to prevent subharmonic oscillation above 50% duty cycle. Its error amplifier uses transconductance topology (gm = 0.6–1.0 mS) with external COMP network for loop stability tuning.
It incorporates dual-level protection: VIN overvoltage shutdown (36 V stop threshold), short-circuit foldback (400–600 kHz), and hiccup mode recovery. The DRV pin provides regulated 3.3 V gate drive, while FB pin monitors output via resistive divider and detects precharged outputs via 20–50 mV threshold.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 36 V - supports full automotive battery range including cold crank (4.5 V) and load dump (withstands 45 V transient) |
| Switching Frequency | 2 MHz (typ) - enables small inductor (4.7 µH) and ceramic output capacitor, avoids AM band interference |
| Output Current | 1.2 A continuous - limited by 1.4 A min peak current limit and thermal design in SOIC-8 EP package |
| Output Voltage Accuracy | ±1.75% - ensures stable microcontroller or sensor rail under temperature and line/load variation |
| Enable Input Logic | TTL-compatible, direct battery-tie capable - eliminates need for level-shifting circuitry in automotive systems |
| Thermal Shutdown | 150 °C activation - protects against sustained overload or poor heatsinking in enclosed infotainment enclosures |
| Quiescent Current | 3.0 mA enabled / 10 µA shutdown - meets automotive standby power requirements for always-on modules |
Pinout & Package
NCV890130PDR2G is housed in a thermally enhanced SOIC-8 EP (Case 751AC) with exposed pad connected to GND for improved thermal dissipation and EMI performance. Wettable flanks support automated optical solder-joint inspection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pin 1) | Primary input supply | Accepts 4.5–36 V; requires local ceramic input capacitor to handle high di/dt switching currents |
| DRV (Pin 2) | Internal gate driver supply | Provides regulated 3.3 V to charge external bootstrap capacitor (CBST); UVLO thresholds at 2.7–3.05 V |
| GND (Pin 3) | Power and signal reference | Must be connected to exposed pad; forms return path for SW node and feedback network |
| EN (Pin 4) | Logic enable control | Active-high TTL input; direct connection to battery enables wake-on-power; pulls to GND for shutdown |
| COMP (Pin 5) | Error amplifier output | Connects to RC network for loop compensation; sets transient response and phase margin |
| FB (Pin 6) | Feedback voltage sense | Monitors output via resistor divider; detects precharged outputs (>20 mV) before soft-start initiation |
| BST (Pin 7) | Bootstrap supply input | Charges external capacitor to generate gate voltage > VIN for low RDS(on) operation of internal FET |
| SW (Pin 8) | Power switch node | Connects to inductor and freewheeling diode cathode; carries high di/dt current and requires tight layout |
Key Features
| Feature | Design Value |
|---|---|
| 2 MHz fixed-frequency operation | Enables use of 4.7 µH inductor and all-ceramic output filter - reduces solution size by >40% vs. 500 kHz designs |
| Frequency foldback at high VIN | Reduces switching frequency to 500 kHz when VIN exceeds 18.4 V - maintains regulation while limiting power loss and thermal stress |
| Wettable-flank SOIC-8 EP package | Supports automated AOI of solder joints on bottom leads - critical for automotive production traceability and reliability validation |
| Output precharge detection | Delays startup until FB < 20 mV - prevents uncontrolled inrush into pre-biased outputs common in multi-rail automotive systems |
| AEC-Q100 Grade 1 qualification | Validated for −40 °C to +125 °C ambient operation - meets stringent automotive junction temperature and lifetime requirements |
Applications
| Audio Power Supply | Infotainment Head Unit |
|---|---|
Use Scenario: Providing clean 3.3 V or 5 V rail to Class D audio amplifiers and DSPs in vehicle cabin audio systems. IC Role / Device Role / Timing Role: Primary buck regulator converting 12 V battery to low-noise analog/digital supply; 2 MHz switching avoids audible noise coupling. Use Value: Eliminates need for bulky LC filters due to high-frequency operation - saves PCB space in space-constrained door modules and center stacks. | Use Scenario: Powering display controllers, touch processors, and USB hubs in centralized infotainment head units. IC Role / Device Role / Timing Role: Main system regulator delivering 1.2 A at 3.3 V with fast transient response to handle burst-mode processor loads. Use Value: ±1.75% output accuracy ensures reliable boot and operation of ARM-based SoCs; EN pin enables deep-sleep mode during vehicle ignition-off. |
| Safety Vision System | Instrument Cluster |
Use Scenario: Supplying image sensor and ISP rails in rear-view or surround-view camera ECUs. IC Role / Device Role / Timing Role: High-reliability DC-DC converter with load-dump immunity (45 V) and thermal shutdown for under-hood camera mounting. Use Value: Withstands ISO 7637-2 pulse 5a (load dump) without external TVS - reduces BOM count and improves system robustness. | Use Scenario: Generating 5 V and 3.3 V supplies for digital gauges, CAN transceivers, and backlight drivers in instrument clusters. IC Role / Device Role / Timing Role: Dual-rail capable regulator (via FB divider) supporting both logic and analog subsystems with independent enable control. Use Value: Soft-start (1.4 ms) prevents inrush-induced voltage droop on shared battery bus - avoids CAN communication glitches during cluster power-up. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NCV890230PDR2G | Same SOIC-8 EP package, 2 MHz, but rated for 2.3 A output and higher 2.1 A current limit | Preferred for higher-current infotainment displays or multi-camera systems requiring >1.2 A | Select when output current demand exceeds 1.2 A; shares identical pinout and compensation design |
| MPQ4420AGL-AEC1-Z | Monolithic 2 A buck with 2.2 MHz switching, but uses QFN-10 package and lacks wettable flanks | Suitable for new designs prioritizing footprint size over AOI capability; no load-dump rating specified | Choose for cost-sensitive non-safety-critical modules where AEC-Q100 compliance is required but load-dump immunity is managed externally |
Compared with NCV890230PDR2G and MPQ4420AGL-AEC1-Z, the NCV890130PDR2G offers optimal balance of AEC-Q100 Grade 1 qualification, 45 V load-dump tolerance, wettable-flank manufacturability, and 1.2 A capability - making it ideal for mid-tier automotive subsystems where reliability and testability are prioritized over maximum current.
Availability
NCV890130PDR2G is available at Aetrix Electronics and suitable for automotive infotainment, safety vision systems, and instrument cluster applications requiring stable component supply, AEC-Q100 compliance, and long-term lifecycle support.
Supply support for NCV890130PDR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NCV890130PDR2G belongs to onsemi's automotive-grade power management portfolio, engineered specifically for battery-connected DC-DC conversion in driver information and ADAS subsystems where EMI, thermal, and transient robustness are critical.
FAQ
What is the maximum input voltage the NCV890130PDR2G can withstand during load dump events?
The NCV890130PDR2G is rated to withstand 45 V transients on the VIN pin, meeting ISO 7637-2 Pulse 5a requirements for automotive load dump protection. This eliminates the need for external TVS diodes in many implementations, though system-level testing is recommended per vehicle manufacturer specifications. The device shuts down at 36 V (VOVSTP) and resumes operation once VIN falls below 35.4 V.
Does the NCV890130PDR2G require an external bootstrap capacitor, and what is its typical value?
Yes, the NCV890130PDR2G requires an external 0.1 µF ceramic bootstrap capacitor (CBST) connected between BST and SW pins. This capacitor sustains gate drive voltage for the internal N-channel MOSFET during high-side switching. The datasheet specifies CDRV = 0.1 µF on the DRV pin to stabilize the internal gate driver regulator, which in turn charges CBST. Layout must minimize trace inductance between BST, SW, and CBST.
How does the NCV890130PDR2G handle short-circuit conditions?
Under short-circuit, the NCV890130PDR2G initiates frequency foldback - reducing switching frequency from 2 MHz to 400–600 kHz - to limit peak switch current. If overload persists, it enters hiccup mode (24–40 kHz burst switching) to minimize power dissipation and thermal stress. Recovery is automatic once the fault clears, with full soft-start reinitiation to prevent inrush.
Can the NCV890130PDR2G operate with a 3.3 V input supply?
No, the NCV890130PDR2G has an undervoltage lockout (UVLO) start threshold of 4.1–4.5 V. Operation below 4.5 V is not supported. For 3.3 V input applications, a different regulator such as the NCV8853 (3.0–40 V input) would be required. Attempting to operate below UVLO may result in erratic switching or failure to regulate.
What is the purpose of the exposed pad on the NCV890130PDR2G SOIC-8 EP package?
The exposed pad on the NCV890130PDR2G must be soldered to a PCB copper pour connected to Pin 3 (GND). It serves two critical functions: (1) lowers thermal resistance (RJA = 50 °C/W) to improve power dissipation, and (2) provides a low-inductance ground return path for high-frequency switching currents - essential for EMI control and stable regulation. Failure to connect it degrades thermal performance and may cause instability.
NCV890130PDR2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 36V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 34V
- Current - Output:
- 1.2A
- Frequency - Switching:
- 2MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC-EP
NCV890130PDR2G FAQ
1.How can I place an order for NCV890130PDR2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NCV890130PDR2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCV890130PDR2G reliable?
The price and inventory of NCV890130PDR2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCV890130PDR2G is usually 5 days.
3.What payment methods are accepted for NCV890130PDR2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCV890130PDR2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCV890130PDR2G?
NCV890130PDR2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCV890130PDR2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCV890130PDR2G?
For technical support, including NCV890130PDR2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCV890130PDR2G requirements.
6.How does Aetrix verify that NCV890130PDR2G is sourced from the original manufacturer or authorized distributors?
All NCV890130PDR2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCV890130PDR2G meets industry standards.
7.What is the process for return or replacement of NCV890130PDR2G?
All NCV890130PDR2G units undergo pre-shipment inspection (PSI). If there is an issue with NCV890130PDR2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCV890130PDR2G part is unused and in its original packaging.
Return procedure for NCV890130PDR2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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