Texas Instruments NE555PSRG4
- Part No.:
- NE555PSRG4
- Manufacturer:
- Texas Instruments
- Category:
- Programmable Timers and Oscillators
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
NE555PSRG4.pdf
- Description:
- IC OSC SINGLE TIMER 100KHZ 8SO
- Quantity:
- Payment:

- Shipping:

Inventory:4,262
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NE555PSRG4 from Texas Instruments is a bipolar precision timer IC operating in monostable or astable mode, delivering timing intervals from microseconds to hours with ±1% threshold accuracy, 200mA output sink/source capability, and 4.5V–16V supply range - widely used in pulse-shaping, missing-pulse detection, and industrial control circuits.
For engineers reviewing the NE555PSRG4 datasheet, NE555PSRG4 pinout, NE555PSRG4 application, or NE555PSRG4 equivalent, this page provides verified pin functions, real-world timing performance data, TTL-compatible output behavior under load, thermal derating guidance, and validated alternative options for legacy design continuity and supply resilience.
Technical Context
The NE555PSRG4 implements a dual-comparator + SR latch architecture with internal resistive divider (1/3 VCC and 2/3 VCC thresholds), open-collector discharge transistor, and push-pull output stage. Its trigger and threshold comparators respond to absolute voltage levels-not ratios-enabling predictable timing across temperature when CONT is bypassed.
Timing stability relies on external RC networks: monostable operation uses one resistor and capacitor (tw ≈ 1.1 × RAC); astable mode uses two resistors and one capacitor to independently set frequency (f ≈ 1.44/(RA + 2RB)C) and duty cycle (D ≈ (RA + RB)/(RA + 2RB)). Supply-voltage sensitivity is ≤0.5%/V and temperature coefficient is ≤50 ppm/°C over 0°C to 70°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply voltage | 4.5V to 16V - supports direct interface with TTL logic at 5V and industrial rails up to 15V without level shifting |
| Output drive | ±200mA - enables direct driving of relays, LEDs, or logic gates without external buffers |
| Threshold accuracy | ±1% at 25°C - ensures consistent timing across production units when using standard RC components |
| Timing range | 10µs to >1 hour - achieved via external R/C selection; minimum pulse width limited to 10µs by internal comparator storage time |
| Operating temperature | 0°C to +70°C - qualified for commercial-grade applications including consumer electronics and office equipment |
| Package | SOIC-8 (PS) - surface-mount compatible with automated assembly; 150°C max junction temperature rating |
| Rise/fall time | 100–300ns (CL = 15pF) - sufficient for <100kHz oscillator operation; higher frequencies require CMOS variants |
Pinout & Package
NE555PSRG4 is housed in an 8-pin SOIC (PS) package with 1.27mm pitch, JEDEC MS-012AC compliant, and rated for reflow per J-STD-020. Thermal resistance RθJA = 124.5°C/W enables operation at full output current up to +70°C ambient with minimal heatsinking.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pin 1) | Reference ground | Return path for all internal comparators, latch, and output stage; must be low-impedance to avoid timing drift |
| TRIG (Pin 2) | Start-of-timing input | Active-low edge-triggered input; asserts when voltage falls below ~⅓ VCC, initiating monostable or resetting astable cycle |
| OUT (Pin 3) | High-current output | Push-pull stage capable of sourcing/sinking up to 200mA; logic-high ≈ VCC – 0.25V (at 10mA), logic-low ≈ 0.15V (at 8mA) |
| RESET (Pin 4) | Asynchronous reset | Active-low override: forces OUT low and DISCH on regardless of TRIG/THRES state; tie to VCC if unused |
| CONT (Pin 5) | Threshold reference control | Exposes internal 2/3 VCC node; bypassing with 10nF improves noise immunity; applying external voltage alters trigger/threshold levels |
| THRES (Pin 6) | End-of-timing input | Monitors capacitor voltage during timing; asserts when > ~⅔ VCC, terminating monostable interval or discharging in astable mode |
| DISCH (Pin 7) | Timing capacitor discharge | Open-collector NPN output tied to GND when OUT is low; provides low-impedance discharge path for external timing capacitor |
| VCC (Pin 8) | Power supply input | Accepts 4.5V–16V; internal regulation supplies bias to comparators and latch; decoupling with 0.1µF ceramic required near pin |
Key Features
| Feature | Design Value |
|---|---|
| Adjustable duty cycle in astable mode | Enabled by independent RA (charge) and RB (discharge) resistors - supports 50% to 99% waveform duty cycles without external diodes |
| TTL-compatible output at 5V | VOH ≥ 2.75V and VOL ≤ 0.35V at IOL = 5mA - meets standard TTL input thresholds without pull-up resistors |
| Internal voltage reference stability | Trigger and threshold thresholds track VCC proportionally (≈⅓ and ≈⅔ VCC), making timing intervals supply-voltage invariant |
| Reset override functionality | Asynchronous active-low RESET pin allows precise external termination of timing cycles - critical for safety interlocks and fault recovery |
| Low quiescent current | Typical 3–6mA supply current at 5V no-load - enables battery-powered applications with extended standby duration |
Applications
| Pulse-Width Modulation (PWM) Generator | Missing-Pulse Detector |
|---|---|
|
Use Scenario: Generating variable-duty-cycle control signals for motor speed regulation or LED dimming using analog modulation input. IC Role / Device Role / Timing Role: Monostable timer triggered by fixed-frequency clock; CONT pin modulated to vary threshold, directly altering output pulse width. Use Value: Enables analog-controlled PWM without microcontroller; timing accuracy remains stable across supply and temperature due to internal VCC-ratio referencing. |
Use Scenario: Monitoring serial data streams or sensor pulse trains to detect communication failures or sensor dropouts. IC Role / Device Role / Timing Role: Monostable circuit continuously retriggered by incoming pulses; output pulses only when inter-pulse gap exceeds RC-set timeout. Use Value: Provides hardware-level fault detection with <10µs response latency; eliminates firmware polling overhead and software crash dependencies. |
| Industrial Sequential Timer | Frequency Divider Circuit |
|
Use Scenario: Power-up sequencing in PLC modules or test equipment requiring staggered activation of subsystems. IC Role / Device Role / Timing Role: Cascaded NE555PSRG4 timers where output of first triggers second, enabling precise multi-stage delay chains. Use Value: Delivers deterministic, repeatable delays (e.g., 100ms → 500ms → 1.2s) without code or EEPROM; immune to EMI-induced resets. |
Use Scenario: Reducing high-frequency clock signals (e.g., 10kHz) to lower rates (e.g., 3.3kHz) for synchronous logic domains. IC Role / Device Role / Timing Role: Monostable configured with RC time constant matching input period; retriggering prevents output pulse completion unless input pauses. Use Value: Achieves integer division (e.g., ÷3) using passive components only - no counters or programmable logic required. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar precision timer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM555CMX/NOPB | Same bipolar architecture, identical pinout, but rated for 0°C to +70°C with 15V max VCC and 200mA output - minor parameter spread in THRES/TRIG thresholds (±1.5% vs ±1%) | Valid drop-in replacement in commercial-temp designs; not qualified for extended temp or 16V operation | Select when cost sensitivity outweighs marginal timing accuracy loss and 16V headroom is unnecessary |
| TLC555IP | CMOS version with 2V–15V supply, 100µA quiescent current, and rail-to-rail output - lacks 200mA drive and exhibits higher propagation delay (500ns vs 300ns) | Suitable for low-power, battery-operated systems; unsuitable for relay/LED direct drive or high-speed timing | Choose for energy-constrained applications where timing resolution >10µs is acceptable and output load <10mA |
Compared with LM555CMX/NOPB, NE555PSRG4 offers tighter threshold tolerance and 16V operation; versus TLC555IP, it delivers 20× higher output current and faster edge rates but consumes 30× more quiescent power - selection depends on drive strength, supply margin, and power budget priorities.
Availability
NE555PSRG4 is available at Aetrix Electronics and suitable for industrial controls, pulse-shaping circuits, and missing-pulse detectors requiring stable component supply across long-lifecycle embedded programs.
Supply support for NE555PSRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic technologies, with over 50 years of analog design heritage and broad industrial qualification standards.
The NE555PSRG4 belongs to TI's legacy precision timer product line, engineered for robustness in commercial-grade timing applications where reliability, wide supply range, and high-output drive are prioritized over ultra-low power or sub-microsecond precision.
FAQ
What is the maximum supply voltage for NE555PSRG4?
The absolute maximum supply voltage for NE555PSRG4 is 18V, but recommended operating conditions specify 4.5V to 16V. Operating at 16V ensures full 200mA output capability and maintains timing accuracy within datasheet limits; exceeding 16V risks parametric shift and reduced long-term reliability. The NE555PSRG4 must never be operated above 18V, even momentarily.
Can NE555PSRG4 drive a 12V relay directly?
Yes, NE555PSRG4 can drive a 12V relay directly when VCC = 12V and coil resistance ≥60Ω (requiring ≤200mA). Its output sinks 200mA at VOL ≤ 0.4V, providing sufficient margin for typical relay dropout voltages. Always include a flyback diode across the coil, and verify relay coil inductance does not induce voltage spikes exceeding 18V at the DISCH or OUT pins.
How does the CONT pin affect timing accuracy in NE555PSRG4?
The CONT pin exposes the internal 2/3 VCC node; leaving it unconnected or bypassing with 10nF to GND stabilizes thresholds against noise and improves timing repeatability. Applying external voltage to CONT directly scales both trigger (⅓ × VCONT) and threshold (⅔ × VCONT) levels - enabling voltage-controlled oscillation but introducing sensitivity to source impedance and noise on the CONT line.
Is NE555PSRG4 pin-compatible with older NE555 variants?
Yes, NE555PSRG4 uses the industry-standard 8-pin SOIC (PS) footprint and identical pinout to all NE555 family members in D, P, PS, and PW packages. It replaces NE555P, NE555D, and NE555PW in new designs without PCB changes, maintaining full functional and electrical compatibility across supply, timing, and drive specifications.
What is the minimum monostable pulse width achievable with NE555PSRG4?
The minimum guaranteed monostable pulse width for NE555PSRG4 is 10µs, determined by internal comparator storage time after grounding TRIG. Achieving shorter intervals is not specified or characterized; attempting sub-10µs pulses results in inconsistent triggering and missed outputs. For <10µs timing, consider high-speed logic timers or dedicated monostables like SN74LVC1G123.
NE555PSRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- 555 Type, Timer/Oscillator (Single)
- Count:
- -
- Frequency:
- 100kHz
- Voltage - Supply:
- 4.5V ~ 16V
- Current - Supply:
- 10 mA
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 8-SO
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
NE555PSRG4 FAQ
1.How can I place an order for NE555PSRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for NE555PSRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NE555PSRG4 reliable?
The price and inventory of NE555PSRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NE555PSRG4 is usually 5 days.
3.What payment methods are accepted for NE555PSRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NE555PSRG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NE555PSRG4?
NE555PSRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NE555PSRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NE555PSRG4?
For technical support, including NE555PSRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NE555PSRG4 requirements.
6.How does Aetrix verify that NE555PSRG4 is sourced from the original manufacturer or authorized distributors?
All NE555PSRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NE555PSRG4 meets industry standards.
7.What is the process for return or replacement of NE555PSRG4?
All NE555PSRG4 units undergo pre-shipment inspection (PSI). If there is an issue with NE555PSRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NE555PSRG4 part is unused and in its original packaging.
Return procedure for NE555PSRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NE555PSRG4 Tags

-
NE555DR
Texas Instruments

-
SA555DR
Texas Instruments

-
NA555DR
Texas Instruments

-
SE555DR
Texas Instruments

-
NE555P
Texas Instruments
-
CD4541BM96
Texas Instruments

-
CD4541BE
Texas Instruments

-
TLC555QDR
Texas Instruments

-
TLC555IDR
Texas Instruments

-
TLC555QDRQ1
Texas Instruments

-
TPL5010DDCR
Texas Instruments

-
TLC555CP
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
