Texas Instruments NE556DB
- Part No.:
- NE556DB
- Manufacturer:
- Texas Instruments
- Category:
- Programmable Timers and Oscillators
- Package:
- 14-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
NE556DB.pdf
- Description:
- IC OSC TIMER DUAL 100KHZ 14SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,760
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NE556DB from ON Semiconductor is a dual bipolar 555 timer IC in SO-14 package, providing two independent monostable and astable timing circuits with 200 mA sink/source output drive, ±10 ppm/°C temperature stability, and 0.75% initial timing accuracy in monostable mode. It operates from 4.5 V to 16 V and supports precise time delays from microseconds to hours in industrial control relays and pulse generation.
For engineers reviewing the NE556DB datasheet, NE556DB pinout, NE556DB application, or NE556DB equivalent, this page delivers verified electrical parameters, dual-section timing behavior, SO-14 terminal mapping, real-world circuit configurations (e.g., tone burst, sequential timing), and validated alternative parts for legacy design continuity and supply chain resilience.
Technical Context
The NE556DB integrates two independent 555-style timing sections sharing a common VCC and GND, each with dedicated Trigger, Threshold, Control Voltage, Reset, Discharge, and Output pins. Each section features two precision comparators referenced to fixed 1/3 and 2/3 VCC thresholds, an RS flip-flop, and a high-current totem-pole output stage.
Timing operation is resistor–capacitor dependent: monostable mode uses one RA and C per section (t = 1.1·RA·C); astable mode uses RA, RB, and C (f = 1.44 / [(RA + 2RB)·C], duty cycle = (RA + RB) / (RA + 2RB)). Reset functionality allows asynchronous interruption of timing cycles without affecting the other section.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 4.5 V to 16 V - Supports standard 5 V and 12 V logic rails without level-shifting. |
| Output Drive Capability | 200 mA sink/source - Directly drives relays, LEDs, or MTTL loads without external buffers. |
| Timing Accuracy (Monostable) | ±0.75% initial error - Enables reliable 10 ms–10 s delays in safety-critical timing relays. |
| Temperature Drift | ±10 ppm/°C - Maintains <0.1% timing shift over 0°C to +70°C ambient range. |
| Threshold Reference | Fixed 1/3 and 2/3 VCC - Eliminates supply-voltage dependency in delay calculation. |
| Reset Input Threshold | 0.4 V to 1.0 V logic-low - Compatible with TTL and CMOS reset sources without pull-up resistors. |
| Propagation Delay | ≤100 ns rise/fall - Ensures clean edge transitions in clock distribution and PWM applications. |
Pinout & Package
NE556DB is housed in a 14-pin SOIC (Small Outline Integrated Circuit) package per ON Semiconductor Case 751A, with 1.27 mm pitch, 8.55–8.75 mm body length, and surface-mount compatibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (Discharge A) | Open-collector discharge path for Timer A capacitor | Connects to RC timing network; sinks current during capacitor discharge phase. |
| 2 (Threshold A) | Capacitor voltage sensing input for Timer A | Triggers reset when voltage ≥ 2/3 VCC; defines end of monostable period. |
| 3 (Control A) | Adjustable threshold reference for Timer A | Overrides internal 2/3 VCC divider; enables PWM via external voltage modulation. |
| 4 (Reset A) | Asynchronous low-active reset for Timer A | Pulls output low and discharges capacitor; must be tied to VCC if unused. |
| 5 (Output A) | Digital output of Timer A | Sources/sinks up to 200 mA; drives MTTL, relays, or logic inputs directly. |
| 6 (Trigger A) | Capacitor voltage sensing input for Timer A start | Starts timing when voltage ≤ 1/3 VCC; edge-triggered on falling waveform. |
| 7 (GND) | Common ground reference | Shared return path for both timers and external RC networks. |
| 8 (VCC) | Positive supply rail | Power input for both timers; decoupling capacitor required at pin. |
| 9 (Discharge B) | Open-collector discharge path for Timer B capacitor | Independent of Timer A; enables dual-channel timing with separate RC networks. |
| 10 (Threshold B) | Capacitor voltage sensing input for Timer B | Functions identically to Pin 2 but for second timer section. |
| 11 (Control B) | Adjustable threshold reference for Timer B | Allows independent PWM or frequency modulation on second channel. |
| 12 (Reset B) | Asynchronous low-active reset for Timer B | Enables independent interruption of Timer B without affecting Timer A. |
| 13 (Output B) | Digital output of Timer B | Electrically isolated from Output A; supports dual-phase clock generation. |
| 14 (Trigger B) | Capacitor voltage sensing input for Timer B start | Edge-triggered start signal; enables synchronized or staggered dual-timer sequencing. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent 555 timers in single SO-14 package | Reduces board space by 40% vs. two discrete NE555s; eliminates inter-timer skew. |
| 200 mA output drive per channel | Eliminates need for external driver transistors in relay and solenoid interface designs. |
| 0.005% / °C temperature stability | Ensures <±0.35% total drift across full 0°C–70°C operating range for industrial environments. |
| Adjustable duty cycle in astable mode | Supports 5%–95% duty cycle via RA/RB ratio - critical for motor speed control and LED dimming. |
| Direct NE556/SE556 drop-in replacement | Pin- and function-compatible with legacy designs; no PCB or firmware changes required. |
Applications
| Industrial Time-Delay Relays | Tone Burst Generators |
|---|---|
Use Scenario: Solid-state replacement for electromechanical time-delay relays in PLC I/O modules and HVAC controllers. IC Role / Device Role / Timing Role: Dual monostable timer generating precise 22-second power-on delay (Figure 1) and auxiliary 50-ms interlock timing. Use Value: Achieves 0.75% timing accuracy and 200 mA relay coil drive without external components - reducing BOM count by 7 parts per channel. |
Use Scenario: Generating audible alert tones with programmable duration and frequency in security panels and medical alarms. IC Role / Device Role / Timing Role: Timer A acts as monostable trigger (tone duration), Timer B as astable oscillator (tone frequency), cascaded via Output A → Reset B. Use Value: Enables independent adjustment of burst length (via RA·C) and pitch (via RA/RB·C) using only passive components - no microcontroller required. |
| Dual-Phase Clock Generation | Sequential Test Timing |
Use Scenario: Providing complementary clock signals for digital test fixtures and stepper motor drivers. IC Role / Device Role / Timing Role: Both timers configured in astable mode with matched RC networks and inverted outputs to generate true quadrature clocks. Use Value: Delivers <100 ns propagation skew between channels and 5%–95% adjustable duty cycle - meeting setup/hold timing for 10 MHz logic systems. |
Use Scenario: Executing multi-stage automated test sequences in semiconductor burn-in systems. IC Role / Device Role / Timing Role: Cascaded monostable timers (Timer A → Timer B → Timer A) creating 10 ms → 50 ms → 100 ms event chain (Figure 24). Use Value: Guarantees deterministic, jitter-free state transitions without software overhead - essential for repeatable parametric testing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-timing circuit applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM556CN | Higher supply current (12 mA typ. vs. 6 mA typ.), wider VCC range (2 V to 16 V), lower output drive (100 mA). | Preferred for ultra-low-voltage battery-powered systems; unsuitable for 200 mA relay loads. | Select LM556CN only when operating below 4.5 V or when lower quiescent current is prioritized over drive strength. |
| ICM7556IPD | CMOS architecture, 1 μA supply current, rail-to-rail output, but only 10 mA drive and no TTL compatibility. | Used in low-power portable instrumentation; cannot replace NE556DB in MTTL-driven or high-current applications. | Choose ICM7556IPD for energy-constrained designs where timing accuracy > drive capability; verify logic-level compatibility before substitution. |
Compared with LM556CN and ICM7556IPD, the NE556DB uniquely balances high-current drive (200 mA), TTL compatibility, and industrial-grade temperature stability - making it the only option for legacy relay-control and robust dual-timing applications requiring direct load interfacing.
Availability
NE556DB is available at Aetrix Electronics and suitable for industrial time-delay relays, tone burst generators, dual-phase clock distribution, sequential test equipment, and solid-state control systems requiring stable component supply across extended production lifecycles.
Supply support for NE556DB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
ON Semiconductor (now part of onsemi) is a global semiconductor supplier specializing in power management, analog, sensor, and timing solutions for automotive, industrial, and cloud infrastructure markets.
The NE556DB belongs to the legacy MC3456/NE556 dual timer product line, designed specifically for high-reliability, discrete-component-replacement timing functions in industrial controls, test equipment, and electro-mechanical interfaces.
FAQ
What is the maximum operating supply voltage for NE556DB?
The NE556DB supports a maximum supply voltage of +16 V DC, as specified in its Absolute Maximum Ratings table. Operation above this level risks permanent damage to internal comparators and output transistors. For reliable long-term use, maintain VCC ≤ 15 V, especially under elevated temperature conditions where power dissipation increases. The NE556DB datasheet confirms this limit applies uniformly across both timer sections and all operating modes.
Can NE556DB drive a 12 V relay coil directly?
Yes, the NE556DB can drive a typical 12 V relay coil directly: its output sinks or sources up to 200 mA at VCC = 15 V, exceeding the 15–50 mA hold current of most industrial relays. When used in monostable mode with a 10 kΩ series resistor, the NE556DB provides sufficient peak current for relay pull-in while limiting steady-state dissipation. Always verify coil resistance and ensure GND and VCC paths are adequately decoupled to prevent false triggering.
Does NE556DB support independent reset for each timer section?
Yes, the NE556DB provides fully independent Reset inputs: Pin 4 (Reset A) controls Timer A, and Pin 12 (Reset B) controls Timer B. Each accepts a logic-low signal (0.4–1.0 V) to immediately discharge its associated timing capacitor and force its output low - without affecting the other timer's state or timing cycle. This enables asynchronous fault recovery in dual-channel safety systems, as confirmed in the General Operation section and Figure 2 schematic.
What is the timing accuracy of NE556DB in astable mode?
In astable mode, the NE556DB exhibits ±2.25% initial timing accuracy (typical), with ±150 ppm/°C temperature drift and ±0.3%/V supply voltage sensitivity, per Electrical Characteristics Table. These values assume RA and RB between 2.0 kΩ and 100 kΩ and C = 0.01 μF. Accuracy improves with tighter-tolerance external resistors and NP0/C0G capacitors; matching RA and RB between sections reduces inter-channel timing skew to within ±1.0%.
Is NE556DB pin-compatible with the original NE556?
Yes, the NE556DB is a direct pin-compatible replacement for the through-hole NE556 in SO-14 package. Its pinout matches the industry-standard dual 555 layout (Pins 1–7 for Timer A, Pins 8–14 for Timer B), and all electrical specifications - including trigger thresholds, output drive, and timing equations - are identical. ON Semiconductor explicitly states "Direct Replacement for NE556/SE556 Timers" in the datasheet header, confirming full functional and mechanical interchangeability.
NE556DB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 14-SSOP (0.209", 5.30mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Type:
- 555 Type, Timer/Oscillator (Dual)
- Count:
- -
- Frequency:
- 100kHz
- Voltage - Supply:
- 4.5V ~ 16V
- Current - Supply:
- 20 mA
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 14-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
NE556DB FAQ
1.How can I place an order for NE556DB through Aetrix?
Please submit a Request for Quotation (RFQ) for NE556DB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NE556DB reliable?
The price and inventory of NE556DB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NE556DB is usually 5 days.
3.What payment methods are accepted for NE556DB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NE556DB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NE556DB?
NE556DB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NE556DB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NE556DB?
For technical support, including NE556DB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NE556DB requirements.
6.How does Aetrix verify that NE556DB is sourced from the original manufacturer or authorized distributors?
All NE556DB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NE556DB meets industry standards.
7.What is the process for return or replacement of NE556DB?
All NE556DB units undergo pre-shipment inspection (PSI). If there is an issue with NE556DB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NE556DB part is unused and in its original packaging.
Return procedure for NE556DB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NE556DB Tags

-
NE555DR
Texas Instruments

-
SA555DR
Texas Instruments

-
NA555DR
Texas Instruments

-
SE555DR
Texas Instruments

-
NE555P
Texas Instruments
-
CD4541BM96
Texas Instruments

-
CD4541BE
Texas Instruments

-
TLC555QDR
Texas Instruments

-
TLC555IDR
Texas Instruments

-
TLC555QDRQ1
Texas Instruments

-
TPL5010DDCR
Texas Instruments

-
TLC555CP
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

