Nexperia USA Inc. NEX10000UBZ

Overview

NEX10000UB from Nexperia is a dual-output LCD bias power supply IC delivering programmable +4 V to +6 V (VPOS) and –4 V to –6 V (VNEG) for TFT-LCD panels, featuring an integrated synchronous boost converter, LDO regulator, and negative charge pump. It operates from 2.7 V–5.0 V input (single-cell Li-ion/Ni-Li/Li-Polymer), delivers up to 80 mA total output current, and achieves 86% efficiency at 40 mA combined load in a wafer-level chip-scale package (WLCSP15).

For engineers reviewing the NEX10000UB datasheet, NEX10000UB pinout, NEX10000UB application, or NEX10000UB equivalent, this device supports I²C-programmable rail sequencing, active output discharge, ±1% output voltage accuracy, excellent line/load transient response, and thermal/UVLO protection - critical for compact, battery-powered display power design.

Technical Context

The NEX10000UB implements a three-stage architecture: a 1.4 MHz current-mode synchronous boost converter generates an intermediate regulated rail (REG), which feeds both a high-PSRR LDO for VPOS and a switched-capacitor negative charge pump for VNEG. Output voltages are independently programmable via I²C (slave address 0x3E) in 0.1 V steps across full ranges.

Each output rail features independent enable control (ENP/ENN), soft-start, active discharge, and isolation from REG until enabled - enabling flexible startup sequences (e.g., VNEG before VPOS). The topology supports 100% asymmetry: VPOS and VNEG may be set to different magnitudes and loaded independently up to 80 mA total.

Key Specifications

Pinout & Package

Package: WLCSP15 (SOT8054-1), 1.16 × 1.96 × 0.62 mm body, 0.4 mm bump pitch, 15 solder bumps. Wafer-level construction enables ultra-thin integration directly beneath LCD flex cables or on compact display driver PCBs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-output LCD bias power applications.

Compared with NEX10001UB, the NEX10000UB trades output current for smaller solution size and lower quiescent current (0.73 mA typical), making it optimal for space- and battery-limited smartphones. Versus TPS65136RGTR, it offers superior integration (no external FETs), tighter regulation (±1% vs ±2%), and 40% smaller footprint - at the expense of vendor-specific I²C register mapping.

Availability

NEX10000UB is available at Aetrix Electronics and suitable for smartphone TFT-LCD, tablet TFT-LCD, and industrial HMI display applications requiring stable component supply, guaranteed long-term availability, and wafer-level packaging for ultra-thin integration.

Supply support for NEX10000UB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance, reliable, and scalable components for automotive, industrial, and mobile markets.

The NEX10000 series is designed specifically for compact, battery-powered TFT-LCD biasing - integrating boost, LDO, and charge pump functions into a single WLCSP die to minimize solution size while maintaining precision and robustness.

FAQ

What is the minimum recommended input capacitance for stable operation?

The datasheet specifies 4.7 µF (X5R ceramic, 0603) on VIN. This value ensures sufficient energy storage to handle peak inrush currents during boost converter startup and suppresses high-frequency noise from the switching node. Using less than 4.7 µF risks UVLO triggering under dynamic load or increased input ripple affecting regulation accuracy.

Can VPOS and VNEG be set to different absolute values simultaneously?

Yes. The NEX10000UB supports fully asymmetric operation: VPOS can be set from +4.0 V to +6.0 V while VNEG is independently set from –4.0 V to –6.0 V, all via separate I²C registers (0x00 and 0x01). This enables optimization for specific LCD panel requirements, such as +5.2 V / –5.8 V for enhanced contrast ratio.

How does the active discharge function operate during shutdown?

When ENP or ENN is pulled low, internal 23 Ω (VPOS) or 17.5 Ω (VNEG) discharge switches connect the output to PGND, collapsing the rail within milliseconds. This prevents residual charge from causing display ghosting or interfering with touch controller reset sequences - verified in Fig. 29 and Fig. 30 of the datasheet.

Is the I²C interface compatible with standard 3.3 V microcontrollers?

Yes. The SCL and SDA pins tolerate 2.7 V–5.0 V logic levels, with VIH ≥ 1.27 V and VIL ≤ 0.53 V at all supply voltages. Standard 3.3 V GPIOs drive the bus reliably, and the 400 kHz maximum clock rate ensures compatibility with most ARM Cortex-M and RISC-V MCU I²C peripherals without timing margin concerns.