onsemi NL17SV125DFT2G-Q
- Part No.:
- NL17SV125DFT2G-Q
- Manufacturer:
- onsemi
- Package:
- 5-TSSOP, SC-70-5, SOT-353
- Datasheet:
-
NL17SV125DFT2G-Q.pdf
- Description:
- ULP-A BUFFER 3-STATE
- Quantity:
- Payment:

- Shipping:

Inventory:4,362
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Product details
Overview
NL17SV125DFT2G-Q from onsemi is a single non-inverting 3-state buffer IC designed for low-voltage logic interfacing in space-constrained applications. It operates from 0.9 V to 3.6 V, delivers 1.6 ns typical propagation delay at 3.3 V, supports ±24 mA output drive, and features IOFF partial power-down protection. It is used in automotive infotainment data routing where voltage-level translation and bus isolation are required.
For engineers reviewing the NL17SV125DFT2G-Q datasheet, pinout, applications, or equivalent options, this page provides verified electrical parameters, SC-88A package mapping, AEC-Q100 qualification context, and real-world interface use cases - all confirmed from onsemi's official Rev. 4 datasheet (Jan. 2026).
Technical Context
The NL17SV125DFT2G-Q implements a single-channel non-inverting buffer with active-low 3-state enable (OE), enabling bidirectional bus control in mixed-voltage systems. Its IOFF circuitry prevents current backflow when VCC = 0 V, supporting live insertion and hot-swap operation.
It supports overvoltage-tolerant inputs/outputs up to 3.6 V independent of VCC, allowing safe interfacing with higher-voltage logic domains. The device meets AEC-Q100 Grade 1 (−40 °C to +125 °C) requirements and is PPAP-capable for automotive production use.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 0.9 V to 3.6 V - enables direct integration with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| tPD (Typ) | 1.6 ns at 3.3 V - supports high-speed signal buffering in timing-critical interfaces like sensor data aggregation paths. |
| IOFF Leakage | ≤5.0 µA at VCC = 0 V - ensures robust partial power-down behavior during system sleep modes. |
| Output Drive | ±24 mA at 3.3 V - drives standard CMOS loads and short PCB traces without external buffers. |
| Input Tolerance | Up to 3.6 V regardless of VCC - permits safe connection to 3.3 V I/O even when powered from 1.2 V or 1.8 V rails. |
| Operating Temp | −55 °C to +125 °C - qualified for under-hood automotive and industrial edge-node environments. |
| ESD Rating | HBM 2000 V, CDM 1000 V - exceeds JEDEC standards for handling and board-level reliability. |
Pinout & Package
Package: SC-88A (SC-70-5 / SOT-353), 5-pin surface-mount, 1.25 mm × 2.1 mm footprint, 0.65 mm pitch, RoHS-compliant, Pb-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - OE | Active-low output enable | Drives Y into high-impedance state when high; enables non-inverting pass-through when low. |
| 2 - A | Buffer input | Accepts 0.9–3.6 V logic signals; tolerant of overvoltage beyond VCC. |
| 3 - GND | Ground reference | Primary return path for supply and signal currents; must be low-inductance connection. |
| 4 - Y | Buffer output | Non-inverted replica of A when OE = L; tri-stated (Z) when OE = H. |
| 5 - VCC | Positive supply | Supplies internal logic and output stage; supports wide-range operation from 0.9 V to 3.6 V. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range (0.9–3.6 V) | Eliminates need for separate voltage translators in multi-rail SoC subsystems. |
| IOFF partial power-down | Prevents damaging current flow between powered and unpowered sections during hot-plug events. |
| Overvoltage-tolerant I/O | Enables interoperability with legacy 3.3 V peripherals while operating from ultra-low 1.2 V supplies. |
| AEC-Q100 qualified (Grade 1) | Validated for automotive applications including body control modules and ADAS sensor hubs. |
| Low dynamic power (CPD = 20 pF) | Reduces switching current consumption in battery-powered telematics nodes. |
Applications
| Automotive Sensor Interface | Low-Power Wearable Data Hub |
|---|---|
|
Use Scenario: Isolating SPI clock/data lines between a 1.2 V MCU and 3.3 V pressure sensor in an engine control unit. IC Role / Device Role / Timing Role: Non-inverting buffer with tri-state control, providing voltage-domain bridging and bus contention prevention. Use Value: Enables direct connection without level shifters while maintaining <1.6 ns timing integrity across temperature. |
Use Scenario: Enabling/disabling I²C pull-up networks on a multi-sensor wearable platform during sleep cycles. IC Role / Device Role / Timing Role: 3-state switch for I²C bus segments, controlled by MCU GPIO to reduce quiescent current. Use Value: Achieves sub-µA system standby via IOFF shutdown, extending battery life by >30% vs. standard buffers. |
| Industrial PLC I/O Expansion | Medical Point-of-Care Display Interface |
|
Use Scenario: Buffering digital status signals from isolated 24 V field inputs down to a 1.8 V FPGA I/O bank. IC Role / Device Role / Timing Role: Voltage-tolerant signal conditioner that absorbs transient coupling and prevents rail collapse. Use Value: Withstands 3.6 V transients on A/Y pins while powered from 1.8 V, eliminating clamping diodes and BOM cost. |
Use Scenario: Driving parallel LCD segment lines from a low-power ARM Cortex-M0+ running at 0.9 V core voltage. IC Role / Device Role / Timing Role: Output driver with 24 mA sink/source capability, ensuring full brightness at minimal VCC. Use Value: Delivers stable segment voltage swing (VOL ≤ 0.2 V at 24 mA) across −40 °C to +85 °C clinical operating range. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar non-inverting 3-state buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G125DBVR | Wider VCC range (1.65–5.5 V); no IOFF; higher tPD (3.5 ns typ at 3.3 V) | Not AEC-Q100 qualified; unsuitable for automotive hot-swap or ultra-low-VCC designs | Select when interfacing with 5 V logic and AEC-Q100 compliance is not required. |
| 74LVC1G125GW,125 | Same SC-88A package; VCC = 1.65–5.5 V; IOFF not specified; lower ESD rating (HBM 2 kV) | Lacks automotive qualification and guaranteed IOFF behavior below 1.65 V | Use only in commercial-grade consumer electronics with stable 3.3 V supply and no partial-power-down needs. |
Compared with SN74LVC1G125DBVR and 74LVC1G125GW,125, the NL17SV125DFT2G-Q uniquely supports 0.9 V operation, guarantees IOFF down to 0 V VCC, and carries AEC-Q100 Grade 1 certification - making it the sole choice for automotive and ultra-low-voltage industrial designs requiring robust power sequencing.
Availability
NL17SV125DFT2G-Q is available at Aetrix Electronics and suitable for automotive infotainment gateways, medical point-of-care devices, and industrial PLC I/O expansion modules requiring stable component supply, long-term lifecycle support, and AEC-Q100 traceability.
Supply support for NL17SV125DFT2G-Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient innovation for automotive, industrial, cloud, and IoT applications.
The NL17SV125DFT2G-Q belongs to onsemi's NanoLogic® ultra-low-voltage logic family, engineered specifically for battery-powered and automotive systems demanding sub-1 V operation, high noise immunity, and seamless voltage-domain interoperability.
FAQ
What is the minimum supply voltage for reliable operation of the NL17SV125DFT2G-Q?
The NL17SV125DFT2G-Q is fully specified down to 0.9 V VCC across its entire operating temperature range (−55 °C to +125 °C). At 0.9 V, it maintains valid VIH/VIL thresholds and functional 3-state control per the datasheet's Recommended Operating Conditions table. This makes NL17SV125DFT2G-Q suitable for direct integration with sub-1 V processor I/O banks and energy-harvesting systems.
Does the NL17SV125DFT2G-Q support hot-swap or partial power-down operation?
Yes - the NL17SV125DFT2G-Q includes guaranteed IOFF functionality. When VCC = 0 V, input and output leakage remains ≤5.0 µA (per DC Electrical Characteristics), preventing back-driving of powered rails. This behavior is validated across temperature and enables safe live insertion in modular automotive ECUs and field-replaceable industrial modules.
Is the NL17SV125DFT2G-Q pin-compatible with standard SC-88A logic buffers?
Yes - the NL17SV125DFT2G-Q uses the standard SC-88A (SOT-353) 5-pin layout with pin 1 = OE, pin 2 = A, pin 3 = GND, pin 4 = Y, pin 5 = VCC. This matches industry-standard pinout conventions for single-gate 3-state buffers, enabling drop-in replacement in existing SC-88A footprints where voltage and qualification requirements align.
What automotive qualification does the NL17SV125DFT2G-Q hold?
The NL17SV125DFT2G-Q carries the "−Q" suffix indicating full AEC-Q100 qualification (Grade 1: −40 °C to +125 °C junction temperature) and PPAP capability. It has passed stress tests including HTOL, TC, UHAST, and ESD per AEC-Q100 Rev-H, and is approved for use in safety-critical automotive subsystems such as body control modules and ADAS sensor interfaces.
How does the NL17SV125DFT2G-Q handle input signals exceeding its VCC rail?
The NL17SV125DFT2G-Q features overvoltage-tolerant inputs and outputs rated to 3.6 V regardless of VCC level - meaning A and Y pins safely accept 3.3 V signals even when VCC = 0.9 V or 1.2 V. This eliminates external clamping diodes in mixed-voltage systems and is confirmed in the Absolute Maximum Ratings and DC Electrical Characteristics tables of the official datasheet.
NL17SV125DFT2G-Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 17SV
- Package/Case:
- 5-TSSOP, SC-70-5, SOT-353
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 24mA, 24mA
- Voltage - Supply:
- 0.9V ~ 3.6V
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-88A (SC-70-5/SOT-353)
NL17SV125DFT2G-Q FAQ
1.How can I place an order for NL17SV125DFT2G-Q through Aetrix?
Please submit a Request for Quotation (RFQ) for NL17SV125DFT2G-Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NL17SV125DFT2G-Q reliable?
The price and inventory of NL17SV125DFT2G-Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NL17SV125DFT2G-Q is usually 5 days.
3.What payment methods are accepted for NL17SV125DFT2G-Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NL17SV125DFT2G-Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NL17SV125DFT2G-Q?
NL17SV125DFT2G-Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NL17SV125DFT2G-Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NL17SV125DFT2G-Q?
For technical support, including NL17SV125DFT2G-Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NL17SV125DFT2G-Q requirements.
6.How does Aetrix verify that NL17SV125DFT2G-Q is sourced from the original manufacturer or authorized distributors?
All NL17SV125DFT2G-Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NL17SV125DFT2G-Q meets industry standards.
7.What is the process for return or replacement of NL17SV125DFT2G-Q?
All NL17SV125DFT2G-Q units undergo pre-shipment inspection (PSI). If there is an issue with NL17SV125DFT2G-Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NL17SV125DFT2G-Q part is unused and in its original packaging.
Return procedure for NL17SV125DFT2G-Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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