onsemi NL17SZ05P5T5G
- Part No.:
- NL17SZ05P5T5G
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- SOT-953
- Datasheet:
-
NL17SZ05P5T5G.pdf
- Description:
- IC INVERTER 1CH 1-INP SOT953
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NL17SZ05P5T5G from onsemi is a single CMOS inverter with open-drain output, designed for level-shifting and wired-OR logic applications in ultra-low-power systems. It operates from 1.65 V to 5.5 V, delivers 2.4 ns typical propagation delay at 5 V, supports 24 mA output sink capability at 3.0 V, and features overvoltage-tolerant inputs/outputs up to 5.5 V - enabling interoperability across mixed-voltage domains such as I²C bus interfaces.
For engineers reviewing the NL17SZ05P5T5G datasheet, pinout, applications, or equivalent options, key selection criteria include open-drain drive strength, input voltage tolerance beyond VCC, partial power-down (IOFF) support, propagation delay vs. supply voltage, and SOT-953 package compatibility with high-density PCB layouts.
Technical Context
The NL17SZ05P5T5G implements a single-stage CMOS inverter topology with an NMOS-only output stage, resulting in true open-drain behavior requiring external pull-up for logic HIGH assertion. Its IOFF circuitry actively disables input/output leakage when VCC = 0 V, preventing back-driving of powered rails during partial power-down sequences.
Input thresholds scale with VCC (VIH = 0.7×VCC min, VIL = 0.3×VCC max), ensuring robust noise margins across the full 1.65–5.5 V operating range. Propagation delays are specified down to −55°C and up to +125°C, with tPLZ/tPZL ≤ 3.5 ns at 4.5–5.5 V and ≤ 12.0 ns at 1.65–1.95 V - confirming rail-to-rail timing predictability in automotive and industrial environments.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65 V to 5.5 V - enables direct interface with 1.8 V, 2.5 V, 3.3 V, and 5 V logic families without level translators. |
| tPD (Typ) | 2.4 ns at VCC = 5 V - supports >200 MHz toggle rates in low-load conditions for high-speed control signaling. |
| IOL (Max) | 24 mA at VCC = 3.0 V - drives standard 3.3 V I²C bus loads (400 pF, 2.2 kΩ pull-up) with <0.4 V VOL under worst-case conditions. |
| Input Tolerance | −0.5 V to +5.5 V - allows safe connection to 5 V signals even when powered from 1.8 V, eliminating need for external clamping diodes. |
| IOFF Leakage | ≤10 µA at VCC = 0 V - prevents current injection into unpowered subsystems during hot-swap or sleep-mode transitions. |
| Operating Temp | −55°C to +125°C - qualified for under-hood automotive, industrial motor control, and outdoor IoT node deployments. |
| Package | SOT-953 (1.0 mm × 0.75 mm, 0.35 mm pitch) - provides 34% smaller footprint than SC-70-5 while maintaining hand-solderability and reflow compatibility. |
Pinout & Package
SOT-953 (Case 527AE) is a 5-pin, leadless, near-square surface-mount package measuring 1.00 mm × 0.75 mm with 0.35 mm pitch and exposed pad option (not used in NL17SZ05P5T5G). Pin 1 orientation is rotated 180° relative to standard SOT-953 marking convention per onsemi's ordering documentation.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | A (Input) | Inverting logic input; accepts DC voltages from −0.5 V to 5.5 V regardless of VCC value. |
| 2 | GND | Ground reference for all internal circuitry and output stage; must be connected before VCC during power sequencing. |
| 3 | NC | No-connect terminal; internally unconnected and electrically isolated - no external connection required or permitted. |
| 4 | Y (Output) | Open-drain NMOS output; sinks current only - requires external pull-up resistor to define HIGH state voltage and rise time. |
| 5 | VCC | Positive supply rail; powers internal logic and defines VIH/VIL thresholds; IOFF protection activates when VCC = 0 V. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC operation | 1.65–5.5 V supply range enables drop-in use across legacy and next-gen low-voltage microcontrollers and sensors. |
| Overvoltage-tolerant I/O | Inputs and outputs withstand −0.5 V to 5.5 V independent of VCC - eliminates external protection components in mixed-voltage I²C, SMBus, or reset circuits. |
| IOFF partial power-down | Sub-µA leakage when VCC = 0 V prevents back-powering of upstream logic during system sleep or hot-swap events. |
| High sink drive | 24 mA output sink at 3.0 V supports fast edge rates into heavy capacitive loads (e.g., long traces, multiple receivers) without signal degradation. |
| Ultra-small footprint | SOT-953 package occupies only 0.75 mm² board area - ideal for space-constrained wearables, medical patches, and modular sensor nodes. |
Applications
| I²C Bus Level Shifting | Power Sequencing Control |
|---|---|
Use Scenario: Interfacing a 1.8 V microcontroller I²C master with a 3.3 V sensor slave where bidirectional voltage translation is required. IC Role / Device Role / Timing Role: NL17SZ05P5T5G serves as unidirectional open-drain driver on SDA/SCL lines, enabling logic-level translation via dual pull-up resistors (to 1.8 V and 3.3 V respectively). Use Value: Eliminates need for dedicated bidirectional level shifters; leverages inherent 5.5 V input tolerance and 24 mA sink to meet I²C fast-mode timing (400 kbps) with <300 ns rise time. | Use Scenario: Generating synchronized enable signals for multiple voltage rails (e.g., 1.2 V core, 3.3 V I/O, 5 V analog) during cold-start or wake-from-sleep sequences. IC Role / Device Role / Timing Role: NL17SZ05P5T5G acts as a timing-controlled inverter driving MOSFET gate drivers or PMIC enable inputs, with precise propagation delay (<3.5 ns) ensuring deterministic turn-on order. Use Value: Guarantees sub-5 ns delay matching across rails, reducing risk of latch-up or brown-out during power-up; IOFF prevents leakage-induced false enables when primary supply is off. |
| Wired-OR Interrupt Aggregation | Low-Power Sensor Wake-Up |
Use Scenario: Combining interrupt outputs from three battery-powered environmental sensors (temperature, humidity, motion) onto a shared MCU interrupt line. IC Role / Device Role / Timing Role: Each NL17SZ05P5T5G inverts and drives its sensor's active-low INT signal onto a common open-drain bus pulled up to MCU VDD. Use Value: Enables true wired-OR logic with no contention risk; 24 mA sink ensures reliable LOW assertion even with 10 kΩ pull-up and 50 pF bus capacitance. | Use Scenario: Waking a deep-sleep MCU from an external event (e.g., door contact closure, button press) using a normally-open mechanical switch referenced to 0 V. IC Role / Device Role / Timing Role: NL17SZ05P5T5G functions as a debounced inverter with Schmitt-trigger-like behavior (via input hysteresis inherent in CMOS threshold scaling), driving MCU GPIO with clean edges. Use Value: Achieves <1 µA quiescent current in standby (ICC ≤ 10 µA), extends coin-cell battery life to >5 years; 1.65 V minimum VCC supports operation directly from depleted batteries. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar inverter-with-open-drain-output applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G05DBVR | Same SOT-23-5 package; higher ICC (10 µA typ vs. 1 µA typ), slightly slower tPD (3.5 ns min at 3.3 V), no IOFF support. | Lacks partial power-down protection - unsuitable for systems requiring hot-swap or multi-rail sleep modes. | Choose when cost is primary constraint and IOFF is not required; verify layout compatibility with SOT-23-5 footprint. |
| 74LVC1G05GW,125 | SC-70-5 (SOT-353) package; identical electrical specs but 30% larger footprint (2.1 mm² vs. 0.75 mm²); same IOFF and voltage tolerance. | Less suitable for ultra-dense PCBs where 1.0 mm × 0.75 mm SOT-953 is mandated by mechanical constraints. | Choose when existing SC-70-5 assembly infrastructure exists and board space permits larger package. |
Compared with SN74LVC1G05DBVR and 74LVC1G05GW,125, the NL17SZ05P5T5G uniquely combines SOT-953 miniaturization, guaranteed IOFF behavior, and 1.65 V operation - making it optimal for space- and power-critical automotive body electronics and portable medical devices where rail independence and zero-leakage shutdown are mandatory.
Availability
NL17SZ05P5T5G is available at Aetrix Electronics and suitable for I²C level shifting, power sequencing control, wired-OR interrupt aggregation, low-power sensor wake-up, and automotive body controller applications requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for NL17SZ05P5T5G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient innovation for automotive, industrial, cloud, medical, and IoT applications.
The NL17SZ05P5T5G belongs to onsemi's NanoLogic™ family of ultra-small, low-power logic devices - engineered specifically for space-constrained, battery-operated, and thermally demanding systems where traditional logic packages impose layout or thermal penalties.
FAQ
What is the maximum output sink current specification for NL17SZ05P5T5G at 1.8 V VCC?
The NL17SZ05P5T5G is characterized for IOL = 12 mA at VCC = 1.8 V (per AC Electrical Characteristics table, VCC = 1.65–1.95 V range). This ensures reliable LOW-level assertion into standard 1.8 V logic loads with VOL ≤ 0.38 V, supporting robust noise margins in low-voltage systems. The device maintains this performance across −55°C to +125°C.
Does NL17SZ05P5T5G support true bidirectional level shifting like dedicated I²C translators?
No - NL17SZ05P5T5G is a unidirectional inverter with open-drain output and does not provide automatic direction sensing or bidirectional data flow. For I²C, it must be used in pairs (one per direction) or with external pull-ups to different voltage domains. True bidirectional translation requires devices such as PCA9306 or TXS0102, which integrate direction control and voltage tracking.
Can NL17SZ05P5T5G be used with a 5 V pull-up resistor while powered from 1.8 V?
Yes - the NL17SZ05P5T5G inputs and outputs are rated for −0.5 V to +5.5 V regardless of VCC, so connecting a 5 V pull-up to the Y output while VCC = 1.8 V is fully supported. The output NMOS will safely sink current from the 5 V rail, and input A accepts 5 V signals without damage or excessive leakage, enabling seamless mixed-voltage interfacing.
Is the NC pin on NL17SZ05P5T5G internally connected or should it be left floating?
The NC pin (Pin 3) on NL17SZ05P5T5G is confirmed as no-connect - it is internally unconnected and electrically isolated. Per onsemi's pin assignment table for SOT-953, this pin must remain unconnected on the PCB. No routing, grounding, or pulling is required or recommended, as any external connection could compromise package integrity or thermal performance.
What is the thermal resistance (θJA) of NL17SZ05P5T5G in its SOT-953 package?
The thermal resistance θJA for NL17SZ05P5T5G in SOT-953 (Case 527AE) is 254°C/W, measured on a standard FR4 board with 10 mm × 1 inch, 2-ounce copper trace and no airflow (per JESD51-7). This value enables calculation of junction temperature rise under load: TJ = TA + (θJA × PD), where PD is dynamic power dissipation derived from CPD, VCC, and switching frequency.
NL17SZ05P5T5G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 17SZ
- Package/Case:
- SOT-953
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Inverter
- Number of Circuits:
- 1
- Number of Inputs:
- 1
- Features:
- Open Drain
- Voltage - Supply:
- 1.65V ~ 5.5V
- Current - Quiescent (Max):
- -
- Current - Output High, Low:
- 24mA, 24mA
- Input Logic Level - Low:
- -
- Input Logic Level - High:
- -
- Max Propagation Delay @ V, Max CL:
- -
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-953
NL17SZ05P5T5G FAQ
1.How can I place an order for NL17SZ05P5T5G through Aetrix?
Please submit a Request for Quotation (RFQ) for NL17SZ05P5T5G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NL17SZ05P5T5G reliable?
The price and inventory of NL17SZ05P5T5G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NL17SZ05P5T5G is usually 5 days.
3.What payment methods are accepted for NL17SZ05P5T5G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NL17SZ05P5T5G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NL17SZ05P5T5G?
NL17SZ05P5T5G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NL17SZ05P5T5G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NL17SZ05P5T5G?
For technical support, including NL17SZ05P5T5G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NL17SZ05P5T5G requirements.
6.How does Aetrix verify that NL17SZ05P5T5G is sourced from the original manufacturer or authorized distributors?
All NL17SZ05P5T5G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NL17SZ05P5T5G meets industry standards.
7.What is the process for return or replacement of NL17SZ05P5T5G?
All NL17SZ05P5T5G units undergo pre-shipment inspection (PSI). If there is an issue with NL17SZ05P5T5G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NL17SZ05P5T5G part is unused and in its original packaging.
Return procedure for NL17SZ05P5T5G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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