onsemi NL17SZ06DBVT1G
- Part No.:
- NL17SZ06DBVT1G
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- SC-74A, SOT-753
- Datasheet:
-
NL17SZ06DBVT1G.pdf
- Description:
- IC INVERTER 1CH 1-INP SC74A
- Quantity:
- Payment:

- Shipping:

Inventory:1,774
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NL17SZ06DBVT1G from onsemi is a single CMOS inverter with open-drain output, designed for level-shifting and wired-OR logic interfacing in low-voltage digital systems. It operates from 1.65 V to 5.5 V, delivers 2.1 ns propagation delay at 5 V, supports 24 mA sink current at 3.0 V, and features input/output overvoltage tolerance up to 5.5 V - enabling robust interface between mixed-supply domains such as 1.8 V logic driving 3.3 V or 5 V bus lines.
For engineers reviewing the NL17SZ06DBVT1G datasheet, pinout, applications, or equivalent options, key selection considerations include open-drain drive capability, partial power-down (IOFF) support, wide VCC range compatibility, and SC-74A package footprint for space-constrained PCB layouts.
Technical Context
The NL17SZ06DBVT1G implements a single inverting buffer stage with an open-drain NMOS output stage, requiring an external pull-up resistor to define high-level logic voltage. Its IOFF feature disables input/output leakage during partial power-down, preventing back-driving of powered rails when VCC = 0 V.
It supports rail-to-rail input operation up to 5.5 V independent of VCC, and maintains guaranteed switching thresholds across 1.65–5.5 V supply range - VIH = 0.70×VCC (min) and VIL = 0.30×VCC (max) for VCC ≥ 2.3 V - ensuring reliable noise margins in mixed-voltage signal translation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65 V to 5.5 V - enables interoperability across 1.8 V, 2.5 V, 3.3 V, and 5 V logic families |
| tPD (Typ) | 2.1 ns at VCC = 5 V - supports >200 MHz toggle rates in non-critical timing paths |
| IOL (Max) | 24 mA at VCC = 3.0 V - drives standard TTL loads or multiple CMOS inputs via pull-up |
| Input Overvoltage | Up to 5.5 V regardless of VCC - allows safe interfacing to higher-voltage buses without clamping diodes |
| IOFF Leakage | ≤10 µA at VCC = 0 V - prevents current injection into unpowered sections during system sleep modes |
| Package | SC-74A (SOT-23-5) - 3.0 mm × 1.5 mm footprint compatible with automated SMT assembly |
Pinout & Package
SC-74A (Case 318BQ) is a 5-pin surface-mount package with gull-wing leads, 0.95 mm height, and 0.65 mm pitch. Pin 1 is marked by a notch or beveled corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (NC) | No-connect terminal | Internally unconnected - must remain floating; no PCB trace or component attachment |
| 2 (A) | Inverter input | CMOS-compatible digital input accepting 0–5.5 V; no internal pull-up/down |
| 3 (GND) | Ground reference | Return path for output sink current and internal bias; must be low-impedance |
| 4 (Y) | Open-drain output | NMOS drain terminal - requires external pull-up to define VOH; sinks up to 24 mA |
| 5 (VCC) | Positive supply | Power rail for internal logic; decoupling capacitor (0.1 µF) recommended within 5 mm |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC operation | 1.65–5.5 V supply range enables drop-in use across legacy and modern low-voltage systems |
| IOFF partial power-down | Blocks I/O leakage when VCC = 0 V - essential for hot-swap and multi-rail power sequencing |
| Overvoltage-tolerant inputs/outputs | Withstands 5.5 V signals regardless of VCC - eliminates need for external level-shifters in mixed-supply interfaces |
| Low propagation delay | 2.1 ns typical tPD at 5 V supports fast edge-sensitive applications like clock enable gating |
| Pb-free, RoHS-compliant | Meets J-STD-609 Category 1 moisture sensitivity (MSL 1) and UL 94 V-0 flammability rating |
Applications
| Level-Shifting Interface | Wired-OR Bus Driver |
|---|---|
Use Scenario: Translating 1.8 V GPIO output to control a 3.3 V I²C bus pull-up rail. IC Role / Device Role / Timing Role: Open-drain inverter provides bidirectional voltage translation without direction control logic. Use Value: Eliminates discrete MOSFET level shifters; leverages built-in overvoltage tolerance to safely interface sub-2 V logic to 3.3 V domain. |
Use Scenario: Driving shared interrupt line (INT#) from multiple microcontrollers with active-low assertion. IC Role / Device Role / Timing Role: Inverts local interrupt signal and outputs open-drain to enable wired-OR summation on common bus. Use Value: Ensures clean bus arbitration with no contention; IOFF prevents leakage when one controller powers down while others remain active. |
| Power Sequencing Monitor | Reset Signal Inversion |
Use Scenario: Monitoring 5 V power rail status using a 3.3 V microcontroller ADC input. IC Role / Device Role / Timing Role: Configured as active-low detector: VCC = 3.3 V, input tied to 5 V rail via resistive divider, output pulled to 3.3 V. Use Value: Provides rail-agnostic monitoring - input tolerates 5 V directly, eliminating divider and protection diode. |
Use Scenario: Inverting active-high reset signal from PMIC to match active-low reset requirement of FPGA. IC Role / Device Role / Timing Role: Single-stage inversion with open-drain output pulled to FPGA VCCO (2.5 V or 3.3 V). Use Value: Delivers sub-5 ns delay and guaranteed logic thresholds across full VCC range - ensures deterministic reset timing margin. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar inverter-with-open-drain-output applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G06DBVR | Same SC-70-5 (SC-74A) package; 1.65–5.5 V VCC; 3.5 ns tPD (typ) at 3.3 V; no IOFF | Lacks partial power-down protection - unsuitable for systems with asymmetric power sequencing | Select when IOFF is not required and slightly relaxed timing is acceptable |
| 74LX1G06GW,125 | SC-88A (SOT-353) package; 1.65–5.5 V VCC; 3.0 ns tPD (typ) at 5 V; includes IOFF | Smaller 2.1 mm × 1.25 mm footprint but different pinout - requires PCB layout change | Select when board area is critical and re-layout is feasible |
Compared with SN74LVC1G06DBVR and 74LX1G06GW,125, the NL17SZ06DBVT1G uniquely combines SC-74A packaging, sub-2.5 ns speed at 5 V, and IOFF - making it optimal for compact, multi-rail embedded systems requiring guaranteed power-down isolation.
Availability
NL17SZ06DBVT1G is available at Aetrix Electronics and suitable for industrial control I/O modules, automotive body electronics, portable medical sensor interfaces, and IoT edge node designs requiring stable component supply across extended temperature ranges (−55 °C to +125 °C).
Supply support for NL17SZ06DBVT1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient electronics, delivering silicon solutions for automotive, industrial, cloud, and IoT applications.
The NL17SZ06DBVT1G belongs to onsemi's NanoLogic™ family of ultra-small logic devices, engineered for minimal board space and low dynamic power in battery-powered and thermally constrained systems.
FAQ
What is the maximum sink current capability of the NL17SZ06DBVT1G at 3.3 V supply?
The NL17SZ06DBVT1G guarantees a maximum output low voltage (VOL) of 0.4 V when sinking 24 mA at VCC = 3.0 V, and 0.55 V at 24 mA when VCC = 4.5 V. At 3.3 V, interpolation from datasheet curves confirms sustained 24 mA sink capability with VOL ≤ 0.45 V - sufficient to drive standard TTL loads or up to 10x 74LVC inputs with appropriate pull-up sizing. This performance is validated across −55 °C to +125 °C.
Does the NL17SZ06DBVT1G support true bidirectional level shifting?
No - the NL17SZ06DBVT1G is a unidirectional inverter with open-drain output and does not provide automatic bidirectional translation. It can translate low-to-high voltage levels (e.g., 1.8 V input → 3.3 V output via pull-up), but cannot pass signals from high-voltage side to low-voltage side without additional circuitry. Its overvoltage-tolerant input allows safe connection to higher-voltage nodes, but logic flow remains strictly input A → output Y.
Can the NC pin (Pin 1) on the NL17SZ06DBVT1G be used as a thermal pad or grounded for improved thermal performance?
No - Pin 1 of the NL17SZ06DBVT1G is explicitly designated as "NC" (no connect) in the datasheet pin assignment table and functional diagram. It is internally unconnected and must remain electrically floating. Connecting it to GND, VCC, or a thermal pad violates the device's qualified SC-74A mechanical construction and may cause parametric shifts or reliability issues. Thermal dissipation relies solely on the standard leadframe path through Pins 3 (GND) and 5 (VCC).
Is the NL17SZ06DBVT1G qualified for automotive applications?
The NL17SZ06DBVT1G itself is not automotive-qualified; however, the NL17SZ06DFT2G−Q variant (SC-88A package) carries the −Q suffix and is AEC-Q100 qualified and PPAP capable. The NL17SZ06DBVT1G uses the same die but is packaged in SC-74A and rated for industrial temperature range (−55 °C to +125 °C). For automotive use, engineers must select the −Q qualified version and verify compliance with their Tier 1's specific PPAP documentation requirements.
How does the IOFF feature of the NL17SZ06DBVT1G behave during power-down sequences?
When VCC = 0 V, the NL17SZ06DBVT1G activates its IOFF circuitry to limit both input and output leakage current to ≤10 µA (max), effectively isolating the device from powered circuitry connected to pins A and Y. This prevents back-powering of unpowered sections and avoids false triggering in multi-rail systems - for example, when a 3.3 V domain remains active while the 1.8 V domain shuts down. The feature is intrinsic to the silicon design and requires no external control signals.
NL17SZ06DBVT1G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 17SZ
- Package/Case:
- SC-74A, SOT-753
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Inverter
- Number of Circuits:
- 1
- Number of Inputs:
- 1
- Features:
- Open Drain
- Voltage - Supply:
- 1.65V ~ 5.5V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- -, 32mA
- Input Logic Level - Low:
- -
- Input Logic Level - High:
- -
- Max Propagation Delay @ V, Max CL:
- -
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-74A
NL17SZ06DBVT1G FAQ
1.How can I place an order for NL17SZ06DBVT1G through Aetrix?
Please submit a Request for Quotation (RFQ) for NL17SZ06DBVT1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NL17SZ06DBVT1G reliable?
The price and inventory of NL17SZ06DBVT1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NL17SZ06DBVT1G is usually 5 days.
3.What payment methods are accepted for NL17SZ06DBVT1G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NL17SZ06DBVT1G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NL17SZ06DBVT1G?
NL17SZ06DBVT1G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NL17SZ06DBVT1G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NL17SZ06DBVT1G?
For technical support, including NL17SZ06DBVT1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NL17SZ06DBVT1G requirements.
6.How does Aetrix verify that NL17SZ06DBVT1G is sourced from the original manufacturer or authorized distributors?
All NL17SZ06DBVT1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NL17SZ06DBVT1G meets industry standards.
7.What is the process for return or replacement of NL17SZ06DBVT1G?
All NL17SZ06DBVT1G units undergo pre-shipment inspection (PSI). If there is an issue with NL17SZ06DBVT1G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NL17SZ06DBVT1G part is unused and in its original packaging.
Return procedure for NL17SZ06DBVT1G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NL17SZ06DBVT1G Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
