onsemi NL17SZ06DFT2
- Part No.:
- NL17SZ06DFT2
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 5-TSSOP, SC-70-5, SOT-353
- Datasheet:
-
NL17SZ06DFT2.pdf
- Description:
- IC INVERTER 1CH 1-INP SC88A
- Quantity:
- Payment:

- Shipping:

Inventory:3,642
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NL17SZ06DFT2 from onsemi is a single CMOS inverter with open-drain output, designed for level-shifting and wired-OR logic applications in space-constrained systems. It operates from 1.65 V to 5.5 V, delivers 2.1 ns propagation delay at 5 V (typ), supports 24 mA sink current at 3.0 V, and features input/output overvoltage tolerance up to 5.5 V - enabling interoperability across mixed-voltage domains in automotive body control modules.
For engineers reviewing the NL17SZ06DFT2 datasheet, pinout, applications, or equivalent options, key selection criteria include open-drain drive capability, partial power-down protection (IOFF), AEC-Q100 qualification, and SC-88A package compatibility with high-density PCB layouts.
Technical Context
The NL17SZ06DFT2 implements a single-stage inverting buffer with open-drain NMOS output, requiring an external pull-up resistor to define high-level output voltage. Its IOFF circuitry disables input and output leakage paths when VCC = 0 V, preventing back-powering of powered-down subsystems.
It supports rail-to-rail input operation up to 5.5 V independent of VCC, and maintains guaranteed switching thresholds (VIH = 0.7×VCC, VIL = 0.3×VCC) across 1.65–5.5 V supply range - ensuring reliable logic translation between 1.8 V, 3.3 V, and 5 V interfaces.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65 V to 5.5 V - enables direct interface with 1.8 V, 2.5 V, 3.3 V, and 5 V logic families without level shifters. |
| tPD (typ) | 2.1 ns at VCC = 5 V - supports >200 MHz toggle rates in timing-critical signal inversion paths. |
| IOL (max) | 24 mA at VCC = 3.0 V - drives standard TTL loads or multiple CMOS inputs with margin. |
| Input Overvoltage | Up to 5.5 V regardless of VCC - allows safe connection to higher-voltage buses (e.g., 5 V I²C) while powered from 1.8 V. |
| IOFF Leakage | ≤10 µA at VCC = 0 V - prevents current flow into unpowered rails during partial system shutdown. |
| Operating Temp | −55 °C to +125 °C - qualified for under-hood automotive environments per AEC-Q100 Grade 1. |
Pinout & Package
NL17SZ06DFT2 is packaged in SC-88A (Case 419A), a 5-pin, 1.25 mm × 2.0 mm surface-mount package with 0.65 mm pitch. Pin 1 is marked by a dot or beveled edge; orientation follows Q4 standard (pin 1 at top-left corner when notch faces up).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | NC | No-connect - internally unconnected; must remain floating or grounded per layout guidelines. |
| 2 | A | Inverting input - accepts CMOS/TTL-compatible signals; tolerant to 5.5 V regardless of VCC. |
| 3 | GND | Ground reference - return path for output sink current and internal bias networks. |
| 4 | Y | Open-drain output - requires external pull-up; sinks up to 24 mA at 3.0 V; floats high when inactive. |
| 5 | VCC | Positive supply - powers internal logic; sets VIH/VIL thresholds and output drive strength. |
Key Features
| Feature | Design Value |
|---|---|
| Open-drain output | Enables wired-OR bus configurations and I²C/SMBus compatibility without external logic gates. |
| IOFF partial power-down | Blocks current flow between powered and unpowered sections - critical for hot-swap and low-power sleep modes. |
| Overvoltage-tolerant inputs/outputs | Accepts 5.5 V signals while operating from 1.65 V - eliminates need for discrete level translators in mixed-voltage systems. |
| AEC-Q100 qualified | Qualified to Grade 1 (−40 °C to +125 °C ambient) with PPAP documentation support - suitable for automotive body electronics. |
| Pb-free, RoHS-compliant | Meets J-STD-609 Category 1 moisture sensitivity (MSL 1) and UL 94 V-0 flammability rating - supports lead-free reflow assembly. |
Applications
| Automotive Body Control Unit | I²C Bus Level Translation |
|---|---|
Use Scenario: Driving LED status indicators and relay drivers from a 3.3 V microcontroller in a door module, where load-side supply is 5 V. IC Role / Device Role / Timing Role: Inverting open-drain driver that translates logic levels and provides current sinking capability for indicator LEDs. Use Value: Eliminates discrete transistor drivers; IOFF prevents back-feeding into MCU during battery disconnect events. |
Use Scenario: Interfacing a 1.8 V sensor IC with a 3.3 V host controller over I²C, requiring bidirectional level shifting on SDA line. IC Role / Device Role / Timing Role: Single-direction inverter used as part of a dual-NL17SZ06DFT2 level shifter configuration for SDA signal conditioning. Use Value: Supports 100 kHz–400 kHz I²C speeds with sub-3 ns propagation delay; overvoltage tolerance protects 1.8 V core from 3.3 V bus transients. |
| Industrial Sensor Interface | Power Sequencing Monitor |
Use Scenario: Converting active-low fault signals from analog sensor front-ends (5 V domain) into clean 3.3 V interrupt inputs for an industrial PLC CPU. IC Role / Device Role / Timing Role: Signal inverter with noise-immune open-drain output tied to 3.3 V pull-up, providing robust fault signaling. Use Value: Input overvoltage tolerance avoids damage from sensor ESD events; 24 mA sink capacity ensures fast pull-down of long PCB traces. |
Use Scenario: Monitoring power-good signals from multiple DC-DC converters in a telecom power shelf, where all PG outputs are wired-OR'd to a single supervisor input. IC Role / Device Role / Timing Role: Open-drain inverter used to invert and combine PG signals into an active-high "all-rails-good" status flag. Use Value: Enables hardware-based AND logic via wired-OR topology; IOFF prevents contention during converter startup/shutdown sequencing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar inverter-with-open-drain-output applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G06DBVR | Same SC-70-5 (SC-74A) footprint; 32 mA sink at 3.3 V; no IOFF; rated −40 °C to +125 °C but not AEC-Q100 qualified. | Lacks partial power-down protection; unsuitable for automotive hot-swap scenarios requiring IOFF. | Select when cost and non-automotive industrial use outweigh need for AEC-Q100 and IOFF. |
| 74AUP1G06GW,125 | SC-88A package; 4 mA sink at 3.3 V; 1.1 V to 3.6 V VCC range; lower power (CPD = 4 pF); no overvoltage tolerance. | Cannot interface with 5 V buses; insufficient drive for LED or relay loads; limited supply range excludes 5 V systems. | Select only for ultra-low-power 1.8 V/2.5 V portable applications where drive strength and voltage range are secondary. |
Compared with SN74LVC1G06DBVR and 74AUP1G06GW,125, the NL17SZ06DFT2 uniquely combines AEC-Q100 qualification, IOFF, 5.5 V overvoltage tolerance, and 24 mA sink capability in SC-88A - making it the only choice for automotive-grade open-drain inversion in mixed-voltage domains.
Availability
NL17SZ06DFT2 is available at Aetrix Electronics and suitable for automotive body electronics, industrial sensor interfaces, I²C level translation, and power sequencing monitors requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for NL17SZ06DFT2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (Nasdaq: ON) is a global semiconductor leader delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NL17SZ06DFT2 belongs to onsemi's TinyLogic® UHS family - ultra-high-speed, low-voltage CMOS logic devices optimized for space-constrained, low-power, and automotive-qualified applications requiring robust signal integrity and mixed-voltage interoperability.
FAQ
What is the function of the NC pin on NL17SZ06DFT2?
The NC (No Connect) pin on NL17SZ06DFT2 is internally unconnected and serves no electrical function. It must be left floating or tied to GND per board layout best practices to avoid parasitic coupling; it is not intended for thermal relief or mechanical anchoring. This pin assignment is fixed for the SC-88A package variant of NL17SZ06DFT2 and confirmed in Figure 2 and PIN ASSIGNMENT tables on page 2 of the official datasheet.
Does NL17SZ06DFT2 support I²C bus operation?
Yes, NL17SZ06DFT2 supports I²C bus operation as a level-shifting inverter when configured with appropriate pull-up resistors. Its open-drain output, 5.5 V input overvoltage tolerance, and 2.1 ns typical propagation delay meet timing requirements for Standard-Mode (100 kHz) and Fast-Mode (400 kHz) I²C. The NL17SZ06DFT2 must be paired with a second identical device for full bidirectional translation, as specified in onsemi application notes for TinyLogic-based I²C level shifters.
Is NL17SZ06DFT2 pin-compatible with other SC-88A logic inverters?
No, NL17SZ06DFT2 is not pin-compatible with generic SC-88A inverters such as SN74LVC1G06 or 74AUP1G06 due to differing pin assignments: NL17SZ06DFT2 uses Pin 1 = NC, Pin 2 = A, Pin 3 = GND, Pin 4 = Y, Pin 5 = VCC, whereas most competing SC-88A inverters place VCC on Pin 5 but assign Pin 1 = A or Pin 1 = VCC. Always verify pinout against the specific device's datasheet before PCB layout.
What is the maximum sink current specification for NL17SZ06DFT2 at 5 V VCC?
The maximum sink current for NL17SZ06DFT2 at VCC = 5 V is 16 mA (guaranteed per DC Electrical Characteristics table, IOL = 16 mA condition, VOL ≤ 0.55 V). While the device can source/sink up to ±50 mA absolute maximum (per Maximum Ratings), sustained operation above 16 mA at 5 V risks exceeding VOL specifications and thermal limits - design margins should adhere to the 16 mA rated value for reliable logic-level compliance.
How does the IOFF feature of NL17SZ06DFT2 improve system reliability?
The IOFF feature of NL17SZ06DFT2 blocks current flow through input and output terminals when VCC = 0 V, limiting leakage to ≤10 µA. This prevents back-powering of unpowered subsystems - for example, in automotive modules where the NL17SZ06DFT2 interfaces between a live 5 V sensor bus and a sleeping 3.3 V MCU domain. This behavior is verified in the DC Electrical Characteristics table under IOFF parameter and is critical for meeting ISO 16750-2 power-off leakage requirements.
NL17SZ06DFT2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 17SZ
- Package/Case:
- 5-TSSOP, SC-70-5, SOT-353
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Inverter
- Number of Circuits:
- 1
- Number of Inputs:
- 1
- Features:
- Open Drain
- Voltage - Supply:
- 1.65V ~ 5.5V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- -, 32mA
- Input Logic Level - Low:
- -
- Input Logic Level - High:
- -
- Max Propagation Delay @ V, Max CL:
- 3ns @ 5V, 50pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-88A (SC-70-5/SOT-353)
NL17SZ06DFT2 FAQ
1.How can I place an order for NL17SZ06DFT2 through Aetrix?
Please submit a Request for Quotation (RFQ) for NL17SZ06DFT2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NL17SZ06DFT2 reliable?
The price and inventory of NL17SZ06DFT2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NL17SZ06DFT2 is usually 5 days.
3.What payment methods are accepted for NL17SZ06DFT2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NL17SZ06DFT2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NL17SZ06DFT2?
NL17SZ06DFT2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NL17SZ06DFT2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NL17SZ06DFT2?
For technical support, including NL17SZ06DFT2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NL17SZ06DFT2 requirements.
6.How does Aetrix verify that NL17SZ06DFT2 is sourced from the original manufacturer or authorized distributors?
All NL17SZ06DFT2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NL17SZ06DFT2 meets industry standards.
7.What is the process for return or replacement of NL17SZ06DFT2?
All NL17SZ06DFT2 units undergo pre-shipment inspection (PSI). If there is an issue with NL17SZ06DFT2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NL17SZ06DFT2 part is unused and in its original packaging.
Return procedure for NL17SZ06DFT2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NL17SZ06DFT2 Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

