onsemi NL17SZ06XV5T2G
- Part No.:
- NL17SZ06XV5T2G
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- SOT-553
- Datasheet:
-
NL17SZ06XV5T2G.pdf
- Description:
- IC INVERTER 1CH 1-INP SOT553
- Quantity:
- Payment:

- Shipping:

Inventory:1,997
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Product details
Overview
NL17SZ06XV5T2G from onsemi is a single CMOS inverter with open-drain output, designed for level-shifting and wired-OR logic interfacing in space-constrained systems. It operates from 1.65 V to 5.5 V, delivers 2.1 ns propagation delay at 5 V, supports 24 mA sink current at 3.0 V, and features input/output overvoltage tolerance up to 5.5 V - enabling robust I²C bus pull-up and mixed-voltage signal translation.
For engineers reviewing the NL17SZ06XV5T2G datasheet, pinout, applications, or equivalent options, key selection criteria include open-drain drive capability, partial power-down (IOFF) support, wide supply range compatibility, and SOT-553 footprint suitability for high-density PCB layouts.
Technical Context
The NL17SZ06XV5T2G implements a single-stage inverting buffer with open-drain NMOS output, requiring an external pull-up resistor to define the high logic state. Its IOFF circuitry disables input/output leakage when VCC = 0 V, preventing back-powering of powered-down system domains.
It supports voltage-level translation across 1.65–5.5 V rails without level-shifters: inputs tolerate up to 5.5 V regardless of VCC, and outputs can sink up to 24 mA while maintaining VOL ≤ 0.42 V at 3.0 V - making it suitable for driving LEDs, MOSFET gates, and I²C/SMBus lines.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65 V to 5.5 V - enables direct interface with 1.8 V, 2.5 V, 3.3 V, and 5 V logic families |
| tPD (Typ) | 2.1 ns at VCC = 5 V - supports >200 MHz toggle rates in low-load conditions |
| IOL (Max) | 24 mA at VCC = 3.0 V - sufficient to drive standard LEDs or gate multiple 74LVC inputs |
| VIN/VOUT Tolerance | Up to 5.5 V independent of VCC - allows safe interfacing with higher-voltage peripherals |
| IOFF Support | Active at VCC = 0 V - prevents current flow between unpowered and powered subsystems |
| Package | SOT-553 (1.6 mm × 1.2 mm × 0.55 mm) - ultra-compact footprint for portable and wearables |
| ESD Rating | HBM: 2000 V - meets industrial-grade ESD robustness requirements |
Pinout & Package
SOT-553 package: 5-pin, 0.5 mm pitch, 1.6 mm × 1.2 mm body, 0.55 mm height, lead-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | A (Input) | Inverting logic input; accepts 0–5.5 V signals regardless of VCC |
| 2 | GND | Ground reference for logic and power; required for IOFF functionality |
| 3 | NC | No internal connection - must be left floating or tied to GND (no impact on operation) |
| 4 | Y (Output) | Open-drain NMOS output; requires external pull-up to define HIGH state |
| 5 | VCC | Positive supply rail; powers internal logic and enables IOFF control |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range (1.65–5.5 V) | Eliminates need for separate level translators when interfacing 1.8 V microcontrollers with 5 V sensors |
| Input/Output overvoltage tolerance (5.5 V) | Permits direct connection to legacy 5 V buses without clamping diodes or resistors |
| IOFF partial power-down protection | Blocks >99% of leakage current when VCC = 0 V - critical for hot-swap and battery-backed modules |
| 24 mA sink capability at 3.0 V | Drives standard indicator LEDs or switches logic-level MOSFETs without external drivers |
| SOT-553 ultra-small footprint | Reduces board area by ~40% vs. SC-70-5; ideal for space-limited IoT sensor nodes and wearables |
Applications
| I²C Bus Level Translation | Mixed-Voltage GPIO Expansion |
|---|---|
|
Use Scenario: Interfacing a 1.8 V MCU I²C controller with 3.3 V or 5 V peripheral devices. IC Role / Device Role / Timing Role: Open-drain inverter acting as bidirectional level translator on SDA/SCL lines with external pull-ups. Use Value: Eliminates dedicated level-shifter ICs; leverages inherent 5.5 V input tolerance and IOFF to prevent bus contention during MCU reset. |
Use Scenario: Expanding GPIO count on a 2.5 V SoC using 5 V-compatible peripherals. IC Role / Device Role / Timing Role: Inverting buffer providing voltage-tolerant, current-sinking output for peripheral enable/control signals. Use Value: Enables direct control of 5 V relays or optocouplers without additional level-shifting circuitry or risk of overvoltage damage. |
| LED Driver Interface | Power Sequencing Control |
|
Use Scenario: Driving status LEDs from low-voltage microcontroller outputs. IC Role / Device Role / Timing Role: Inverting open-drain driver sinking LED current through external anode pull-up. Use Value: Delivers 24 mA sink at 3.0 V - sufficient for bright visible LEDs while maintaining <0.42 V saturation voltage for minimal power loss. |
Use Scenario: Controlling power-enable sequencing between isolated voltage domains. IC Role / Device Role / Timing Role: Logic inverter with IOFF ensuring no current flows into unpowered domain during startup/shutdown. Use Value: Prevents back-powering of inactive rails - essential for reliable multi-rail power management in industrial controllers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar inverter-with-open-drain applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G06DBVR | Same SOT-553 package; 32 mA sink at 3.3 V; no IOFF; 1.65–5.5 V VCC | Lacks partial power-down protection - unsuitable for hot-swap or multi-rail isolation | Preferred where higher drive strength is needed and IOFF is not required |
| MC74VHC1G06DTT1G | SOT-23-5 package (larger); 8 mA sink at 3.3 V; includes IOFF; 2–5.5 V VCC only | Narrower supply range excludes 1.65–1.95 V operation; larger footprint increases layout area | Valid alternative if SOT-23-5 is already used in design and 1.65 V operation is unnecessary |
Compared with SN74LVC1G06DBVR and MC74VHC1G06DTT1G, the NL17SZ06XV5T2G uniquely combines ultra-compact SOT-553 packaging, 1.65 V minimum VCC, 24 mA sink, and IOFF - making it optimal for miniaturized, multi-rail, and battery-sensitive designs where all four attributes are required.
Availability
NL17SZ06XV5T2G is available at Aetrix Electronics and suitable for I²C bus interfaces, LED driver circuits, mixed-voltage GPIO expansion, and power sequencing control requiring stable component supply across automotive, industrial, and consumer electronics programs.
Supply support for NL17SZ06XV5T2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (Nasdaq: ON) is a global semiconductor leader delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NL17SZ06XV5T2G belongs to onsemi's TinyLogic® family of ultra-low-power, small-footprint logic devices - engineered specifically for space- and power-constrained embedded systems needing robust voltage translation and interface integrity.
FAQ
What is the maximum sink current specification for NL17SZ06XV5T2G at 3.3 V?
The NL17SZ06XV5T2G supports up to 24 mA sink current at VCC = 3.0 V (per datasheet Section 4, DC Electrical Characteristics). At 3.3 V, the device maintains comparable performance: VOL remains ≤ 0.42 V under 24 mA load, confirming reliable operation within this range. This value is validated across −55 °C to +125 °C ambient temperature.
Does NL17SZ06XV5T2G support partial power-down (IOFF) functionality?
Yes, NL17SZ06XV5T2G includes IOFF circuitry that actively disables input and output leakage paths when VCC = 0 V. Per datasheet Section 3 (Maximum Ratings), IOFF limits power-off leakage to ≤10 µA - preventing back-current flow between powered and unpowered system domains, a critical feature for hot-plug and multi-rail architectures.
Can NL17SZ06XV5T2G be used for 5 V to 3.3 V level translation?
Yes, NL17SZ06XV5T2G is explicitly rated for input and output overvoltage tolerance up to 5.5 V independent of VCC. When operated at VCC = 3.3 V, it safely accepts 5 V input signals and drives open-drain outputs compatible with 5 V pull-ups - making it suitable for bidirectional 5 V ↔ 3.3 V level translation on I²C or other open-drain buses.
What is the propagation delay of NL17SZ06XV5T2G at 1.8 V supply?
At VCC = 1.8 V (within 1.65–1.95 V range), the NL17SZ06XV5T2G exhibits tPZL ≤ 9.5 ns and tPLZ ≤ 9.5 ns (per datasheet Section 5, AC Electrical Characteristics). These values represent worst-case delays across −55 °C to +125 °C, ensuring timing predictability in low-voltage battery-powered applications.
Is NL17SZ06XV5T2G qualified for automotive applications?
The NL17SZ06XV5T2G itself is not automotive-qualified; however, the pin-compatible NL17SZ06XV5T2G−Q variant (with −Q suffix) is AEC-Q100 qualified and PPAP capable. The standard NL17SZ06XV5T2G is rated for −55 °C to +125 °C operation and meets industrial reliability standards, but automotive deployment requires explicit use of the −Q version.
NL17SZ06XV5T2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 17SZ
- Package/Case:
- SOT-553
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Inverter
- Number of Circuits:
- 1
- Number of Inputs:
- 1
- Features:
- Open Drain
- Voltage - Supply:
- 1.65V ~ 5.5V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- -, 32mA
- Input Logic Level - Low:
- -
- Input Logic Level - High:
- -
- Max Propagation Delay @ V, Max CL:
- 3ns @ 5V, 50pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-553
NL17SZ06XV5T2G FAQ
1.How can I place an order for NL17SZ06XV5T2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NL17SZ06XV5T2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NL17SZ06XV5T2G reliable?
The price and inventory of NL17SZ06XV5T2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NL17SZ06XV5T2G is usually 5 days.
3.What payment methods are accepted for NL17SZ06XV5T2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NL17SZ06XV5T2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NL17SZ06XV5T2G?
NL17SZ06XV5T2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NL17SZ06XV5T2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NL17SZ06XV5T2G?
For technical support, including NL17SZ06XV5T2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NL17SZ06XV5T2G requirements.
6.How does Aetrix verify that NL17SZ06XV5T2G is sourced from the original manufacturer or authorized distributors?
All NL17SZ06XV5T2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NL17SZ06XV5T2G meets industry standards.
7.What is the process for return or replacement of NL17SZ06XV5T2G?
All NL17SZ06XV5T2G units undergo pre-shipment inspection (PSI). If there is an issue with NL17SZ06XV5T2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NL17SZ06XV5T2G part is unused and in its original packaging.
Return procedure for NL17SZ06XV5T2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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