onsemi NL17SZ06XV5T2G-L22087
- Part No.:
- NL17SZ06XV5T2G-L22087
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- SOT-553
- Datasheet:
-
NL17SZ06XV5T2G-L22087.pdf
- Description:
- IC INVERTER 1CH 1-INP SOT553
- Quantity:
- Payment:

- Shipping:

Inventory:2,043
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Product details
Overview
NL17SZ06XV5T2G-L22087 from onsemi is a single CMOS inverter with open-drain output, designed for level-shifting and wired-OR logic applications in space-constrained systems. It operates from 1.65 V to 5.5 V, delivers 2.1 ns typical propagation delay at 5 V, supports 24 mA sink current at 3.0 V, and features input/output overvoltage tolerance up to 5.5 V - enabling interoperability across mixed-voltage domains such as I²C bus interfacing.
For engineers reviewing the NL17SZ06XV5T2G-L22087 datasheet, pinout, applications, or equivalent options, key selection considerations include open-drain drive capability, partial power-down support (IOFF), wide VCC range compatibility, and SOT-553 package footprint for high-density PCB layouts.
Technical Context
The NL17SZ06XV5T2G-L22087 implements a single inverting buffer stage with open-drain output architecture, requiring an external pull-up resistor to define high-level logic states. Its IOFF feature disables input/output leakage during partial power-down, preventing back-driving of powered rails in multi-rail systems.
It supports rail-to-rail input voltage tolerance (−0.5 V to VCC + 0.5 V) and maintains functional operation across −55 °C to +125 °C, with thermal resistance of 324 °C/W in SOT-553 packaging - critical for thermally constrained embedded control nodes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65 V to 5.5 V - enables direct interface with 1.8 V, 2.5 V, 3.3 V, and 5 V logic families without level translators. |
| tPD (Typ) | 2.1 ns at VCC = 5 V - supports >200 MHz toggle rates in timing-critical signal inversion paths. |
| IOL (Max) | 24 mA at VCC = 3.0 V - drives standard I²C bus capacitance (400 pF) with robust low-state margin. |
| Input Tolerance | Up to 5.5 V independent of VCC - allows safe connection to higher-voltage signals without clamping diodes. |
| IOFF Leakage | ≤10 µA at VCC = 0 V - prevents current injection into unpowered sections during system sleep modes. |
| Operating Temp | −55 °C to +125 °C - qualified for automotive under-hood and industrial motor-control environments. |
| Package | SOT-553 (1.6 mm × 1.2 mm × 0.55 mm) - ultra-small footprint for portable and wearables PCBs. |
Pinout & Package
SOT-553 package: 5-pin, 0.5 mm pitch, exposed pad not present, JEDEC-compliant moisture sensitivity level 1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | A (Input) | Inverting logic input; accepts voltages up to 5.5 V regardless of VCC setting. |
| 2 | GND | Ground reference for all internal circuitry and output discharge path. |
| 3 | NC | No-connect terminal; must be left floating or tied to GND per layout guidelines. |
| 4 | Y (Output) | Open-drain output; requires external pull-up to define HIGH state; sinks up to 24 mA. |
| 5 | VCC | Positive supply rail; powers internal logic and defines output LOW threshold (VOL). |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC operation | 1.65–5.5 V enables single part to serve multiple voltage domains in battery-powered IoT nodes. |
| Open-drain output | Supports wired-AND/I²C bus topology and bidirectional communication without direction control pins. |
| IOFF partial power-down | Blocks current flow between powered/unpowered sections - essential for hot-swap and low-power sequencing. |
| Overvoltage-tolerant inputs | Accepts 5.5 V inputs even when VCC = 1.8 V - eliminates need for external voltage translators in mixed-rail designs. |
| Low propagation delay | 2.1 ns (5 V) ensures minimal timing skew in clock buffering or enable signal conditioning paths. |
Applications
| I²C Bus Level Shifting | GPIO Expansion Interface |
|---|---|
|
Use Scenario: Interfacing a 3.3 V microcontroller GPIO to a 5 V I²C sensor while maintaining bus integrity and slew rate compliance. IC Role / Device Role / Timing Role: Inverting open-drain buffer providing bidirectional signal translation with programmable pull-up location. Use Value: Eliminates discrete MOSFET translators; leverages built-in 5.5 V input tolerance and 24 mA sink to meet I²C fast-mode (400 kHz) timing requirements. |
Use Scenario: Expanding interrupt-capable GPIO lines from an MCU to multiple peripheral modules sharing a common interrupt line. IC Role / Device Role / Timing Role: Wired-OR combiner using open-drain outputs to aggregate active-low interrupts without contention. Use Value: Reduces BOM count vs. discrete diode-OR networks; IOFF prevents back-current during MCU reset or sleep transitions. |
| Power Sequencing Control | Reset Signal Conditioning |
|
Use Scenario: Generating synchronized enable signals for multiple LDOs in a multi-rail power management subsystem. IC Role / Device Role / Timing Role: Inverting logic gate driving pull-down on enable pins, with precise VOL ≤ 0.42 V at 24 mA ensures reliable LDO activation. Use Value: Guarantees clean, monotonic power-up sequence across −55 °C to +125 °C with no timing drift due to temperature-dependent propagation delay. |
Use Scenario: Debouncing and inverting a mechanical push-button reset signal before feeding to an FPGA or SoC reset controller. IC Role / Device Role / Timing Role: Schmitt-trigger-free inverter with controlled rise/fall times (tPLZ/tPZL ≤ 4.8 ns) minimizing metastability risk. Use Value: Provides deterministic signal inversion without added RC filtering; 2.5 pF input capacitance minimizes loading on high-impedance switch nodes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar inverter-with-open-drain-output applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G06DBVR | Same SOT-553 package; 32 mA sink at 3.3 V; slightly higher tPD (3.5 ns typ at 3.3 V); no IOFF feature. | Lacks partial power-down protection - unsuitable for systems requiring hot-swap or asymmetric rail sequencing. | Prefer when higher drive strength is needed and IOFF is not required; verify thermal derating at 125 °C. |
| 74LX1G06GW,125 | SC-70-5 (SOT-353) package; 24 mA sink at 3.3 V; identical tPD (2.1 ns at 5 V); IOFF supported. | Smaller 1.25 mm × 1.25 mm footprint but 0.65 mm pitch - less manufacturable in high-volume automated assembly than SOT-553's 0.5 mm pitch. | Choose for ultra-dense layouts where board area is more critical than assembly yield; confirm reflow profile compatibility. |
Compared with SN74LVC1G06DBVR and 74LX1G06GW,125, the NL17SZ06XV5T2G-L22087 uniquely combines IOFF, 5.5 V input tolerance, and SOT-553's 0.5 mm pitch - making it optimal for automotive body electronics and industrial edge controllers demanding robustness, density, and rail isolation.
Availability
NL17SZ06XV5T2G-L22087 is available at Aetrix Electronics and suitable for I²C bus interfacing, GPIO expansion, power sequencing, and reset signal conditioning requiring stable component supply across automotive, industrial, and portable electronics programs.
Supply support for NL17SZ06XV5T2G-L22087 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensing, and connectivity solutions for automotive, industrial, cloud, and consumer markets.
The NL17SZ06XV5T2G-L22087 belongs to the NL17SZ logic family - designed for ultra-low-power, high-speed signal conditioning in space- and power-constrained embedded systems.
FAQ
What is the maximum sink current specification for NL17SZ06XV5T2G-L22087 at 3.0 V supply?
The NL17SZ06XV5T2G-L22087 supports up to 24 mA sink current at VCC = 3.0 V, as specified in the DC Electrical Characteristics table under IOL conditions. This value ensures reliable low-state drive for I²C fast-mode buses and LED indicator loads without exceeding VOL limits (≤0.42 V). The device maintains this rating across its full operating temperature range (−55 °C to +125 °C), verified per onsemi's characterization data.
Does NL17SZ06XV5T2G-L22087 support partial power-down functionality?
Yes, NL17SZ06XV5T2G-L22087 includes IOFF circuitry that actively disables input and output leakage paths when VCC = 0 V. Per the datasheet, IOFF leakage is limited to ≤10 µA, preventing back-current flow into unpowered system sections. This feature is explicitly documented in the Features list and DC Electrical Characteristics table, confirming its presence in the SOT-553 variant.
What is the propagation delay of NL17SZ06XV5T2G-L22087 at 1.8 V supply?
At VCC = 1.8 V (within the 1.65–1.95 V range), the NL17SZ06XV5T2G-L22087 exhibits a typical propagation delay (tPZL) of 6.0 ns and maximum of 9.5 ns, as specified in the AC Electrical Characteristics table. These values apply to both rising and falling edges (tPLZ/tPZL) and are measured under standard load conditions (CL = 50 pF, RL = 500 Ω), ensuring predictable timing in low-voltage IoT sensor nodes.
Is NL17SZ06XV5T2G-L22087 RoHS compliant and lead-free?
Yes, NL17SZ06XV5T2G-L22087 is Pb-free, halogen-free/BFR-free, and RoHS compliant, as confirmed in the Features section and ordering information. The "G" suffix in the part number denotes lead-free packaging, and the device meets JEDEC J-STD-020 moisture sensitivity level 1 - allowing floor-life unlimited storage without dry-pack requirements.
What are the valid input voltage levels for NL17SZ06XV5T2G-L22087 when operating at 2.5 V VCC?
When VCC = 2.5 V, NL17SZ06XV5T2G-L22087 defines VIH as ≥0.70 × VCC = 1.75 V and VIL as ≤0.30 × VCC = 0.75 V, per the DC Electrical Characteristics table. Inputs are also overvoltage tolerant up to 5.5 V, meaning signals from higher-voltage sources (e.g., 5 V GPIO) may be safely applied without damage or level-shifting components.
NL17SZ06XV5T2G-L22087 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 17SZ
- Package/Case:
- SOT-553
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Inverter
- Number of Circuits:
- 1
- Number of Inputs:
- 1
- Features:
- Open Drain
- Voltage - Supply:
- 1.65V ~ 5.5V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- -, 32mA
- Input Logic Level - Low:
- -
- Input Logic Level - High:
- -
- Max Propagation Delay @ V, Max CL:
- 4.4ns @ 5V, 50pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-553
NL17SZ06XV5T2G-L22087 FAQ
1.How can I place an order for NL17SZ06XV5T2G-L22087 through Aetrix?
Please submit a Request for Quotation (RFQ) for NL17SZ06XV5T2G-L22087 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NL17SZ06XV5T2G-L22087 reliable?
The price and inventory of NL17SZ06XV5T2G-L22087 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NL17SZ06XV5T2G-L22087 is usually 5 days.
3.What payment methods are accepted for NL17SZ06XV5T2G-L22087?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NL17SZ06XV5T2G-L22087 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NL17SZ06XV5T2G-L22087?
NL17SZ06XV5T2G-L22087 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NL17SZ06XV5T2G-L22087 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NL17SZ06XV5T2G-L22087?
For technical support, including NL17SZ06XV5T2G-L22087 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NL17SZ06XV5T2G-L22087 requirements.
6.How does Aetrix verify that NL17SZ06XV5T2G-L22087 is sourced from the original manufacturer or authorized distributors?
All NL17SZ06XV5T2G-L22087 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NL17SZ06XV5T2G-L22087 meets industry standards.
7.What is the process for return or replacement of NL17SZ06XV5T2G-L22087?
All NL17SZ06XV5T2G-L22087 units undergo pre-shipment inspection (PSI). If there is an issue with NL17SZ06XV5T2G-L22087, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NL17SZ06XV5T2G-L22087 part is unused and in its original packaging.
Return procedure for NL17SZ06XV5T2G-L22087:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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