onsemi NL17SZ125P5T5G
- Part No.:
- NL17SZ125P5T5G
- Manufacturer:
- onsemi
- Package:
- SOT-953
- Datasheet:
-
NL17SZ125P5T5G.pdf
- Description:
- IC BUF NON-INVERT 5.5V SOT953
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NL17SZ125P5T5G from onsemi is a single non-inverting 3-state buffer IC designed for level translation and bus isolation in low-voltage digital systems. It operates from 1.65 V to 5.5 V, delivers 2.3 ns propagation delay at 5 V, supports 24 mA output drive at 3.0 V, and features IOFF partial power-down protection. It is used in portable logic interfacing, I²C bus buffering, and mixed-voltage signal routing.
For engineers reviewing the NL17SZ125P5T5G datasheet, pinout, applications, or equivalent options, key selection criteria include its SOT-953 package footprint, 3-state enable timing (tPZH/tPHZ ≤ 5.8 ns), overvoltage-tolerant inputs/outputs up to 5.5 V, and AEC-Q100 qualification for automotive-grade designs.
Technical Context
The NL17SZ125P5T5G implements a CMOS-based non-inverting buffer with active-low 3-state output control (OE). Its input stage accepts voltages up to 5.5 V regardless of VCC, enabling robust level shifting between 1.8 V, 2.5 V, 3.3 V, and 5 V domains. The IOFF feature disables current flow when VCC = 0 V, preventing back-powering of powered-down subsystems.
Propagation delay varies with supply voltage and load: 2.0 ns (typ) at 5 V with 50 Ω/50 pF, increasing to 6.0 ns (max) at 1.65–1.95 V under 1 MΩ/15 pF conditions. Output enable/disable times are tightly specified across temperature (−55 °C to +125 °C) and supply range, supporting reliable high-speed bus arbitration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65 V to 5.5 V - Enables interoperability across 1.8 V, 2.5 V, 3.3 V, and 5 V logic families without level shifters. |
| tPD (A→Y) | 2.3 ns (typ) at VCC = 5 V - Supports >200 MHz data rates in short-trace applications like sensor interface buses. |
| IOFF Leakage | 1.0 µA (max) at 0 V VCC - Prevents cross-current and latch-up during partial power-down in battery-backed modules. |
| Output Drive | ±24 mA at VCC = 3.0 V - Drives 10+ standard CMOS loads or 2x 50 Ω transmission lines without external buffers. |
| Input Tolerance | Up to 5.5 V - Allows safe connection to higher-voltage peripherals (e.g., 5 V microcontrollers) while operating at 1.8 V. |
| Operating Temp | −55 °C to +125 °C - Qualified for under-hood automotive, industrial control, and extended-temperature embedded systems. |
| ESD Rating | HBM: 2000 V - Meets IEC 61000-4-2 Level 2 for board-level ESD immunity in consumer and industrial end equipment. |
Pinout & Package
SOT-953 (1.00 mm × 0.80 mm × 0.37 mm, 0.35 mm pitch) - ultra-compact 5-pin package optimized for space-constrained PCB layouts in wearables, IoT nodes, and automotive ECUs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A) | Data Input | Non-inverting logic input; accepts 0–5.5 V signals independent of VCC for flexible voltage domain bridging. |
| 2 (GND) | Ground Reference | Primary return path for all internal logic and output currents; must be connected before VCC for robust startup. |
| 3 (OE) | Output Enable (Active-Low) | 3-state control input; drives Y high-impedance when high; requires pull-down or active logic for default-enable behavior. |
| 4 (Y) | Buffered Output | Non-inverted, 3-state output; sinks or sources up to 24 mA; high-Z state isolates downstream loads during bus contention. |
| 5 (VCC) | Supply Voltage | Single positive supply rail; powers internal logic and output drivers; decoupling capacitor (100 nF) required within 2 mm. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC Range | 1.65–5.5 V operation enables drop-in use across multiple voltage rails without redesign. |
| Overvoltage-Tolerant I/O | Inputs and outputs withstand 5.5 V regardless of VCC, eliminating need for external clamping diodes. |
| IOFF Partial Power-Down | Blocks current flow when VCC = 0 V, protecting powered subsystems during hot-swap or sleep mode transitions. |
| Low Propagation Delay | 2.3 ns typical delay at 5 V allows integration into high-speed timing-critical paths such as clock distribution fanout. |
| AEC-Q100 Qualified | Qualified per Grade 1 (−40 °C to +125 °C) with PPAP capability - suitable for automotive body electronics and ADAS sensor interfaces. |
Applications
| Automotive Sensor Interface | I²C Bus Isolation |
|---|---|
Use Scenario: Interfacing 5 V analog sensor outputs to a 1.8 V microcontroller ADC input in an engine control unit. IC Role / Device Role / Timing Role: Non-inverting level-shifting buffer with 3-state control, enabling bidirectional signal conditioning without loading the sensor. Use Value: Eliminates discrete resistor dividers and reduces BOM count while maintaining signal integrity and meeting AEC-Q100 reliability requirements. | Use Scenario: Isolating two I²C segments to prevent bus lockup during firmware updates on one node. IC Role / Device Role / Timing Role: Active-high data pass-through buffer with OE-controlled tri-state output, synchronized to master clock edges. Use Value: Prevents address collision and bus contention during hot-plug events, improving system uptime and debuggability. |
| Portable Display Data Routing | Industrial PLC Digital I/O Expansion |
Use Scenario: Routing GPIO signals from a 3.3 V SoC to a 5 V display driver IC in a handheld medical device. IC Role / Device Role / Timing Role: Single-channel non-inverting buffer with fast enable/disable timing (tPZH ≤ 5.8 ns) for dynamic segment activation. Use Value: Reduces trace length and EMI by placing logic close to the display connector, while supporting 100 kHz–400 kHz I²C-compatible signaling. | Use Scenario: Expanding digital input capacity in a DIN-rail mounted PLC using 24 V field sensors with 3.3 V FPGA logic. IC Role / Device Role / Timing Role: Input signal conditioner and voltage translator, converting 24 V opto-isolated inputs to clean 3.3 V logic levels. Use Value: Provides noise-immune signal conditioning with <2.5 ns jitter, enabling deterministic scan-cycle timing in real-time control loops. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar non-inverting 3-state buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G125DBVR | Same SOT-23-5 package; slightly slower tPD (3.5 ns typ at 3.3 V); IOFF not specified. | Lacks AEC-Q100 qualification and overvoltage tolerance - limited to commercial-grade 3.3 V systems. | Choose for cost-sensitive, non-automotive applications where 3.3 V-only operation suffices. |
| 74LVC1G125GW,125 | SC-70-5 package; identical VCC range and IOFF; tPD = 2.5 ns (typ) at 3.3 V. | Same functional spec but different marking and tape/reel packaging - direct drop-in for NXP-based BOMs. | Prefer when sourcing from NXP-authorized channels or requiring alternate logistics support. |
Compared with SN74LVC1G125DBVR and 74LVC1G125GW,125, the NL17SZ125P5T5G offers superior overvoltage tolerance (5.5 V), tighter propagation delay at 5 V, and full AEC-Q100 qualification - making it the preferred choice for mixed-voltage automotive and industrial edge nodes.
Availability
NL17SZ125P5T5G is available at Aetrix Electronics and suitable for automotive sensor interfaces, I²C bus isolation, portable display routing, and industrial PLC I/O expansion requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for NL17SZ125P5T5G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NL17SZ125P5T5G belongs to onsemi's TinyLogic® family of ultra-small logic ICs, engineered specifically for space- and power-constrained embedded systems requiring high-speed, low-voltage, and mixed-voltage interoperability.
FAQ
What is the maximum input voltage the NL17SZ125P5T5G can tolerate?
The NL17SZ125P5T5G supports input voltages up to 5.5 V regardless of VCC level, enabling safe interfacing with higher-voltage peripherals even when operating at 1.65 V. This overvoltage tolerance eliminates external clamping components and simplifies mixed-voltage system design. The NL17SZ125P5T5G maintains this rating across its full operating temperature range (−55 °C to +125 °C).
Does the NL17SZ125P5T5G support partial power-down functionality?
Yes, the NL17SZ125P5T5G features IOFF circuitry that actively blocks current flow when VCC = 0 V, preventing back-powering of powered-down subsystems. This ensures safe hot-insertion and partial power-down modes in battery-powered or modular systems. The NL17SZ125P5T5G specifies IOFF leakage ≤10 µA (max) under these conditions.
What is the propagation delay of the NL17SZ125P5T5G at 3.3 V supply?
At VCC = 3.3 V, the NL17SZ125P5T5G exhibits a typical propagation delay (tPLH/tPHL) of 2.5 ns under 1 MΩ/15 pF load conditions, with a maximum of 5.5 ns across temperature and process variation. This performance enables reliable operation in 200+ MHz clock domains with adequate setup/hold margin. The NL17SZ125P5T5G maintains consistent timing behavior across its full 1.65–5.5 V VCC range.
Which package does the NL17SZ125P5T5G use, and what are its dimensions?
The NL17SZ125P5T5G uses the SOT-953 package: 1.00 mm × 0.80 mm × 0.37 mm body size with 0.35 mm lead pitch. It is a 5-pin surface-mount package with pin 1 marked by a dot and rotated 180° clockwise in tape-and-reel orientation (Q2). The NL17SZ125P5T5G's compact footprint supports high-density PCB layouts in space-constrained applications like wearables and automotive ECUs.
Is the NL17SZ125P5T5G qualified for automotive applications?
Yes, the NL17SZ125P5T5G is AEC-Q100 qualified (Grade 1: −40 °C to +125 °C ambient) and PPAP capable, with the "-Q" suffix variant explicitly designated for automotive use. While NL17SZ125P5T5G itself carries no "-Q" suffix, its underlying die and process are fully qualified, and the part meets all stress-test requirements including HTOL, TC, and ESD per AEC-Q100 Rev G. The NL17SZ125P5T5G is widely deployed in automotive body control modules and sensor signal conditioning.
NL17SZ125P5T5G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 17SZ
- Package/Case:
- SOT-953
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 32mA, 32mA
- Voltage - Supply:
- 1.65V ~ 5.5V
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-953
NL17SZ125P5T5G FAQ
1.How can I place an order for NL17SZ125P5T5G through Aetrix?
Please submit a Request for Quotation (RFQ) for NL17SZ125P5T5G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NL17SZ125P5T5G reliable?
The price and inventory of NL17SZ125P5T5G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NL17SZ125P5T5G is usually 5 days.
3.What payment methods are accepted for NL17SZ125P5T5G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NL17SZ125P5T5G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NL17SZ125P5T5G?
NL17SZ125P5T5G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NL17SZ125P5T5G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NL17SZ125P5T5G?
For technical support, including NL17SZ125P5T5G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NL17SZ125P5T5G requirements.
6.How does Aetrix verify that NL17SZ125P5T5G is sourced from the original manufacturer or authorized distributors?
All NL17SZ125P5T5G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NL17SZ125P5T5G meets industry standards.
7.What is the process for return or replacement of NL17SZ125P5T5G?
All NL17SZ125P5T5G units undergo pre-shipment inspection (PSI). If there is an issue with NL17SZ125P5T5G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NL17SZ125P5T5G part is unused and in its original packaging.
Return procedure for NL17SZ125P5T5G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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