onsemi NL17SZ126DFT2
- Part No.:
- NL17SZ126DFT2
- Manufacturer:
- onsemi
- Package:
- 5-TSSOP, SC-70-5, SOT-353
- Datasheet:
-
NL17SZ126DFT2.pdf
- Description:
- IC BUFFER NON-INVERT 5.5V SC88A
- Quantity:
- Payment:

- Shipping:

Inventory:3,727
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Product details
Overview
NL17SZ126DFT2 from onsemi is a single non-inverting 3-state buffer IC designed for voltage-level translation and bus isolation in low-power digital systems. It operates from 1.65 V to 5.5 V, delivers 2.3 ns typical propagation delay at 5 V, supports ±24 mA output drive at 3.0 V, and features IOFF partial power-down protection - enabling use in mixed-voltage I²C, SPI, and GPIO expansion interfaces.
For engineers reviewing the NL17SZ126DFT2 datasheet, pinout, applications, or equivalent options, key selection criteria include its SC-88A (SOT-353) 5-pin package, tri-state enable control timing (tPZH/tPHZ ≤ 5.8 ns at 5.5 V), overvoltage-tolerant inputs/outputs up to 5.5 V, and AEC-Q100 qualification for automotive signal routing.
Technical Context
The NL17SZ126DFT2 implements a single-channel CMOS buffer with active-high output enable (OE), enabling bidirectional bus control without direction pins. Its IOFF circuitry prevents current backflow when VCC = 0 V, supporting hot-swap and partial power-down modes in multi-rail systems.
It uses standard TTL/CMOS-compatible input thresholds (VIH = 0.7×VCC, VIL = 0.3×VCC above 2.3 V), maintains rail-to-rail output swing, and exhibits low input/output capacitance (2.5 pF each) - minimizing loading on high-speed data lines and reducing dynamic power via CPD = 9–11 pF.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65 V to 5.5 V - enables interoperability across 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains. |
| tPD (Typ) | 2.3 ns at VCC = 5 V, CL = 15 pF - supports >200 MHz toggle rates in short trace applications. |
| IOH/IOL | ±24 mA at VCC = 3.0 V - drives multiple LS-TTL loads or fan-out ≥10 under 3.3 V operation. |
| Input Tolerance | Up to 5.5 V independent of VCC - allows safe interfacing with higher-voltage peripherals without level shifters. |
| IOFF Leakage | ≤10 µA at VCC = 0 V - prevents signal contention during power sequencing or standby. |
| Operating Temp | −55 °C to +125 °C - qualified for under-hood automotive and industrial control environments. |
| ESD Rating | HBM 2000 V, CDM 1000 V - meets robustness requirements for board-level handling and system integration. |
Pinout & Package
Package: SC-88A (SOT-353), 5-pin, 2.0 mm × 1.25 mm × 0.95 mm body, 0.65 mm pitch, RoHS-compliant, Pb-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (OE) | Output Enable Input | Active-high control: logic HIGH enables Y = A; logic LOW places Y in high-impedance state. |
| 2 (A) | Data Input | Non-inverting input accepting 0–5.5 V signals regardless of VCC level. |
| 3 (GND) | Ground Reference | Primary return path for supply and signal currents; must be low-inductance connection. |
| 4 (Y) | Buffered Output | Tri-state output with rail-to-rail swing and ±24 mA drive capability at 3.0 V. |
| 5 (VCC) | Power Supply | Single positive supply input; powers internal logic and output stage; decoupling required. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range | 1.65–5.5 V operation enables drop-in replacement across legacy and modern logic families. |
| Overvoltage-tolerant I/O | Inputs and outputs withstand 5.5 V even when VCC = 1.65 V - eliminates external clamping diodes. |
| IOFF partial power-down | Blocks current flow between powered and unpowered sections during power sequencing or sleep mode. |
| Low propagation delay | 2.3 ns typical tPD at 5 V ensures minimal timing skew in clock distribution or data gating paths. |
| AEC-Q100 qualified | Qualified to Grade 1 (−40 °C to +125 °C) with PPAP capability - suitable for automotive infotainment and ADAS signal conditioning. |
Applications
| Industrial PLC I/O Expansion | Automotive Body Control Module |
|---|---|
|
Use Scenario: Isolating microcontroller GPIOs from noisy 24 V field sensors and actuators in programmable logic controllers. IC Role / Device Role / Timing Role: Non-inverting 3-state buffer providing voltage translation and bus contention prevention between MCU and peripheral interface ICs. Use Value: Enables safe 3.3 V MCU communication with 5 V sensor buses while maintaining <2.5 ns timing margin for real-time response. |
Use Scenario: Level-shifting and enabling/disabling LIN or CAN transceiver control lines in vehicle door modules. IC Role / Device Role / Timing Role: Signal buffer with OE-controlled tri-state output managing enable/disable sequencing of communication PHYs. Use Value: Prevents bus conflicts during power-up/down cycles and supports hot-plug diagnostics per ISO 11898-2 requirements. |
| Consumer IoT Sensor Hub | Medical Portable Device Interface |
|
Use Scenario: Multiplexing multiple I²C sensor outputs onto a shared bus in battery-powered wearables. IC Role / Device Role / Timing Role: Tri-state buffer isolating individual sensor data lines to avoid address collisions and reduce standby current. Use Value: Reduces system idle current by >15 µA per channel via IOFF and enables dynamic bus arbitration without firmware overhead. |
Use Scenario: Interfacing low-power ARM Cortex-M peripherals with legacy RS-232 or analog front-end components in portable diagnostic tools. IC Role / Device Role / Timing Role: Voltage-translating buffer ensuring signal integrity between 1.8 V SoC I/O and 3.3 V/5 V analog subsystems. Use Value: Maintains <100 ps jitter contribution and supports 125 °C ambient operation required for sterilizable enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar non-inverting 3-state buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G126DBVR | Same SC-70-5 (SC-74A-5) footprint but different pinout (A/GND/OE/Y/VCC); 3.6 V max VCC; no overvoltage tolerance. | Limited to 3.3 V systems; lacks 5.5 V I/O tolerance and AEC-Q100 qualification. | Select only for cost-sensitive 3.3 V-only designs where overvoltage immunity is not required. |
| 74AUP1G126GW,125 | Lower ICC (0.9 µA typ), smaller XSON-6 package (1.3 × 1.1 mm), but only 3.6 V VCC max and no IOFF. | Optimized for ultra-low static power in always-on sensor nodes; unsuitable for mixed-voltage hot-swap. | Prefer for battery life-critical applications below 3.6 V where tri-state timing and leakage are secondary. |
Compared with SN74LVC1G126DBVR and 74AUP1G126GW,125, the NL17SZ126DFT2 uniquely combines 1.65–5.5 V operation, 5.5 V overvoltage-tolerant I/O, IOFF, and AEC-Q100 qualification - making it the only choice for automotive-grade mixed-voltage bus buffering requiring zero external protection components.
Availability
NL17SZ126DFT2 is available at Aetrix Electronics and suitable for automotive body electronics, industrial PLC I/O expansion, and medical portable device interface design requiring stable component supply, long-term lifecycle support, and AEC-Q100 compliance.
Supply support for NL17SZ126DFT2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NL17SZ126DFT2 belongs to onsemi's TinyLogic® UHS family - ultra-high-speed, low-voltage CMOS logic devices engineered for space-constrained, low-power signal routing in automotive and industrial edge systems.
FAQ
What is the maximum operating temperature for NL17SZ126DFT2?
The NL17SZ126DFT2 is rated for operation from −55 °C to +125 °C and is AEC-Q100 Grade 1 qualified. This full industrial and automotive temperature range ensures reliable performance in under-hood automotive ECUs, motor drives, and outdoor industrial controllers where thermal stress is critical. The NL17SZ126DFT2 maintains specified timing and drive strength across this entire range.
Does NL17SZ126DFT2 support partial power-down (IOFF) functionality?
Yes, the NL17SZ126DFT2 includes IOFF circuitry that disables current flow between input and output when VCC = 0 V. This feature prevents back-driving of powered sections during power sequencing or standby, which is essential for hot-swap capable systems. Measured IOFF leakage is ≤10 µA, ensuring minimal interference in multi-rail architectures using the NL17SZ126DFT2.
Can NL17SZ126DFT2 interface safely with 5 V signals while powered from 1.8 V?
Yes - the NL17SZ126DFT2 inputs and outputs are overvoltage tolerant up to 5.5 V regardless of VCC level. When powered from 1.8 V, it accepts and drives 5 V signals without damage or level-shifter components. This capability is explicitly verified in the datasheet's Absolute Maximum Ratings and Recommended Operating Conditions tables for the NL17SZ126DFT2.
What package type does NL17SZ126DFT2 use, and is it RoHS-compliant?
The NL17SZ126DFT2 uses the SC-88A (also known as SOT-353) 5-pin package: 2.0 mm × 1.25 mm × 0.95 mm body, 0.65 mm pitch. It is Pb-free, halogen-free/BFR-free, and fully RoHS-compliant, as confirmed in the "Features" section and ordering information of the official NL17SZ126DFT2 datasheet.
How does the enable timing of NL17SZ126DFT2 compare to similar buffers?
The NL17SZ126DFT2 offers fast enable/disable times: tPZH and tPHZ are ≤5.8 ns at VCC = 5.5 V, and tPLZ and tPZL are ≤5.0 ns. These values are measured under standard 500 Ω/50 pF load conditions and outperform many competing single-gate buffers in the same package class. This speed directly benefits high-frequency bus arbitration and dynamic signal routing in the NL17SZ126DFT2's target applications.
NL17SZ126DFT2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 17SZ
- Package/Case:
- 5-TSSOP, SC-70-5, SOT-353
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 32mA, 32mA
- Voltage - Supply:
- 1.65V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-88A (SC-70-5/SOT-353)
NL17SZ126DFT2 FAQ
1.How can I place an order for NL17SZ126DFT2 through Aetrix?
Please submit a Request for Quotation (RFQ) for NL17SZ126DFT2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NL17SZ126DFT2 reliable?
The price and inventory of NL17SZ126DFT2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NL17SZ126DFT2 is usually 5 days.
3.What payment methods are accepted for NL17SZ126DFT2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NL17SZ126DFT2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NL17SZ126DFT2?
NL17SZ126DFT2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NL17SZ126DFT2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NL17SZ126DFT2?
For technical support, including NL17SZ126DFT2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NL17SZ126DFT2 requirements.
6.How does Aetrix verify that NL17SZ126DFT2 is sourced from the original manufacturer or authorized distributors?
All NL17SZ126DFT2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NL17SZ126DFT2 meets industry standards.
7.What is the process for return or replacement of NL17SZ126DFT2?
All NL17SZ126DFT2 units undergo pre-shipment inspection (PSI). If there is an issue with NL17SZ126DFT2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NL17SZ126DFT2 part is unused and in its original packaging.
Return procedure for NL17SZ126DFT2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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