onsemi NL17SZ14XV5T2G-L22087
- Part No.:
- NL17SZ14XV5T2G-L22087
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- SOT-553
- Datasheet:
-
NL17SZ14XV5T2G-L22087.pdf
- Description:
- IC INVERT SCHMITT 1CH 1IN SOT553
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NL17SZ14XV5T2G-L22087 from onsemi is a single Schmitt-trigger inverter IC designed for noise-immune signal conditioning in low-voltage digital systems. It operates from 1.65 V to 5.5 V, delivers 3.7 ns propagation delay at 5 V, supports 24 mA output drive at 3.0 V, and features IOFF partial power-down protection. It is used in level-shifting, waveform shaping, and debouncing circuits in portable and industrial control applications.
For engineers reviewing the NL17SZ14XV5T2G-L22087 datasheet, pinout, applications, or equivalent options, this page provides verified package mapping (SOT-553), confirmed pin functions, real-world hysteresis values (0.48 V typ at 1.65 V), input overvoltage tolerance up to 5.5 V, and validated alternative options for design continuity.
Technical Context
The NL17SZ14XV5T2G-L22087 implements a single CMOS inverter with Schmitt-trigger input thresholds-VT+ = 1.0 V and VT− = 0.5 V at 1.65 V supply-enabling robust noise rejection in slow-rising or noisy input signals. Its IOFF circuitry disables I/O leakage when VCC = 0 V, supporting live-insertion and partial power-down modes.
It uses a low-complexity (<100 FETs) design optimized for ultra-small footprint packages and operates across −55 °C to +125 °C. Input/Output voltage tolerance extends to 5.5 V independent of VCC, allowing mixed-voltage interfacing without external clamping diodes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65 V to 5.5 V - enables direct interface with 1.8 V, 2.5 V, 3.3 V, and 5 V logic families |
| tPD (typ) | 3.7 ns at VCC = 5 V, RL = 1 MΩ, CL = 15 pF - ensures fast edge regeneration for clock or data signals |
| Input Hysteresis | 0.48 V (typ) at VCC = 1.65 V - suppresses chatter on slow or noisy inputs like mechanical switches or sensor outputs |
| IOFF Leakage | ≤10 µA at VCC = 0 V - prevents back-powering of powered-down sections in multi-rail systems |
| Output Drive | ±24 mA at VCC = 3.0 V - sufficient to directly drive LEDs, small logic loads, or multiple 74LVC inputs |
| Input Overvoltage | Tolerant to 5.5 V regardless of VCC - eliminates need for external level-shifters when interfacing with higher-voltage peripherals |
| Operating Temp | −55 °C to +125 °C - qualified for extended industrial and automotive under-hood environments |
Pinout & Package
SOT-553 (Case 463B), 1.60 mm × 1.20 mm × 0.55 mm, 5-pin surface-mount package with 0.50 mm pitch; pin 1 marked by dot or chamfered corner per JEDEC MO-252.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Input (A) | Inverting logic input with Schmitt-trigger hysteresis; accepts 0–5.5 V regardless of VCC |
| 2 | GND | Ground reference for all internal circuitry and output stage; must be low-impedance |
| 3 | NC | No-connect terminal - internally unconnected and must remain floating or grounded per layout guidelines |
| 4 | Output (Y) | Inverted, rail-to-rail CMOS output; drives high/low with 24 mA capability at 3.0 V |
| 5 | VCC | Positive supply input; powers internal logic and output buffer; IOFF active when VCC = 0 V |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger input | Provides 0.48 V typical hysteresis at 1.65 V, enabling reliable switching on slow or noisy signals without external RC filtering |
| IOFF partial power-down | Blocks I/O leakage current (<10 µA) when VCC = 0 V, preventing unintended current paths during system sleep or hot-swap events |
| Overvoltage-tolerant I/O | Accepts inputs and drives outputs up to 5.5 V even at VCC = 1.65 V - simplifies mixed-voltage board design |
| Low propagation delay | 3.7 ns typical at 5 V allows use in timing-critical signal conditioning, such as clock clean-up or pulse shaping |
| Pb-free & RoHS compliant | Meets global environmental standards; halogen-free/BFR-free construction supports green manufacturing requirements |
Applications
| Switch Debouncing | Waveform Shaping |
|---|---|
|
Use Scenario: Mechanical pushbutton or rotary encoder outputs generate contact bounce lasting 1–10 ms, causing false interrupts in microcontrollers. IC Role / Device Role / Timing Role: Inverter with Schmitt trigger acts as a noise-immune digital conditioner, converting erratic analog switch transitions into clean, monotonic logic edges. Use Value: Eliminates need for software debounce or external RC networks; hysteresis ensures single, glitch-free transitions per press. |
Use Scenario: A sine wave oscillator or analog sensor output requires conversion to a square wave for digital timing or counting. IC Role / Device Role / Timing Role: Single inverter with hysteresis serves as a zero-crossing detector and waveform squarer, generating TTL/CMOS-compatible edges. Use Value: Delivers consistent edge timing (3.7 ns tPD) and rail-to-rail output swing, enabling precise frequency measurement or clock synchronization. |
| Level Translation | Power Sequencing Monitor |
|
Use Scenario: A 5 V sensor output must interface safely with a 1.8 V microcontroller GPIO without damaging the low-voltage input. IC Role / Device Role / Timing Role: Acts as a unidirectional level shifter: 5 V input tolerated, 1.8 V output driven, with no external bias required. Use Value: Leverages inherent 5.5 V input tolerance and 1.65–5.5 V VCC flexibility to translate across three logic families without resistors or MOSFETs. |
Use Scenario: System power rails (e.g., 3.3 V, 1.2 V) require monitoring to confirm proper sequencing before enabling downstream logic. IC Role / Device Role / Timing Role: Inverts and conditions reset or PGOOD signals; IOFF protects during power-down phases where VCC may be absent. Use Value: Ensures safe isolation between powered and unpowered domains, preventing latch-up or backfeed during startup/shutdown sequences. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar inverter-with-Schmitt-trigger applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G14DBVR | Same SOT-553 package; 3.2 ns tPD at 3.3 V; lower hysteresis (0.25 V typ); no IOFF | Lacks IOFF - unsuitable for partial power-down systems; better for high-speed, always-on signal conditioning | Select when speed > hysteresis margin is critical and VCC remains stable during operation |
| MC74VHC1G14DTT1G | SOT-353 (SC-88A) package; 5.5 ns tPD at 5 V; wider VCC range (2–5.5 V); no IOFF | Requires PCB redesign due to different footprint; lacks power-down isolation | Choose only if SC-88A is already standardized in design and IOFF is not required |
Compared with SN74LVC1G14DBVR and MC74VHC1G14DTT1G, the NL17SZ14XV5T2G-L22087 uniquely combines SOT-553 compactness, 3.7 ns speed, strong hysteresis (0.48 V), and IOFF - making it the only option among the three that supports both noise immunity and safe multi-rail power sequencing.
Availability
NL17SZ14XV5T2G-L22087 is available at Aetrix Electronics and suitable for industrial control panels, portable medical devices, and automotive body electronics requiring stable component supply, long-term lifecycle support, and AEC-Q100-aligned reliability.
Supply support for NL17SZ14XV5T2G-L22087 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient innovation for automotive, industrial, cloud, and IoT applications.
The NL17SZ14XV5T2G-L22087 belongs to the NanoLogic® family of ultra-small logic ICs, engineered specifically for space-constrained, low-power, and mixed-voltage embedded systems needing robust signal integrity.
FAQ
What is the maximum input voltage the NL17SZ14XV5T2G-L22087 can tolerate?
The NL17SZ14XV5T2G-L22087 tolerates DC input voltages up to 5.5 V regardless of VCC level - including when VCC is 0 V. This overvoltage tolerance eliminates external clamping components when interfacing with higher-voltage sources, and is confirmed in the Absolute Maximum Ratings table (VIN = −0.5 V to +6.5 V, with functional operation up to 5.5 V).
Does the NL17SZ14XV5T2G-L22087 support partial power-down operation?
Yes, the NL17SZ14XV5T2G-L22087 includes IOFF circuitry that actively disables input and output leakage paths when VCC = 0 V, limiting IOFF current to ≤10 µA. This feature is explicitly documented in the datasheet Features list and DC Electrical Characteristics table, enabling safe use in hot-swap and multi-rail power-gating architectures.
What is the typical propagation delay of the NL17SZ14XV5T2G-L22087 at 3.3 V?
The NL17SZ14XV5T2G-L22087 has a typical propagation delay of 4.4 ns at VCC = 3.3 V, RL = 500 Ω, and CL = 50 pF - a value explicitly listed in the AC Electrical Characteristics table. This delay remains stable across −55 °C to +125 °C, supporting timing-critical signal conditioning in harsh environments.
Which package does the NL17SZ14XV5T2G-L22087 use, and what are its dimensions?
The NL17SZ14XV5T2G-L22087 uses the SOT-553 package (Case 463B), measuring 1.60 mm × 1.20 mm × 0.55 mm with 0.50 mm lead pitch. Pin 1 is identified by a dot or chamfered corner, and the package is Pb-free, halogen-free, and RoHS compliant - all confirmed in the Device Ordering Information and Mechanical Case Outline sections.
How does the Schmitt-trigger input of the NL17SZ14XV5T2G-L22087 improve noise immunity?
The NL17SZ14XV5T2G-L22087 provides input hysteresis of 0.48 V (typ) at VCC = 1.65 V, meaning VT+ = 1.0 V and VT− = 0.5 V. This dual-threshold behavior prevents multiple toggles on slowly rising/falling or noisy signals - a key advantage over standard inverters - and is validated in the DC Electrical Characteristics table under VT+ and VT− parameters.
NL17SZ14XV5T2G-L22087 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 17SZ
- Package/Case:
- SOT-553
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Inverter
- Number of Circuits:
- 1
- Number of Inputs:
- 1
- Features:
- Schmitt Trigger
- Voltage - Supply:
- 1.65V ~ 5.5V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- 32mA, 32mA
- Input Logic Level - Low:
- 0.8V ~ 2.3V
- Input Logic Level - High:
- 1.4V ~ 3.6V
- Max Propagation Delay @ V, Max CL:
- 5.9ns @ 5V, 50pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-553
NL17SZ14XV5T2G-L22087 FAQ
1.How can I place an order for NL17SZ14XV5T2G-L22087 through Aetrix?
Please submit a Request for Quotation (RFQ) for NL17SZ14XV5T2G-L22087 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NL17SZ14XV5T2G-L22087 reliable?
The price and inventory of NL17SZ14XV5T2G-L22087 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NL17SZ14XV5T2G-L22087 is usually 5 days.
3.What payment methods are accepted for NL17SZ14XV5T2G-L22087?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NL17SZ14XV5T2G-L22087 transactions.
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4.How is shipping managed for NL17SZ14XV5T2G-L22087?
NL17SZ14XV5T2G-L22087 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NL17SZ14XV5T2G-L22087 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NL17SZ14XV5T2G-L22087?
For technical support, including NL17SZ14XV5T2G-L22087 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NL17SZ14XV5T2G-L22087 requirements.
6.How does Aetrix verify that NL17SZ14XV5T2G-L22087 is sourced from the original manufacturer or authorized distributors?
All NL17SZ14XV5T2G-L22087 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NL17SZ14XV5T2G-L22087 meets industry standards.
7.What is the process for return or replacement of NL17SZ14XV5T2G-L22087?
All NL17SZ14XV5T2G-L22087 units undergo pre-shipment inspection (PSI). If there is an issue with NL17SZ14XV5T2G-L22087, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NL17SZ14XV5T2G-L22087 part is unused and in its original packaging.
Return procedure for NL17SZ14XV5T2G-L22087:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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