Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Logic > Gates and Inverters

onsemi NL17SZ32XV5T2G-L22087

Name: NL17SZ32XV5T2G-L22087
Brand: onsemi
SKU: NL17SZ32XV5T2G-L22087
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: NL17SZ32XV5T2G-L22087

Manufacturer:: onsemi

Category:: Gates and Inverters

Package:: SOT-553

Datasheet:: NL17SZ32XV5T2G-L22087.pdf

Description:: IC GATE OR 1CH 2-INP SOT553

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:2,554

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

NL17SZ32XV5T2G-L22087 from onsemi is a single 2-input OR gate logic IC designed for low-voltage, high-speed digital signal routing in space-constrained applications. It operates from 1.65 V to 5.5 V, delivers 2.4 ns typical propagation delay at 5 V, supports 24 mA I_O drive at 3.0 V, and features overvoltage-tolerant inputs/outputs up to 5.5 V - enabling interoperability with mixed-supply systems such as USB-powered sensor interfaces.

For engineers reviewing the NL17SZ32XV5T2G-L22087 datasheet, pinout, applications, or equivalent options, key selection considerations include its SOT-553 package footprint, IOFF partial power-down protection, rail-to-rail input tolerance, and guaranteed operation across −55 °C to +125 °C industrial temperature range.

Technical Context

The NL17SZ32XV5T2G-L22087 implements standard positive-logic OR functionality (Y = A + B) using CMOS technology with sub-100-FET complexity. Its input structure accepts voltages up to 5.5 V regardless of V_CC, and its output stage provides symmetrical sourcing/sinking capability with defined VOH/VOL across 1.65–5.5 V supply range.

IOFF circuitry disables current flow between powered and unpowered sections when V_CC = 0 V, preventing back-driving in partial-power-down systems. Propagation delay varies with supply voltage and load: 4.1 ns (max) at 5 V with 50 Ω/50 pF, tightening to 4.4 ns (max) over full temperature range.

Key Specifications

Parameter	Value and Actual Design Meaning
V_CC Range	1.65 V to 5.5 V - enables direct interface with 1.8 V, 2.5 V, 3.3 V, and 5 V logic families without level shifters.
t_PD	2.4 ns typical at V_CC = 5 V, CL = 15 pF - supports >200 MHz toggle rates in clean signal paths.
I_O Drive	±24 mA at V_CC = 3.0 V - sufficient to directly drive multiple 74LVC inputs or small LED indicators.
Input Tolerance	−0.5 V to +5.5 V - allows safe connection to 5 V signals even when operating at 1.8 V V_CC.
IOFF Leakage	≤10 µA at V_IN = 5.5 V, V_CC = 0 V - prevents bus contention during hot-swap or power sequencing.
Operating Temp	−55 °C to +125 °C - qualified for under-hood automotive, industrial control, and outdoor embedded systems.
Package	SOT-553 (1.60 mm × 1.20 mm × 0.55 mm, 0.50 mm pitch) - ultra-compact footprint for high-density PCB layouts.

Pinout & Package

SOT-553 package: 5-pin, surface-mount, moisture sensitivity level 1, Pb-free and RoHS compliant. Pin 1 marked by dot or beveled edge; pin 1 orientation is Q4 per ordering information.

Pin/Terminal	Circuit Role	Design Meaning
1	B input	Second OR operand; accepts overvoltage-tolerant logic-level signals up to 5.5 V.
2	A input	First OR operand; electrically identical to Pin 1 with same voltage and timing specs.
3	GND	Ground reference for all internal logic and I/O; must be connected before V_CC during power-up.
4	Y output	OR result (Y = A + B); actively driven high/low with 24 mA capability at 3.0 V.
5	V_CC	Positive supply; powers internal logic and output stage; IOFF active when held at 0 V.

Key Features

Feature	Design Value
Rail-to-rail input tolerance	Inputs accept −0.5 V to 5.5 V independent of V_CC, eliminating need for external clamping diodes in mixed-voltage interconnects.
IOFF partial power-down	Blocks current flow between powered and unpowered domains when V_CC = 0 V, protecting downstream circuitry during hot-plug events.
Low dynamic power	CPD = 11 pF at 5.5 V enables <1 µW/MHz no-load power consumption - critical for battery-backed subsystems.
High-speed performance	4.1 ns max t_PLH/t_PHL at 5 V ensures deterministic timing in clock distribution, enable gating, and status merging circuits.
Industrial temperature grade	Specified from −55 °C to +125 °C with full DC/AC parameter validation - suitable for engine control units and motor drives.

Applications

USB Peripheral Power Control	Industrial Sensor Signal Conditioning
Use Scenario: OR-ing enable signals from host USB VBUS detection and local microcontroller to power a sensor hub. IC Role / Device Role / Timing Role: Single-gate logic combiner performing wired-OR function with nanosecond-level response. Use Value: Eliminates discrete diode-based ORing with associated forward voltage drop and leakage, while maintaining 5 V signal integrity at 1.8 V system supply.	Use Scenario: Merging fault alerts from multiple temperature, pressure, and vibration sensors into a unified "system error" line. IC Role / Device Role / Timing Role: Fast, low-power combiner for asynchronous digital fault flags in real-time monitoring systems. Use Value: Guarantees sub-5 ns worst-case propagation delay across full temperature range, ensuring timely fault escalation without software polling overhead.
Automotive Body Control Module	Portable Medical Device Status Logic
Use Scenario: Combining door-open, seatbelt-unlatched, and ignition-on signals to activate interior lighting control logic. IC Role / Device Role / Timing Role: AEC-Q100 qualified OR gate providing fail-safe input aggregation in Class 2 automotive modules. Use Value: IOFF protection prevents backfeed from powered lighting drivers into unpowered MCU GPIOs during sleep mode transitions.	Use Scenario: Gating battery-low and sensor-disconnect warnings to trigger audible alarm activation in handheld diagnostic tools. IC Role / Device Role / Timing Role: Ultra-low-quiescent-current combiner enabling always-on alert logic with <10 µA ICC standby draw. Use Value: 1.65 V minimum V_CC allows direct operation from aging Li-ion cells down to 2.8 V, extending usable battery life.

USB Peripheral Power Control

Industrial Sensor Signal Conditioning

Use Scenario: OR-ing enable signals from host USB VBUS detection and local microcontroller to power a sensor hub.

IC Role / Device Role / Timing Role: Single-gate logic combiner performing wired-OR function with nanosecond-level response.

Use Value: Eliminates discrete diode-based ORing with associated forward voltage drop and leakage, while maintaining 5 V signal integrity at 1.8 V system supply.

Use Scenario: Merging fault alerts from multiple temperature, pressure, and vibration sensors into a unified "system error" line.

IC Role / Device Role / Timing Role: Fast, low-power combiner for asynchronous digital fault flags in real-time monitoring systems.

Use Value: Guarantees sub-5 ns worst-case propagation delay across full temperature range, ensuring timely fault escalation without software polling overhead.

Automotive Body Control Module

Portable Medical Device Status Logic

Use Scenario: Combining door-open, seatbelt-unlatched, and ignition-on signals to activate interior lighting control logic.

IC Role / Device Role / Timing Role: AEC-Q100 qualified OR gate providing fail-safe input aggregation in Class 2 automotive modules.

Use Value: IOFF protection prevents backfeed from powered lighting drivers into unpowered MCU GPIOs during sleep mode transitions.

Use Scenario: Gating battery-low and sensor-disconnect warnings to trigger audible alarm activation in handheld diagnostic tools.

IC Role / Device Role / Timing Role: Ultra-low-quiescent-current combiner enabling always-on alert logic with <10 µA ICC standby draw.

Use Value: 1.65 V minimum V_CC allows direct operation from aging Li-ion cells down to 2.8 V, extending usable battery life.

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2-input OR gate applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74LVC1G32DBVR	Same SOT-553 package; 3.3 V optimized (1.65–5.5 V), 3.7 ns max t_PD at 3.3 V; no IOFF support.	Lacks partial power-down protection; unsuitable for hot-swap or multi-rail isolation use cases.	Select when cost is primary concern and IOFF is not required; verify timing margin at target V_CC.
MC74VHC1G32DTT1G	SOT-353 (SC-88A) package; 2.0–5.5 V range; 7.5 ns max t_PD at 3.3 V; includes IOFF but larger footprint (2.0 × 1.25 mm).	Requires PCB layout change due to different package and pinout; higher thermal resistance (377 °C/W).	Choose only if existing design uses SC-88A and board rework is prohibitive; expect ~3× slower switching than NL17SZ32XV5T2G-L22087.

Compared with SN74LVC1G32DBVR and MC74VHC1G32DTT1G, the NL17SZ32XV5T2G-L22087 delivers the fastest propagation delay in its class, unique IOFF capability in the SOT-553 form factor, and the smallest footprint among AEC-Q100-qualified single OR gates - making it optimal for next-generation compact, thermally constrained, and automotive-grade designs.

Availability

NL17SZ32XV5T2G-L22087 is available at Aetrix Electronics and suitable for USB peripheral power control, industrial sensor signal conditioning, automotive body control modules, portable medical device status logic, and other applications requiring stable component supply with guaranteed long-term manufacturability.

Supply support for NL17SZ32XV5T2G-L22087 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.

The NL17SZ32XV5T2G-L22087 belongs to onsemi's NanoLogic™ family of ultra-small, high-performance logic ICs engineered specifically for space- and power-constrained embedded systems requiring robust operation across extended temperature ranges.

FAQ

What is the maximum operating frequency supported by the NL17SZ32XV5T2G-L22087?

The NL17SZ32XV5T2G-L22087 does not specify a maximum clock frequency in its datasheet because it is a combinational logic gate, not a clocked device. However, its 2.4 ns typical propagation delay at 5 V enables reliable operation in signal paths with toggle rates exceeding 200 MHz under light capacitive loads (e.g., CL ≤ 15 pF). For heavier loads or wider temperature ranges, derating to ≤150 MHz ensures timing margin compliance.

Does the NL17SZ32XV5T2G-L22087 support partial power-down (IOFF) functionality?

Yes, the NL17SZ32XV5T2G-L22087 explicitly supports IOFF. When V_CC = 0 V, both inputs and outputs enter a high-impedance state with leakage current limited to ≤10 µA, preventing unwanted current flow between powered and unpowered sections of a system - a critical feature for hot-plug interfaces and multi-rail power architectures.

What is the pin configuration for the NL17SZ32XV5T2G-L22087 in its SOT-553 package?

The NL17SZ32XV5T2G-L22087 uses a 5-pin SOT-553 package with the following pinout: Pin 1 = B input, Pin 2 = A input, Pin 3 = GND, Pin 4 = Y output, Pin 5 = V_CC. Pin 1 is identified by a dot or beveled edge, and orientation follows Q4 marking convention per onsemi's ordering information.

Is the NL17SZ32XV5T2G-L22087 qualified for automotive applications?

Yes, the NL17SZ32XV5T2G-L22087 is AEC-Q100 qualified and PPAP capable when ordered with the −Q suffix (e.g., NL17SZ32XV5T2G-Q). While the base part number NL17SZ32XV5T2G-L22087 shares identical electrical and thermal specifications, automotive qualification requires explicit −Q ordering - confirmed in the datasheet's "−Q Suffix" feature bullet and ordering table.

Can the NL17SZ32XV5T2G-L22087 interface directly with 5 V logic while operating at 1.8 V V_CC?

Yes, the NL17SZ32XV5T2G-L22087 supports overvoltage-tolerant inputs up to 5.5 V regardless of V_CC level. When powered at 1.8 V, it safely accepts 5 V input signals without damage or level-shifting circuitry, and outputs swing rail-to-rail (0 V to 1.8 V), making it ideal for bridging legacy 5 V peripherals to modern low-voltage controllers.

NL17SZ32XV5T2G-L22087 Specifications

Product attributes: Attribute value

Manufacturer:: onsemi

Series:: 17SZ

Package/Case:: SOT-553

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Logic Type:: OR Gate

Number of Circuits:: 1

Number of Inputs:: 2

Features:: -

Voltage - Supply:: 1.65V ~ 5.5V

Current - Quiescent (Max):: 1 µA

Current - Output High, Low:: 32mA, 32mA

Input Logic Level - Low:: -

Input Logic Level - High:: -

Max Propagation Delay @ V, Max CL:: 4.5ns @ 5V, 50pF

Operating Temperature:: -55°C ~ 125°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: SOT-553

NL17SZ32XV5T2G-L22087 FAQ

1.How can I place an order for NL17SZ32XV5T2G-L22087 through Aetrix?

Please submit a Request for Quotation (RFQ) for NL17SZ32XV5T2G-L22087 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for NL17SZ32XV5T2G-L22087 reliable?

The price and inventory of NL17SZ32XV5T2G-L22087 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NL17SZ32XV5T2G-L22087 is usually 5 days.

3.What payment methods are accepted for NL17SZ32XV5T2G-L22087?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NL17SZ32XV5T2G-L22087 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for NL17SZ32XV5T2G-L22087?

NL17SZ32XV5T2G-L22087 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your NL17SZ32XV5T2G-L22087 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for NL17SZ32XV5T2G-L22087?

For technical support, including NL17SZ32XV5T2G-L22087 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NL17SZ32XV5T2G-L22087 requirements.

6.How does Aetrix verify that NL17SZ32XV5T2G-L22087 is sourced from the original manufacturer or authorized distributors?

All NL17SZ32XV5T2G-L22087 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NL17SZ32XV5T2G-L22087 meets industry standards.

7.What is the process for return or replacement of NL17SZ32XV5T2G-L22087?

All NL17SZ32XV5T2G-L22087 units undergo pre-shipment inspection (PSI). If there is an issue with NL17SZ32XV5T2G-L22087, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The NL17SZ32XV5T2G-L22087 part is unused and in its original packaging.

Return procedure for NL17SZ32XV5T2G-L22087:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-09 Counterfeit Electronic Components: How to Detect, Authenticate, and Test Suspect Parts

Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…