My Inquiry
My Account
onsemi NL27WZ06DFT2
- Part No.:
- NL27WZ06DFT2
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
NL27WZ06DFT2.pdf
- Description:
- IC INVERTER DUAL OPEN DRN SC88
- Quantity:
- Payment:
- Shipping:
Inventory:6,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NL27WZ06DFT2 from onsemi is a dual CMOS inverter IC with open-drain outputs, designed for level-shifting and wired-OR logic applications in mixed-voltage systems. It operates from 1.65 V to 5.5 V, delivers 2.1 ns typical propagation delay at 5 V, sinks up to 24 mA at 3.0 V, and supports overvoltage-tolerant inputs/outputs up to 5.5 V - enabling direct interface with legacy 5 V logic while powered from 1.8 V or 3.3 V rails.
For engineers reviewing the NL27WZ06DFT2 datasheet, pinout, applications, or equivalent options, key selection considerations include its open-drain architecture for bus arbitration, IOFF partial power-down protection, AEC-Q100 qualification (−Q suffix), SC-88 package compatibility, and guaranteed operation across −55 °C to +125 °C industrial/automotive temperature range.
Technical Context
The NL27WZ06DFT2 integrates two independent inverters sharing a common VCC and GND, each with an open-drain output requiring external pull-up. Its input structure tolerates voltages up to 5.5 V regardless of VCC, enabling safe interfacing between higher-voltage peripherals and lower-voltage controllers. The IOFF feature disables current flow through inputs/outputs when VCC = 0 V, preventing back-powering and signal contention during partial power-down states.
Propagation delays are tightly specified across voltage ranges: 2.1 ns (typ) at 5 V, 2.7 ns (typ) at 3.3 V, and 6.0 ns (typ) at 1.8 V. Output drive strength is characterized at multiple sink currents (up to 24 mA), with VOL ≤ 0.42 V at IOL = 24 mA and VCC = 3.0 V - supporting robust low-side switching in I²C, SMBus, and interrupt-bus applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65 V to 5.5 V - enables single-supply operation across 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains |
| tPD (Typ) | 2.1 ns at VCC = 5 V - supports high-speed digital control signaling in real-time systems |
| IOL Max | 24 mA at VCC = 3.0 V - drives standard pull-up resistors on I²C buses (e.g., 2.2 kΩ @ 3.3 V yields ~1.5 mA, well within limit) |
| Input Overvoltage Tolerance | Up to 5.5 V independent of VCC - eliminates need for external level-shifters when interfacing 5 V sensors to 1.8 V microcontrollers |
| IOFF Protection | Active when VCC = 0 V - prevents back-current injection into powered subsystems during hot-swap or partial shutdown |
| Operating Temp | −55 °C to +125 °C - qualified for under-hood automotive and industrial control environments |
| Package | SC-88 (DF Suffix, Case 419B) - 6-pin, 2.00 × 1.25 mm footprint with 0.65 mm pitch, suitable for space-constrained PCB layouts |
Pinout & Package
Package: SC-88 (Case 419B), 6-pin, surface-mount, Pb-free, RoHS-compliant. Pin 1 marked by dot or bevelled corner; tape-and-reel orientation per Q4 standard.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | A2 (Input 2) | Inverter stage 2 input; accepts DC voltage up to 5.5 V regardless of VCC value |
| 2 | A1 (Input 1) | Inverter stage 1 input; electrically identical to A2, fully overvoltage tolerant |
| 3 | GND | Digital ground reference; must be connected to system ground plane for noise immunity and proper logic thresholds |
| 4 | VCC | Positive supply rail; powers both inverters; IOFF active only when this pin is at 0 V |
| 5 | Y2 (Output 2) | Open-drain output 2; requires external pull-up resistor to define high state; sinks current only |
| 6 | Y1 (Output 1) | Open-drain output 1; independently controllable; supports wired-OR bus topology with Y2 |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range (1.65–5.5 V) | Enables drop-in replacement across multiple voltage domains without redesigning power rails |
| Overvoltage-tolerant inputs | Accepts 5.5 V signals while powered from 1.65 V - eliminates discrete level-shifter components in mixed-voltage interfaces |
| IOFF partial power-down | Blocks >99% of leakage current when VCC is unpowered - critical for battery-backed subsystems and hot-plug architectures |
| 24 mA sink capability at 3.0 V | Drives standard I²C bus loads (≤ 400 pF, 3.3 V pull-up) with margin for multiple devices and trace capacitance |
| AEC-Q100 qualified (−Q variant) | Validated for automotive applications including engine control, body electronics, and ADAS sensor interfaces |
Applications
| I²C Bus Level-Shifting | Interrupt Signal Aggregation |
|---|---|
Use Scenario: Interfacing a 1.8 V microcontroller I²C master with 5 V sensors or EEPROMs on the same bus. IC Role / Device Role / Timing Role: Dual open-drain inverter acting as bidirectional level translator for SDA/SCL lines, preserving timing integrity and bus arbitration. Use Value: Eliminates dedicated level-shifter ICs; maintains 400 kHz I²C Fast Mode timing with <2.1 ns propagation delay and no added setup/hold penalties. |
Use Scenario: Combining interrupt outputs from multiple peripherals (e.g., ADC, timer, GPIO expander) into a single MCU interrupt pin. IC Role / Device Role / Timing Role: Wired-OR gate using both open-drain outputs tied to one pull-up; any device asserting low triggers MCU interrupt. Use Value: Reduces MCU pin count and firmware complexity; IOFF prevents contention when MCU is in deep sleep and peripherals remain powered. |
| Hot-Swap Power Sequencing | Automotive Wake-Up Line Conditioning |
Use Scenario: Managing power-up sequencing in modular systems where daughterboards may be inserted while main board is active. IC Role / Device Role / Timing Role: Inverter stage buffers and conditions hot-swap detect signals; open-drain output interfaces with supervisor ICs requiring open-collector input. Use Value: IOFF ensures no back-current flows into unpowered modules; overvoltage tolerance protects against transient coupling during insertion. |
Use Scenario: Conditioning wake-up signals from door handle sensors or PIR motion detectors in automotive body control modules. IC Role / Device Role / Timing Role: Inverting and buffering noisy analog comparator outputs before feeding to low-power MCU wake-up pin. Use Value: AEC-Q100 qualification guarantees reliability at 125 °C ambient; 24 mA sink drives long-wire loads with ESD robustness (2 kV HBM). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual open-drain inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G06DCUR | Same SC-70-6 package; 32 mA sink at 3.3 V; no IOFF; max VCC = 5.5 V but inputs not overvoltage tolerant beyond VCC | Lacks overvoltage tolerance and IOFF - unsuitable for mixed-voltage hot-swap or partial power-down use cases | Select when only 3.3 V domain operation is required and cost is prioritized over robustness features |
| MC74VHC1G06DTT1G | SC-70-5 package (5-pin); single inverter; no IOFF; max VCC = 5.5 V; inputs overvoltage tolerant to 5.5 V | Single-channel only; no partial power-down; smaller footprint but requires two units for dual functionality | Choose when board space is extremely constrained and dual functionality can be implemented with two separate devices |
Compared with SN74LVC2G06DCUR and MC74VHC1G06DTT1G, the NL27WZ06DFT2 uniquely combines dual open-drain outputs, 5.5 V overvoltage-tolerant inputs, IOFF protection, and AEC-Q100 qualification in a single SC-88 package - making it the only option qualified for automotive hot-swap and mixed-voltage industrial bus conditioning without external protection circuitry.
Availability
NL27WZ06DFT2 is available at Aetrix Electronics and suitable for automotive body electronics, industrial I²C sensor networks, and hot-swap peripheral interfaces requiring stable component supply, long-term lifecycle support, and AEC-Q100 compliance.
Supply support for NL27WZ06DFT2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (Semiconductor Components Industries, LLC) is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NL27WZ06DFT2 belongs to onsemi's WZ logic family - ultra-high-speed, low-voltage CMOS logic devices engineered for mixed-signal interface and level-shifting in harsh-environment embedded systems.
FAQ
What is the maximum sink current supported by NL27WZ06DFT2 at 1.8 V VCC?
The NL27WZ06DFT2 supports up to 8 mA sink current at VCC = 1.8 V, with VOL ≤ 0.38 V (max) at IOL = 8 mA. This is verified in the DC Electrical Characteristics table under "VOL Low-Level Output Voltage" for VCC = 1.65 to 1.95 V range. Performance degrades linearly below 2.3 V, so design margins should account for worst-case VOL at minimum operating voltage.
Does NL27WZ06DFT2 support true bidirectional level shifting like a dedicated I²C translator?
No - the NL27WZ06DFT2 is a unidirectional inverter with open-drain outputs and does not auto-sense direction or provide active pull-up. It functions as a level-shifting buffer only when used with external pull-ups on both sides of the interface and appropriate input/output routing. For true bidirectional I²C translation, a dedicated device such as PCA9306 is required; NL27WZ06DFT2 serves best in unidirectional control or interrupt aggregation roles.
Is NL27WZ06DFT2 pin-compatible with NL27WZ06DBVT1G?
Yes - both NL27WZ06DFT2 and NL27WZ06DBVT1G share identical 6-pin SC-88 (DF) and SC-74 (DB) pinouts per Figure 2 of the datasheet. They differ only in package type (SC-88 vs SC-74) and marking code, but electrical characteristics, timing, and functional behavior are identical. Layouts designed for one can accommodate the other with no PCB changes, provided footprint pad geometry matches the respective package outline.
What does the "−Q" suffix in NL27WZ06DFT2G-Q* indicate?
The "−Q" suffix denotes that NL27WZ06DFT2G-Q* is manufactured under an automotive-specific quality flow: AEC-Q100 qualified, PPAP-capable, and subject to unique site and control change requirements. It reflects stricter process controls, extended reliability testing, and traceability protocols required for automotive Tier 1 suppliers - distinguishing it from commercial-grade NL27WZ06DFT2G without the −Q designation.
Can NL27WZ06DFT2 be used with a 5 V pull-up resistor on Y1/Y2 while VCC = 1.8 V?
Yes - the NL27WZ06DFT2 inputs and outputs are overvoltage tolerant up to 5.5 V independent of VCC. With VCC = 1.8 V, applying a 5 V pull-up to Y1 or Y2 is fully supported. The output FET will safely sink current without damage, and the input pins (A1/A2) tolerate 5 V logic levels. This enables robust level-shifting from 5 V peripherals to 1.8 V controllers without external clamping diodes or resistors.
NL27WZ06DFT2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 27WZ
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- Inverter
- Number of Circuits:
- 2
- Number of Inputs:
- 1
- Features:
- Open Drain
- Voltage - Supply:
- 1.65V ~ 5.5V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- -, 32mA
- Input Logic Level - Low:
- -
- Input Logic Level - High:
- -
- Max Propagation Delay @ V, Max CL:
- 3ns @ 5V, 50pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-88/SC70-6/SOT-363
NL27WZ06DFT2 FAQ
1.How can I place an order for NL27WZ06DFT2 through Aetrix?
Please submit a Request for Quotation (RFQ) for NL27WZ06DFT2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NL27WZ06DFT2 reliable?
The price and inventory of NL27WZ06DFT2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NL27WZ06DFT2 is usually 5 days.
3.What payment methods are accepted for NL27WZ06DFT2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NL27WZ06DFT2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NL27WZ06DFT2?
NL27WZ06DFT2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NL27WZ06DFT2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NL27WZ06DFT2?
For technical support, including NL27WZ06DFT2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NL27WZ06DFT2 requirements.
6.How does Aetrix verify that NL27WZ06DFT2 is sourced from the original manufacturer or authorized distributors?
All NL27WZ06DFT2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NL27WZ06DFT2 meets industry standards.
7.What is the process for return or replacement of NL27WZ06DFT2?
All NL27WZ06DFT2 units undergo pre-shipment inspection (PSI). If there is an issue with NL27WZ06DFT2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NL27WZ06DFT2 part is unused and in its original packaging.
Return procedure for NL27WZ06DFT2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NL27WZ06DFT2 Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
