onsemi NL27WZ126USG
- Part No.:
- NL27WZ126USG
- Manufacturer:
- onsemi
- Package:
- 8-VFSOP (0.091", 2.30mm Width)
- Datasheet:
-
NL27WZ126USG.pdf
- Description:
- IC BUFFER NON-INVERT 5.5V US8
- Quantity:
- Payment:

- Shipping:

Inventory:2,922
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Product details
Overview
NL27WZ126USG from onsemi is a dual noninverting buffer with 3-state outputs, operating from 1.65 V to 5.5 V supply, delivering 2.4 ns propagation delay at 5 V, ±24 mA drive capability at 3.0 V, and overvoltage-tolerant I/O up to 5.5 V - used in level-shifting and bus-isolation applications in industrial control and portable electronics.
For engineers reviewing the NL27WZ126USG datasheet, pinout, applications, or equivalent options, key selection criteria include 3-state enable timing (tPZH/tPHZ), output skew (<1.0 ns), IOFF partial power-down support, and US8 package compatibility with high-density PCB layouts.
Technical Context
The NL27WZ126USG implements two independent noninverting buffers, each with separate 3-state enable inputs (OE1, OE2), supporting asynchronous channel control. Its IOFF circuitry prevents current backflow when VCC = 0 V, enabling safe hot-insertion in multi-rail systems.
Designed for wide-VCC operation (1.65–5.5 V), it maintains consistent logic thresholds (VIH = 0.7×VCC, VIL = 0.3×VCC above 2.3 V) and delivers rail-to-rail output swing with <0.55 V VOL at 24 mA sink, making it suitable for mixed-voltage domain interfacing without external level translators.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65 V to 5.5 V - enables direct interface between 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains |
| tPLH / tPHL | 2.0 ns (typ) at 5 V, CL = 15 pF - supports >200 MHz data rates in short-bus applications |
| IOFF Leakage | <10 µA at VCC = 0 V - ensures isolation during system power sequencing |
| Output Drive | ±24 mA at 3.0 V - drives standard TTL loads and multiple CMOS inputs without buffering |
| Input Tolerance | Up to 5.5 V regardless of VCC - allows safe connection to higher-voltage buses |
| Operating Temp | −55 °C to +125 °C - qualified for extended industrial and automotive under-hood environments |
Pinout & Package
Supplied in the US8 (Case 493) surface-mount package - 2.1 mm × 2.0 mm footprint, 0.5 mm pitch, 8-pin SOIC-compatible outline with exposed pad option not present.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 7 | OE1, OE2 | Active-high 3-state enable inputs - independently disable Y1/Y2 outputs to high-impedance state |
| 2, 5 | A1, A2 | Noninverting input terminals - pass logic state directly to corresponding outputs when OE is asserted |
| 3, 6 | Y2, Y1 | Buffered output terminals - provide low-impedance, rail-aligned outputs with fast edge rates |
| 4 | GND | Ground reference - common return path for all internal circuitry and I/O |
| 8 | VCC | Power supply - single-supply bias for both channels; IOFF active when VCC = 0 V |
Key Features
| Feature | Design Value |
|---|---|
| Wide Supply Range | Operates across 1.65–5.5 V - eliminates need for separate voltage translators in mixed-supply systems |
| IOFF Partial Power-Down | Blocks current flow between powered and unpowered sections - critical for hot-swap and power-gated subsystems |
| Overvoltage-Tolerant I/O | Accepts inputs up to 5.5 V even at VCC = 1.8 V - simplifies interconnection with legacy or higher-voltage peripherals |
| Low Propagation Delay | 2.4 ns typical at 5 V - preserves signal integrity in high-speed control paths and clock distribution |
| AEC-Q100 Qualified Option | NL27WZ126USG-Q variant meets automotive reliability standards - supports under-hood and ADAS module designs |
Applications
| Industrial PLC Backplane Interface | Portable Device Power-Rail Isolation |
|---|---|
Use Scenario: Isolating microcontroller GPIOs from noisy 24 V fieldbus transceivers in programmable logic controllers. IC Role / Device Role / Timing Role: Dual buffer provides bidirectional signal conditioning and 3-state isolation between MCU and RS-485 PHY layers. Use Value: IOFF protection prevents backfeeding during PLC module hot-swap; overvoltage tolerance avoids external clamping diodes. | Use Scenario: Managing shared data lines between a 3.3 V application processor and 1.8 V sensor hub in battery-powered wearables. IC Role / Device Role / Timing Role: Level-shifting buffer with independent OE control enables dynamic power gating of sensor subsystems. Use Value: 1.65 V minimum VCC supports ultra-low-power sleep modes; 2.4 ns delay preserves timing margins in I²C/SPI bursts. |
| Automotive Body Control Module | Test Equipment Signal Multiplexing |
Use Scenario: Interfacing infotainment SoC GPIOs with 5 V-compatible lighting drivers in vehicle body control units. IC Role / Device Role / Timing Role: Noninverting buffer with AEC-Q100-qualified variant (NL27WZ126USG-Q) handles PWM dimming signals and status feedback. Use Value: −55 °C to +125 °C rating ensures operation in engine bay proximity; 5.5 V I/O tolerance accommodates load-dump transients. | Use Scenario: Routing digital stimulus signals from one pattern generator to multiple DUTs in automated test fixtures. IC Role / Device Role / Timing Role: Dual-channel buffer with independent 3-state enables time-multiplexed signal distribution without crosstalk. Use Value: Output skew <1.0 ns ensures phase alignment across channels; low CIN/COUT minimizes loading on high-frequency sources. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual 3-state buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G126DBVR | Same US8 package, 1.65–5.5 V range, but tPD = 3.7 ns (typ) at 3.3 V; no IOFF specification | Lacks partial power-down protection - unsuitable for hot-swap or multi-rail sequencing | Select when IOFF is not required and lower cost is prioritized over worst-case timing margin |
| 74AUP2G126GW,125 | Lower ICC (max 0.5 µA), wider temp range (−40 to +125 °C), but VCC max = 3.6 V only | Not rated for 5 V systems - requires redesign if interfacing with 5 V peripherals or legacy interfaces | Prefer for ultra-low-power battery-operated devices where 3.3 V operation suffices and leakage dominates budget |
Compared with SN74LVC2G126DBVR and 74AUP2G126GW,125, the NL27WZ126USG uniquely combines IOFF protection, 5.5 V I/O tolerance, and sub-2.5 ns delay - making it the only choice for robust mixed-voltage hot-plug interfaces requiring guaranteed isolation and timing precision.
Availability
NL27WZ126USG is available at Aetrix Electronics and suitable for industrial PLC backplanes, automotive body control modules, and portable device power-rail isolation requiring stable component supply across extended temperature and mixed-voltage conditions.
Supply support for NL27WZ126USG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient innovation for automotive, industrial, cloud, medical, and IoT applications.
The NL27WZ126USG belongs to the NL27WZ ultra-low-power logic family - designed specifically for high-speed, mixed-voltage interfacing in space-constrained and thermally demanding environments.
FAQ
What is the maximum operating voltage for NL27WZ126USG inputs?
The NL27WZ126USG inputs are overvoltage tolerant up to 5.5 V regardless of VCC level - meaning they safely accept 5 V signals even when powered from 1.8 V. This eliminates external clamping components in mixed-voltage designs and is confirmed in the Absolute Maximum Ratings table (VIN = −0.5 V to +6.5 V) and DC Electrical Characteristics section of the official datasheet.
Does NL27WZ126USG support partial power-down functionality?
Yes, NL27WZ126USG supports IOFF partial power-down protection: when VCC = 0 V, input and output leakage remains below 10 µA, preventing current backflow between powered and unpowered sections. This feature is explicitly documented in the Features list and DC Electrical Characteristics (IOFF parameter), enabling safe hot-insertion in modular systems.
What is the typical propagation delay of NL27WZ126USG at 3.3 V supply?
The typical propagation delay (tPLH/tPHL) of NL27WZ126USG is 2.6 ns at VCC = 3.3 V with CL = 15 pF and RL = 1 MΩ, as specified in the AC Electrical Characteristics table. This value is measured under standard load conditions and supports reliable operation in high-speed digital control paths such as SPI clock distribution or GPIO expansion.
Is NL27WZ126USG pin-compatible with other dual 3-state buffers in US8 package?
No, NL27WZ126USG has a unique pinout: OE1 (pin 1), A1 (pin 2), Y2 (pin 3), GND (pin 4), A2 (pin 5), Y1 (pin 6), OE2 (pin 7), VCC (pin 8). It is not pin-compatible with SN74LVC2G126 or 74AUP2G126 - those place VCC at pin 1 and GND at pin 4. Always verify pin mapping before board reuse.
What does the "-Q" suffix mean in NL27WZ126USG-Q?
The "-Q" suffix in NL27WZ126USG-Q denotes an automotive-grade variant that is AEC-Q100 qualified and PPAP capable - meeting stringent reliability, traceability, and process control requirements for automotive applications. The base NL27WZ126USG is commercial grade; only the -Q version carries automotive qualification documentation and lot-level reporting.
NL27WZ126USG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 27WZ
- Package/Case:
- 8-VFSOP (0.091", 2.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 32mA, 32mA
- Voltage - Supply:
- 1.65V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- US8
NL27WZ126USG FAQ
1.How can I place an order for NL27WZ126USG through Aetrix?
Please submit a Request for Quotation (RFQ) for NL27WZ126USG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NL27WZ126USG reliable?
The price and inventory of NL27WZ126USG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NL27WZ126USG is usually 5 days.
3.What payment methods are accepted for NL27WZ126USG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NL27WZ126USG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NL27WZ126USG?
NL27WZ126USG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NL27WZ126USG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NL27WZ126USG?
For technical support, including NL27WZ126USG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NL27WZ126USG requirements.
6.How does Aetrix verify that NL27WZ126USG is sourced from the original manufacturer or authorized distributors?
All NL27WZ126USG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NL27WZ126USG meets industry standards.
7.What is the process for return or replacement of NL27WZ126USG?
All NL27WZ126USG units undergo pre-shipment inspection (PSI). If there is an issue with NL27WZ126USG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NL27WZ126USG part is unused and in its original packaging.
Return procedure for NL27WZ126USG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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