onsemi NL37WZ14MU3TCG
- Part No.:
- NL37WZ14MU3TCG
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 8-UFDFN
- Datasheet:
-
NL37WZ14MU3TCG.pdf
- Description:
- IC INVERT SCHMITT 3CH 3INP 8UDFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,715
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Product details
Overview
NL37WZ14MU3TCG from onsemi is a triple Schmitt-trigger inverter IC operating from 1.65 V to 5.5 V, delivering 2.6 ns typical propagation delay at 5 V, ±24 mA drive capability at 3.0 V, and overvoltage-tolerant inputs/outputs up to 5.5 V. It serves as a noise-immune signal conditioning and waveform shaping element in low-voltage digital interface circuits.
For engineers reviewing the NL37WZ14MU3TCG datasheet, pinout, applications, or equivalent options, key selection criteria include hysteresis voltage (0.25–1.7 V), input threshold symmetry, tri-state compatibility, IOFF partial power-down support, and US8 package thermal resistance (250 °C/W).
Technical Context
The NL37WZ14MU3TCG implements three independent Schmitt-trigger inverters in a single US8 package, each with asymmetric input thresholds (VT+ and VT−) enabling robust noise rejection on slow or noisy signals. Its IOFF feature disables I/O leakage when VCC = 0 V, supporting live-insertion and partial power-down systems.
It operates across −55 °C to +125 °C, supports 15 pF load capacitance with sub-5 ns propagation delay at 3.3 V and 5.0 V, and maintains rail-to-rail output swing under ±24 mA sink/source at 3.0 V - all while consuming <10 µA quiescent current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65 V to 5.5 V - enables direct interfacing with 1.8 V, 2.5 V, 3.3 V, and 5 V logic families without level shifters |
| tPD (typ) | 2.6 ns at VCC = 5 V - ensures minimal timing skew in high-speed clock/data path conditioning |
| VH (Hysteresis) | 0.25–1.7 V depending on VCC - provides configurable noise margin for reliable edge detection on degraded signals |
| IOH/IOL | ±24 mA at 3.0 V - drives multiple standard CMOS loads or small capacitive buses directly |
| IOFF Support | Active when VCC = 0 V - prevents back-powering and signal contention during hot-swap or power-gating sequences |
| CIN/COUT | 2.5 pF each - minimizes loading on upstream drivers and preserves signal integrity in dense routing |
| Operating Temp | −55 °C to +125 °C - qualified for extended industrial and automotive under-hood environments |
Pinout & Package
Supplied in the US8 (Case 493) surface-mount package - 2.1 mm × 2.0 mm footprint, 0.5 mm pitch, 0.55 mm nominal height, JEDEC-compliant, MSL Level 1, Pb-free/RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A1) | Inverter 1 Input | Schmitt-trigger input with hysteresis; accepts 0–5.5 V regardless of VCC level |
| 2 (Y3) | Inverter 3 Output | CMOS-compatible output; actively driven high/low or high-impedance when tri-stated |
| 3 (A2) | Inverter 2 Input | Independent Schmitt input; electrically isolated from A1/A3 except via shared VCC/GND |
| 4 (GND) | Ground Reference | Primary return path for all three inverters; must be low-impedance for noise immunity |
| 5 (Y2) | Inverter 2 Output | Output with same drive strength and voltage specs as Y1/Y3; supports bus termination |
| 6 (A3) | Inverter 3 Input | Third Schmitt input; identical threshold and hysteresis behavior to A1 and A2 |
| 7 (Y1) | Inverter 1 Output | Primary output used for clock inversion or signal cleanup; matches Y2/Y3 timing and drive |
| 8 (VCC) | Supply Voltage | Single positive supply for all three channels; powers internal bias circuitry and output stages |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs | Provides 0.25–1.7 V hysteresis to reject noise on slow-rising/falling signals (e.g., mechanical switch debouncing) |
| Overvoltage-tolerant I/O | Accepts inputs up to 5.5 V even when VCC = 1.65 V - eliminates external clamping diodes in mixed-voltage systems |
| IOFF partial power-down | Blocks >99% I/O leakage when VCC = 0 V - enables safe insertion into powered-backplane systems |
| Low-capacitance I/O | 2.5 pF input/output capacitance - reduces dynamic loading and preserves rise/fall times in high-frequency paths |
| AEC-Q100 qualified variant | NL37WZ14USG−Q meets automotive stress testing requirements - suitable for body control and infotainment subsystems |
Applications
| Industrial Sensor Interface | Automotive Body Control |
|---|---|
Use Scenario: Conditioning analog sensor outputs (e.g., thermistor, potentiometer) before ADC sampling or microcontroller GPIO capture. IC Role / Device Role / Timing Role: Schmitt-trigger inverter acts as a clean zero-crossing detector and noise filter for slow-moving DC-biased signals. Use Value: Eliminates false triggering caused by EMI or contact bounce; enables reliable threshold detection without software debouncing overhead. | Use Scenario: Interfacing door lock actuators, mirror position switches, or HVAC panel buttons to an MCU in a 12 V vehicle system. IC Role / Device Role / Timing Role: Signal-level translator and noise suppressor between 12 V switch inputs and 3.3 V MCU GPIOs. Use Value: Tolerates 5.5 V transients and 12 V pull-ups via external resistors; IOFF prevents backfeed during MCU reset or sleep states. |
| Low-Power IoT Node | Programmable Logic Glue |
Use Scenario: Wake-up signal conditioning in battery-powered edge nodes using reed switches or motion sensors. IC Role / Device Role / Timing Role: Low-quiescent-current inverter generating clean interrupt edges from noisy mechanical contacts. Use Value: Draws <10 µA ICC at VCC = 5.5 V; supports 1.65 V operation to extend battery life in coin-cell designs. | Use Scenario: Adapting legacy TTL or LVTTL signals to modern FPGA or ASIC I/O banks requiring precise hysteresis. IC Role / Device Role / Timing Role: Logic-level shifter and waveform sharpener in board-level interconnect between heterogeneous devices. Use Value: Matches 2.6 ns tPD and 24 mA drive to meet setup/hold timing in high-speed glue logic applications. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Schmitt-trigger inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC14APWR | 6-channel, 3.3 V only (1.65–3.6 V), no IOFF, 3.7 ns tPD at 3.3 V | Lacks overvoltage tolerance and partial power-down; requires strict 3.3 V domain isolation | Select when higher channel count is needed and VCC is fixed at 3.3 V with no hot-swap requirement |
| MC74VHC14DT | 6-channel, 2–5.5 V, no IOFF, 7.5 ns tPD at 5 V, higher CIN (4.5 pF) | Slower propagation, higher input capacitance, no AEC-Q100 qualification | Choose for cost-sensitive industrial boards where timing slack exists and automotive compliance is not required |
Compared with SN74LVC14APWR and MC74VHC14DT, the NL37WZ14MU3TCG uniquely combines triple-channel Schmitt inversion, 1.65–5.5 V operation, IOFF, and 5.5 V overvoltage tolerance - making it optimal for mixed-voltage, hot-pluggable, or automotive-grade signal conditioning where reliability and design margin are critical.
Availability
NL37WZ14MU3TCG is available at Aetrix Electronics and suitable for industrial sensor interfaces, automotive body control modules, and low-power IoT node designs requiring stable component supply, long-term lifecycle support, and AEC-Q100 traceability.
Supply support for NL37WZ14MU3TCG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient innovation for automotive, industrial, cloud, medical, and IoT applications.
The NL37WZ14MU3TCG belongs to onsemi's WZ logic family - designed specifically for ultra-low-voltage, high-speed, noise-immune digital interfacing in space-constrained and thermally demanding environments.
FAQ
What is the maximum input voltage the NL37WZ14MU3TCG can tolerate?
The NL37WZ14MU3TCG supports DC input voltages up to 5.5 V regardless of VCC level - including when VCC is as low as 1.65 V. This overvoltage tolerance eliminates the need for external clamping diodes in mixed-voltage systems and protects against transient overshoot on signal lines.
Does the NL37WZ14MU3TCG support partial power-down operation?
Yes, the NL37WZ14MU3TCG features IOFF circuitry that actively disables input and output leakage paths when VCC = 0 V. This allows safe insertion into powered-backplane systems and prevents back-powering of downstream logic, making it suitable for hot-swap and modular system architectures.
What is the typical propagation delay of the NL37WZ14MU3TCG at 3.3 V?
At VCC = 3.3 V with a 15 pF load, the NL37WZ14MU3TCG delivers a typical propagation delay (tPLH/tPHL) of 2.8 ns. This value is confirmed in the AC Electrical Characteristics table under "3.3 ± 0.3 V" test conditions and reflects consistent performance across temperature and process variation.
Is the NL37WZ14MU3TCG qualified for automotive applications?
The NL37WZ14MU3TCG itself is not marked with the −Q suffix; however, its automotive-qualified counterpart NL37WZ14USG−Q is AEC-Q100 Grade 1 qualified and PPAP capable. The NL37WZ14MU3TCG shares identical electrical and thermal specifications but is intended for commercial/industrial use.
What package type does the NL37WZ14MU3TCG use, and what are its key mechanical attributes?
The NL37WZ14MU3TCG uses the US8 package (Case 493): a 2.1 mm × 2.0 mm, 8-pin, 0.5 mm pitch, leadless surface-mount package with MSL Level 1 moisture sensitivity and RoHS-compliant Pb-free finish. Its thermal resistance is 250 °C/W in still air, supporting compact thermal design in high-density PCB layouts.
NL37WZ14MU3TCG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 8-UFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Inverter
- Number of Circuits:
- 3
- Number of Inputs:
- 3
- Features:
- Schmitt Trigger
- Voltage - Supply:
- 1.65V ~ 5.5V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- 32mA, 32mA
- Input Logic Level - Low:
- 0.75V ~ 1.9V
- Input Logic Level - High:
- 1.8V ~ 3.6V
- Max Propagation Delay @ V, Max CL:
- 5ns @ 5V, 50pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-UDFN (1.45x1)
NL37WZ14MU3TCG FAQ
1.How can I place an order for NL37WZ14MU3TCG through Aetrix?
Please submit a Request for Quotation (RFQ) for NL37WZ14MU3TCG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NL37WZ14MU3TCG reliable?
The price and inventory of NL37WZ14MU3TCG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NL37WZ14MU3TCG is usually 5 days.
3.What payment methods are accepted for NL37WZ14MU3TCG?
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4.How is shipping managed for NL37WZ14MU3TCG?
NL37WZ14MU3TCG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NL37WZ14MU3TCG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NL37WZ14MU3TCG?
For technical support, including NL37WZ14MU3TCG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NL37WZ14MU3TCG requirements.
6.How does Aetrix verify that NL37WZ14MU3TCG is sourced from the original manufacturer or authorized distributors?
All NL37WZ14MU3TCG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NL37WZ14MU3TCG meets industry standards.
7.What is the process for return or replacement of NL37WZ14MU3TCG?
All NL37WZ14MU3TCG units undergo pre-shipment inspection (PSI). If there is an issue with NL37WZ14MU3TCG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NL37WZ14MU3TCG part is unused and in its original packaging.
Return procedure for NL37WZ14MU3TCG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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