onsemi NLSV1T34AMUTCG
- Part No.:
- NLSV1T34AMUTCG
- Manufacturer:
- onsemi
- Package:
- 6-UFDFN
- Datasheet:
-
NLSV1T34AMUTCG.pdf
- Description:
- IC TRANSLTR UNIDIRECTIONAL 6UDFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,990
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NLSV1T34AMUTCG from onsemi is a 1-bit dual-supply non-inverting level translator enabling bidirectional voltage translation between 0.9 V and 4.5 V domains. It supports independent VCCA (input supply) and VCCB (output supply), delivers <2.8 ns propagation delay at 3.3 V, maintains high-impedance I/O during power-off, and operates across −40°C to +85°C for portable interface bridging in mixed-voltage SoC subsystems.
For engineers reviewing the NLSV1T34AMUTCG datasheet, pinout, applications, or equivalent options, key selection criteria include its ultra-low static current (<4.0 µA), OVT protection up to 4.5 V on all pins, non-preferential power sequencing, and ULLGA6 package compatibility with space-constrained mobile PCB layouts.
Technical Context
The NLSV1T34AMUTCG implements a passive MOSFET-based translation architecture with no internal logic or direction control pin-translation direction is determined solely by signal flow and supply rail voltages. Its input (A) and output (B) terminals are electrically isolated between VCCA and VCCB domains, enabling true dual-rail operation without level-shifting bias networks.
It features power-off protection: when either VCCA or VCCB = 0 V, both A and B terminals enter high-impedance state with leakage <5.0 µA, preventing back-drive or bus contention. Input thresholds scale with VCCA (VIH = 0.65×VCCA min at 1.4 V), while output drive strength scales with VCCB (VOH ≥ VCCB – 0.2 V at IOH = −100 µA).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCCA Range | 0.9 V to 4.5 V - enables direct interface to 1.0 V, 1.2 V, 1.8 V, 2.5 V, 3.3 V, and 4.3 V logic domains |
| VCCB Range | 0.9 V to 4.5 V - supports independent output rail selection, e.g., translate 1.2 V core to 3.3 V peripheral bus |
| tPLH / tPHL | ≤2.8 ns (VCCA = VCCB = 3.3 V) - meets timing requirements for 200+ MHz digital interfaces like SDIO, I²C fast-mode+, and GPIO expansion |
| II (Input Leakage) | ±1.0 µA max - ensures minimal loading on weak-drive sources such as microcontroller GPIOs or sensor outputs |
| ICCA + ICCB | <4.0 µA max - reduces standby power in battery-powered devices where always-on level translation is required |
| OVT Protection | 4.5 V tolerant on all pins - eliminates need for external clamping diodes when interfacing to higher-voltage legacy buses |
| ESD HBM | >3000 V - provides robust handling margin for assembly and field operation in handheld electronics environments |
Pinout & Package
ULLGA6 package: ultra-thin leadless glass-epoxy package measuring 1.45 mm × 1.0 mm × 0.40 mm height, optimized for high-density mobile PCBs with solder-mask-defined pads and exposed thermal pad (non-electrical).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCCB | Output port supply rail | Must be stable before or concurrently with VCCA; sets VOH/VOL levels and drives B output impedance |
| NC | No-connect terminal | Internally unconnected; must remain floating or grounded per layout guidelines-no routing or stitching |
| B | Translated output signal | Active-high, non-inverting output referenced to VCCB; sinks/source up to ±24 mA depending on VCCB |
| VCCA | Input port supply rail | Sets VIH/VIL thresholds and powers internal translation circuitry; tolerant of delayed or asynchronous ramp-up |
| A | Input signal | Accepts CMOS-compatible logic levels referenced to VCCA; no external pull-up/down required |
| GND | Digital ground reference | Common return path for both supplies; requires low-inductance connection to system ground plane |
Key Features
| Feature | Design Value |
|---|---|
| Non-preferential supply sequencing | VCCA and VCCB may power up/down in any order without latch-up or damage-eliminates complex power-rail coordination logic |
| Power-off high-impedance I/O | Both A and B pins enter Hi-Z state when either supply drops below 0.5 V, preventing back-powering or bus contention in partial-power-down modes |
| Ultra-low quiescent current | Total ICCA + ICCB ≤ 4.0 µA across full temperature range-extends battery life in always-on sensor hub or modem interface paths |
| Scalable input thresholds | VIH/VIL automatically track VCCA (e.g., VIH = 0.9×VCCA at 0.9–1.4 V), ensuring reliable switching across sub-1.2 V logic families |
| OVT protection on all pins | Withstands 4.5 V DC on A, B, VCCA, VCCB, and GND pins regardless of supply state-removes need for discrete overvoltage clamps |
Applications
| Mobile Baseband-to-Application Processor Interface | Low-Power IoT Sensor Hub Bridging |
|---|---|
|
Use Scenario: Interfacing a 1.2 V baseband processor GPIO to a 3.3 V application processor UART control line in a smartphone. IC Role / Device Role / Timing Role: Unidirectional level translator providing clean 1.2 V → 3.3 V signal conversion with sub-3 ns delay and zero added jitter. Use Value: Enables direct connection without external resistors or active buffers, reducing BOM count and PCB area by >2.5 mm² per channel. |
Use Scenario: Connecting multiple 1.8 V environmental sensors (I²C) to a 3.3 V microcontroller in a wearable health monitor. IC Role / Device Role / Timing Role: Dual-rail translator supporting I²C fast-mode+ (1 Mbps) with VCCA = 1.8 V and VCCB = 3.3 V, preserving rise/fall time integrity. Use Value: Eliminates need for pull-up resistors on the 3.3 V side, lowering static current by ~120 µA per bus segment and improving noise immunity. |
| Industrial PLC Digital I/O Expansion | Automotive Body Control Module Subsystem Link |
|
Use Scenario: Isolating and translating 24 V PLC field I/O signals (via level-shifted 3.3 V logic) to a 1.0 V FPGA configuration interface. IC Role / Device Role / Timing Role: Robust voltage domain bridge with 4.5 V OVT tolerance, allowing safe operation near noisy industrial power rails. Use Value: Prevents ESD-induced resets during field wiring changes and reduces transient coupling into low-voltage FPGA banks. |
Use Scenario: Linking a 1.2 V automotive MCU CAN controller's GPIO debug lines to a 5 V LIN transceiver diagnostic port. IC Role / Device Role / Timing Role: AEC-Q100 qualified translator (NLV variant available) providing fault-tolerant 1.2 V ↔ 5 V signaling with power-off isolation. Use Value: Ensures diagnostic continuity during ignition cycling and prevents back-feed from LIN bus into MCU during sleep mode. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar level translation applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TXS0101DCKR | Single-bit auto-direction sensing; requires no direction control but adds ~10 ns propagation delay and higher ICC (15 µA typical) | Best for bidirectional buses (e.g., I²C); less suitable for fixed-direction GPIO where deterministic timing is critical | Select TXS0101DCKR only if bidirectional operation is required; NLSV1T34AMUTCG preferred for unidirectional, low-jitter, ultra-low-IQ use cases |
| SN74AVC1T45DBVR | Direction-controlled (DIR pin); supports wider VCC range (1.2–3.6 V), but lacks OVT protection and power-off Hi-Z on inputs | Requires external direction logic and clamping diodes for 4.5 V tolerance; not suitable for hot-swap or partial-power-down systems | Choose SN74AVC1T45DBVR when DIR pin control is already present in design; NLSV1T34AMUTCG avoids added control logic and improves system robustness |
Compared with TXS0101DCKR and SN74AVC1T45DBVR, the NLSV1T34AMUTCG uniquely combines ultra-low IQ (<4 µA), guaranteed power-off Hi-Z, 4.5 V OVT tolerance, and sub-3 ns delay-making it optimal for always-on, space-constrained, mixed-rail mobile and automotive subsystems where reliability and efficiency are co-prioritized.
Availability
NLSV1T34AMUTCG is available at Aetrix Electronics and suitable for mobile phone baseband interfacing, IoT sensor hub bridging, and automotive body control module subsystem links requiring stable component supply, long-term lifecycle support, and AEC-Q100-aligned quality assurance.
Supply support for NLSV1T34AMUTCG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (Nasdaq: ON) is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and edge applications.
The NLSV1T34AMUTCG belongs to onsemi's precision level translation product line, engineered specifically for ultra-low-power, high-reliability voltage domain bridging in battery-operated and safety-critical embedded systems.
FAQ
What is the maximum operating temperature range for the NLSV1T34AMUTCG?
The NLSV1T34AMUTCG is rated for continuous operation from −40°C to +85°C ambient temperature. This range is validated per the Recommended Operating Conditions table in the official datasheet and applies to all electrical parameters including propagation delay, VIH/VIL thresholds, and leakage current. The NLSV1T34AMUTCG maintains full functionality across this range without derating, making it suitable for consumer, industrial, and under-hood automotive environments when used within its specified supply and signal voltage limits.
Does the NLSV1T34AMUTCG require external pull-up or pull-down resistors on the A or B pins?
No, the NLSV1T34AMUTCG does not require external pull-up or pull-down resistors on the A or B pins. Its internal circuitry provides defined logic states under all valid operating conditions, and its input threshold scaling (e.g., VIH = 0.65×VCCA) ensures reliable switching without external biasing. External resistors may be added only for specific system-level noise filtering or fail-safe default states-but they are not needed for basic level translation functionality of the NLSV1T34AMUTCG.
Can VCCA and VCCB be powered from different sources with independent sequencing?
Yes, the NLSV1T34AMUTCG explicitly supports non-preferential power sequencing: VCCA and VCCB may be powered up or down in any order, including simultaneous, staggered, or reverse sequence. This behavior is guaranteed by design and verified in the datasheet's "Non-preferential VCCA and VCCB Sequencing" feature and "Power-Off Protection" section. During partial power-down, the NLSV1T34AMUTCG automatically places both A and B pins in high-impedance state, preventing back-drive or bus contention-no external sequencing circuitry is required for the NLSV1T34AMUTCG.
What package type is used for the NLSV1T34AMUTCG, and what are its key mechanical dimensions?
The NLSV1T34AMUTCG uses the ULLGA6 package (Case 613AF), measuring 1.45 mm × 1.0 mm × 0.40 mm height with 0.5 mm pitch and six terminals. It features a solder-mask-defined footprint, no leads, and an exposed thermal pad (non-electrical). This ultra-compact, low-profile package is optimized for high-density mobile PCBs and supports reflow soldering per J-STD-020. The marking "QM" identifies the NLSV1T34AMUTCG device code and Pb-free status per the official onsemi package outline drawing.
Is the NLSV1T34AMUTCG pin-compatible with other variants in the NLSV1T34 family?
The NLSV1T34AMUTCG shares identical pinout and function mapping with other ULLGA6-packaged variants (e.g., NLSV1T34AMX1TCG), but is not pin-compatible with SC-88A (5-pin) or UDFN6 (6-pin, different pad layout) versions due to differing terminal arrangements and package footprints. While electrical functionality is consistent across the NLSV1T34 family, mechanical compatibility requires matching the exact package type-so the NLSV1T34AMUTCG must be substituted only with other ULLGA6-marked variants, not with SC-88A or UDFN6 variants, even if the base part number matches.
NLSV1T34AMUTCG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 6-UFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- Push-Pull
- Current - Output High, Low:
- 24mA, 24mA
- Voltage - Supply:
- 0.9V ~ 4.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-UDFN (1.45x1)
NLSV1T34AMUTCG FAQ
1.How can I place an order for NLSV1T34AMUTCG through Aetrix?
Please submit a Request for Quotation (RFQ) for NLSV1T34AMUTCG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NLSV1T34AMUTCG reliable?
The price and inventory of NLSV1T34AMUTCG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLSV1T34AMUTCG is usually 5 days.
3.What payment methods are accepted for NLSV1T34AMUTCG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLSV1T34AMUTCG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NLSV1T34AMUTCG?
NLSV1T34AMUTCG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NLSV1T34AMUTCG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NLSV1T34AMUTCG?
For technical support, including NLSV1T34AMUTCG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLSV1T34AMUTCG requirements.
6.How does Aetrix verify that NLSV1T34AMUTCG is sourced from the original manufacturer or authorized distributors?
All NLSV1T34AMUTCG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLSV1T34AMUTCG meets industry standards.
7.What is the process for return or replacement of NLSV1T34AMUTCG?
All NLSV1T34AMUTCG units undergo pre-shipment inspection (PSI). If there is an issue with NLSV1T34AMUTCG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NLSV1T34AMUTCG part is unused and in its original packaging.
Return procedure for NLSV1T34AMUTCG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NLSV1T34AMUTCG Tags
-
SN74LVC1G17DBVR
Texas Instruments
-
SN74LVC1G07DCKR
Texas Instruments
-
SN74LVC1G17DCKR
Texas Instruments
-
SN74LVC1G07DBVR
Texas Instruments
-
SN74LVC1G125DCKR
Texas Instruments
-
SN74AHCT1G126DBVR
Texas Instruments
-
SN74LVC1G125DBVR
Texas Instruments
-
SN74AHCT1G125DBVR
Texas Instruments

-
SN74LVC2G17DBVR
Texas Instruments

-
SN74LVC2G07DCKR
Texas Instruments
-
SN74LVC1G34DCKR
Texas Instruments

-
SN74LVC2G17DCKR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

